Commit Graph

316617 Commits

Author SHA1 Message Date
Matt Arsenault 99e6f4d11a AMDGPU: Introduce TokenFactor for ABI register copies in call sequence
The call was missing chain dependencies on the pre-call copies. I
don't think this was causing any real issues however.

llvm-svn: 360906
2019-05-16 15:10:27 +00:00
Sanjay Patel 3413035477 [InstSimplify] add tests for fcmp of maxnum with constants; NFC
Sibling tests for rL360899 (D61691).

llvm-svn: 360905
2019-05-16 15:00:11 +00:00
James Henderson aaf834b2ea [llvm-objdump]Split section-filter.test in two to remove X86 dependency
This allows the generic parts of section-filter.test to be tested on all
targets. The X86-specific parts have been moved to another test.

llvm-svn: 360904
2019-05-16 14:49:10 +00:00
Matt Arsenault df24c92c0f AMDGPU: Assume xnack is enabled by default
This is the conservatively correct default. It is always safe to
assume xnack is enabled, but not the converse.

Introduce a feature to blacklist targets where xnack can never be
meaningfully enabled. I'm not sure the targets this is applied to is
100% correct.

llvm-svn: 360903
2019-05-16 14:48:34 +00:00
Stephen Tozer 6f59b4b6d9 Resubmit: [Salvage] Change salvage debug info implementation to use DW_OP_LLVM_convert where needed
Fixes issue: https://bugs.llvm.org/show_bug.cgi?id=40645

Previously, LLVM had no functional way of performing casts inside of a
DIExpression(), which made salvaging cast instructions other than Noop casts
impossible. With the recent addition of DW_OP_LLVM_convert this salvaging is
now possible, and so can be used to fix the attached bug as well as any cases
where SExt instruction results are lost in the debugging metadata. This patch
introduces this fix by expanding the salvage debug info method to cover these
cases using the new operator.

Differential revision: https://reviews.llvm.org/D61184

llvm-svn: 360902
2019-05-16 14:41:01 +00:00
Fangrui Song 17624a9aad [llvm-objdump] Add "REQUIES: x86-registered-target" to section-filter.test after rL360893
Appease the hexagon buildbot that doesn't build X86. Disassemblers
require Target/X86 support.

llvm-svn: 360901
2019-05-16 14:40:31 +00:00
Xing Xue 6dc363ecc1 Add AIX Version Macros
Summary:
- This patch checks the AIX version and defines the appropriate macros.
- Follow up to a comment on D59048.

Author: andusy

Reviewers: hubert.reinterpretcast, jasonliu, sfertile, xingxue

Reviewed By: sfertile

Subscribers: jsji, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61530

llvm-svn: 360900
2019-05-16 14:22:37 +00:00
Sanjay Patel 152f81fae8 [InstSimplify] fold fcmp (minnum, X, C1), C2
minnum(X, LesserC) == C --> false
   minnum(X, LesserC) >= C --> false
   minnum(X, LesserC) >  C --> false
   minnum(X, LesserC) != C --> true
   minnum(X, LesserC) <= C --> true
   minnum(X, LesserC) <  C --> true

maxnum siblings will follow if there are no problems here.

We should be able to perform some other combines when the constants
are equal or greater-than too, but that would go in instcombine.

We might also generalize this by creating an FP ConstantRange
(similar to what we do for integers).

Differential Revision: https://reviews.llvm.org/D61691

llvm-svn: 360899
2019-05-16 14:03:10 +00:00
Xing Xue 2dee094a08 Fixes for builds that require strict X/Open and POSIX compatiblity
Summary:
- Use alternative to MAP_ANONYMOUS for allocating mapped memory if it isn't available
- Use strtok_r instead of strsep as part of getting program path
- Don't try to find the width of a terminal using "struct winsize" and TIOCGWINSZ on POSIX builds. These aren't defined under POSIX (even though some platforms make them available when they shouldn't), so just check if we are doing a X/Open or POSIX compliant build first.

Author: daltenty

Reviewers: hubert.reinterpretcast, xingxue, andusy

Reviewed By: hubert.reinterpretcast

Subscribers: MaskRay, jsji, hiraditya, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61326

llvm-svn: 360898
2019-05-16 14:02:13 +00:00
Alex Bradbury 3966b02cc8 [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
This is in preparation for emitting CFI directives.

llvm-svn: 360897
2019-05-16 13:56:23 +00:00
Adhemerval Zanella 0d9dcd7bf0 [clang] Handle lround/llround builtins
As for other floating-point rounding builtins that can be optimized
when build with -fno-math-errno, this patch adds support for lround
and llround.  It currently only optimize for AArch64 backend.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D61392

llvm-svn: 360896
2019-05-16 13:43:25 +00:00
Xing Xue af8cda15de [tests][go]Add -stdlib=libc++ to build GO test if LLVM is built with libc++
When libc++ is used to build LLVM libraries, these libraries have dependencies on libc++ and C++ STL signatures in these libraries are corresponding to libc++ implementation. Therefore, -stdlib=libc++ is required on the C++ compiler command for building GO tests that link with these LLVM libraries.

Reviewers: hubert.reinterpretcast, sfertile, amyk, EricWF

Reviewed By: sfertile, hubert.reinterpretcast

Subscribers: jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61900

llvm-svn: 360895
2019-05-16 13:32:55 +00:00
Adhemerval Zanella 2d28db6b9f [AArch64] Handle ISD::LROUND and ISD::LLROUND
This patch optimizes ISD::LROUND and ISD::LLROUND to fcvtas
instruction. It currently only handles the scalar version.

llvm-svn: 360894
2019-05-16 13:30:18 +00:00
James Henderson 2e0d0d377d [llvm-objdump]Improve testing of some switches #1
This is the first in a set of patches I have to improve testing of
llvm-objdump. This patch targets --all-headers, --section, and
--full-contents. In the --section case, it deletes a pre-canned binary
which is only used by the one test and replaces it with yaml.

Reviewed by: grimar, MaskRay

Differential Revision: https://reviews.llvm.org/D61941

llvm-svn: 360893
2019-05-16 13:28:36 +00:00
Fangrui Song e183340c29 Recommit [Object] Change object::SectionRef::getContents() to return Expected<StringRef>
r360876 didn't fix 2 call sites in clang.

Expected<ArrayRef<uint8_t>> may be better but use Expected<StringRef> for now.

Follow-up of D61781.

llvm-svn: 360892
2019-05-16 13:24:04 +00:00
Kristof Umann 1b93a24c29 Reland "[analyzer] Add an example plugin for checker dependency handling"
Buildbots complained that they couldn't find the newly added plugins.

The solution was to move the check-clang cmake target closer to the bottom of
the file, after the new dependencies are added.

Differential Revision: https://reviews.llvm.org/D59464

llvm-svn: 360891
2019-05-16 13:22:04 +00:00
Paul Osmialowski 0732fcc7d5 Fix hwloc topology traversal code unable to handle situation where L2 cache is common for the packages
Currently cores within package that share the same L2 cache are grouped together.
The current logic behind this assumes that the L2 cache is always at deeper
(or the same) level than the package itself. In case when L2 cache is common
for all packages (and the packages are at deeper level than L2 cache) the whole of
the further topology discovery fails to find any computational units resulting in
following assertion:

Assertion failure at kmp_affinity.cpp(715): nActiveThreads == __kmp_avail_proc.
OMP: Error #13: Assertion failure at kmp_affinity.cpp(715).

This patch adds a bit of a logic that prevents such situation from occurring.

Differential Revision: https://reviews.llvm.org/D61796

llvm-svn: 360890
2019-05-16 13:16:24 +00:00
Adhemerval Zanella 73643b5041 [CodeGen] Add lround/llround builtins
This patch add the ISD::LROUND and ISD::LLROUND along with new
intrinsics.  The changes are straightforward as for other
floating-point rounding functions, with just some adjustments
required to handle the return value being an interger.

The idea is to optimize lround/llround generation for AArch64
in a subsequent patch.  Current semantic is just route it to libm
symbol.

llvm-svn: 360889
2019-05-16 13:15:27 +00:00
Matt Arsenault 2120748f77 GlobalISel: Add buildFMA to MachineIRBuilder
llvm-svn: 360888
2019-05-16 13:04:20 +00:00
Matt Arsenault 828b685ebe RegAllocFast: Improve hinting heuristic
Trace through multiple COPYs when looking for a physreg source. Add
hinting for vregs that will be copied into physregs (we only hinted
for vregs getting copied to a physreg previously).  Give hinted a
register a bonus when deciding which value to spill.  This is part of
my rewrite regallocfast series. In fact this one doesn't even have an
effect unless you also flip the allocation to happen from back to
front of a basic block. Nonetheless it helps to split this up to ease
review of D52010

Patch by Matthias Braun

llvm-svn: 360887
2019-05-16 12:50:39 +00:00
Clement Courbet 3a0e6e1c6c [DominatorTree] Print roots unconditionally in `print()`.
Summary:
This came up in a debugging session. I was failing to update the root of
the tree, and got during verification:

```
DominatorTree is different than a freshly computed one!
        Current:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
  [1] %"entry+land.rhs.i" {4294967295,4294967295} [0]
    [2] %opeq1.exit {4294967295,4294967295} [1]

        Freshly computed tree:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
  [1] %"entry+land.rhs.i" {4294967295,4294967295} [0]
    [2] %opeq1.exit {4294967295,4294967295} [1]
```

We now print:

```
DominatorTree is different than a freshly computed one!
        Current:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
  [1] %"entry+land.rhs.i" {4294967295,4294967295} [0]
    [2] %opeq1.exit {4294967295,4294967295} [1]
Roots: <badref>

        Freshly computed tree:
=============================--------------------------------
Inorder Dominator Tree: DFSNumbers invalid: 0 slow queries.
  [1] %"entry+land.rhs.i" {4294967295,4294967295} [0]
    [2] %opeq1.exit {4294967295,4294967295} [1]
Roots: %"entry+land.rhs.i"
```

Reviewers: kuhar, asbirlea

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61999

llvm-svn: 360886
2019-05-16 12:48:56 +00:00
Serge Guelton ab15546983 Fix isInSystemMacro in presence of macro and pasted token
When a warning is raised from the expansion of a system macro that
involves pasted token, there was still situations were they were not
skipped, as showcased by this issue:
https://bugzilla.redhat.com/show_bug.cgi?id=1472437

Differential Revision: https://reviews.llvm.org/D59413

llvm-svn: 360885
2019-05-16 12:40:00 +00:00
Roman Lebedev 62650cf464 [NFC] Fixup FileCheck option name in tests added in rL360881
llvm-svn: 360884
2019-05-16 12:39:34 +00:00
Jonas Toth f12c9730ef [clang-tidy] Removed superfluous and slightly annoying newlines in run-clang-tidy's output.
Summary: The output of clang-tidy itself already has enough newlines, so the resulting output is more in line with the usual compiler output.

Patch by svenpanne.

Reviewers: alexfh, JonasToth

Reviewed By: JonasToth

Subscribers: JonasToth, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61850

llvm-svn: 360883
2019-05-16 12:39:22 +00:00
Jonas Toth 792dc04166 [clang-tidy] Handle member variables in readability-simplify-boolean-expr
- Add readability-simplify-boolean-expr test cases for member variables
Fixes PR40179

Patch by LegalizeAdulthood.

Reviewers: alexfh, hokein, aaron.ballman, JonasToth

Reviewed By: JonasToth

Subscribers: jdoerfert, xazax.hun, cfe-commits

Differential Revision: https://reviews.llvm.org/D56323

llvm-svn: 360882
2019-05-16 12:35:00 +00:00
Roman Lebedev ec6608d547 [NFC][CodeGen] Add some more tests for pulling binops through shifts
The ashr variant may see relaxation in https://reviews.llvm.org/D61918

llvm-svn: 360881
2019-05-16 12:26:53 +00:00
Matt Arsenault d72f25e5b0 GlobalISel: Add buildXor/buildNot
llvm-svn: 360880
2019-05-16 12:23:04 +00:00
Matt Arsenault 27ac8408f6 GlobalISel: Add DstOp version of buildIntrinsic
llvm-svn: 360879
2019-05-16 12:22:56 +00:00
Hans Wennborg 4da9ff9fcf Revert r360876 "[Object] Change object::SectionRef::getContents() to return Expected<StringRef>"
It broke the Clang build, see llvm-commits thread.

> Expected<ArrayRef<uint8_t>> may be better but use Expected<StringRef> for now.
>
> Follow-up of D61781.

llvm-svn: 360878
2019-05-16 12:08:34 +00:00
Matt Arsenault a8f88c388f AMDGPU/GlobalISel: Correct regbank for 1-bit and/or/xor
Bool values should use the scc/vcc regbank since r350611.

llvm-svn: 360877
2019-05-16 12:06:41 +00:00
Fangrui Song a076ec54be [Object] Change object::SectionRef::getContents() to return Expected<StringRef>
Expected<ArrayRef<uint8_t>> may be better but use Expected<StringRef> for now.

Follow-up of D61781.

llvm-svn: 360876
2019-05-16 11:33:48 +00:00
Yvan Roux 671fc5f3f4 [lld-link] Add missing "REQUIRES: x86" to COFF/lib-module-asm.ll test.
This should fix ARM bots.

llvm-svn: 360875
2019-05-16 11:29:30 +00:00
Pavel Labath 1a8630ac28 DWARFContext: Return empty data extractors instead of null pointers
Summary:
There are several reasons for doing this:
- generally, there's no reason to differentiate between a section being
  absent and it being present, but empty
- it matches more closely what llvm DWARF parser is doing (which also
  doesn't differentiate the two cases)
- SymbolFileDWARF also doesn't differentiate the two cases, which makes
  porting the rest of sections easier
- it fixes a bug in how the return-null-if-empty logic was implemented
  (it returned nullptr only the second time we tried to get the
  debug_aranges section), which meant that we hit an assert when trying
  to parse an empty-but-present section

Reviewers: JDevlieghere, clayborg, aprantl

Subscribers: zturner, lldb-commits

Differential Revision: https://reviews.llvm.org/D61942

llvm-svn: 360874
2019-05-16 11:19:02 +00:00
Yvan Roux eff622b23c [crt] Mark dso_handle test as xfailing on ARM.
This is a temporary action to fix the bots.

llvm-svn: 360873
2019-05-16 11:13:49 +00:00
Pavel Labath f4014e116e DWARF: Add ability to reference debug info coming from multiple sections
Summary:
This patch adds the ability to precisely address debug info in
situations when a single file can have more than one debug-info-bearing
sections (as is the case with type units in DWARF v4).

The changes here can be classified into roughly three categories:
- the code which addresses a debug info by offset gets an additional
  argument, which specifies the section one should look into.
- the DIERef class also gets an additional member variable specifying
  the section. This way, code dealing with DIERefs can know which
  section is the object referring to.
- the user_id_t encoding steals one bit from the dwarf_id field to store
  the section. This means the total number of separate object files
  (apple .o, or normal .dwo) is limited to 2 billion, but that is fine
  as it's not possible to hit that number without switching to DWARF64
  anyway.

This patch is functionally equivalent to (and inspired by) the two
patches (D61503 and D61504) by Jan Kratochvil, but there are differences
in the implementation:
- it uses an enum instead of a bool flag to differentiate the sections
- it increases the size of DIERef struct instead of reducing the amount
  of addressable debug info
- it sets up DWARFDebugInfo to store the units in a single vector
  instead of two. This sets us up for the future in which type units can
  also live in the debug_info section, and I believe it's cleaner
  because there's no need for unit index remapping

There are no tests with this patch as this is essentially NFC until
we start parsing type units from the debug_types section.

Reviewers: JDevlieghere, clayborg, aprantl

Subscribers: arphaman, jankratochvil, lldb-commits

Differential Revision: https://reviews.llvm.org/D61908

llvm-svn: 360872
2019-05-16 11:07:58 +00:00
Cullen Rhodes 472c6ef8b0 [AArch64][SVE2] Asm: implement CMLA/SQRDCMLAH instructions
Summary:
This patch adds support for the indexed and unpredicated vectors forms
of the CMLA and SQRDCMLAH instructions.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D61906

llvm-svn: 360871
2019-05-16 09:42:22 +00:00
Cullen Rhodes 07eba98dd7 [AArch64][SVE2] Asm: implement CDOT instruction
Summary:
The complex DOT instructions perform a dot-product on quadtuplets from
two source vectors and the resuling wide real or wide imaginary is
accumulated into the destination register. The instructions come in two
forms:

Vector form, e.g.
  cdot z0.s, z1.b, z2.b, #90    - complex dot product on four 8-bit quad-tuplets,
                                  accumulating results in 32-bit elements. The
                                  complex numbers in the second source vector are
                                  rotated by 90 degrees.

  cdot z0.d, z1.h, z2.h, #180   - complex dot product on four 16-bit quad-tuplets,
                                  accumulating results in 64-bit elements.
                                  The complex numbers in the second source
                                  vector are rotated by 180 degrees.

Indexed form, e.g.
  cdot z0.s, z1.b, z2.b[3], #0  - complex dot product on four 8-bit quad-tuplets,
                                  with specified quadtuplet from second source vector,
                                  accumulating results in 32-bit elements.
  cdot z0.d, z1.h, z2.h[1], #0  - complex dot product on four 16-bit quad-tuplets,
                                  with specified quadtuplet from second source vector,
                                  accumulating results in 64-bit elements.

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer, rovka

Differential Revision: https://reviews.llvm.org/D61903

llvm-svn: 360870
2019-05-16 09:33:44 +00:00
Jonas Toth 3cbf3c8412 [clang-tidy] Do not list enabled checks when -quiet is given to run-clang-tidy.
Summary: When run-clang-tidy is given the -quiet flag, do not output the potentially hundreds of enabled check names at the beginning.

Patch by svenpanne.

Reviewers: alexfh, JonasToth

Reviewed By: JonasToth

Subscribers: JonasToth, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D61849

llvm-svn: 360869
2019-05-16 09:22:39 +00:00
Fangrui Song 2f677ab07b Simplify Triple::ppc64{,le} checks with Triple::isPPC64()
While here, update some ppc64le specific check to isPPC64(), if it
applies to big-endian as well, in the hope that it will ease the support
of big-endian if people are interested in this area. The big-endian
variant is used by at least FreeBSD, Gentoo Linux, Adélie Linux, and
Void Linux.

llvm-svn: 360868
2019-05-16 09:07:33 +00:00
Cullen Rhodes 064f6ab556 [AArch64][SVE2] Asm: add unpredicated integer multiply instructions
Summary:
Add support for the following instructions:

  * MUL (indexed and unpredicated vectors forms)
  * SQDMULH (indexed and unpredicated vectors forms)
  * SQRDMULH (indexed and unpredicated vectors forms)
  * SMULH (unpredicated, predicated form added in SVE)
  * UMULH (unpredicated, predicated form added in SVE)
  * PMUL (unpredicated)

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer, rovka

Differential Revision: https://reviews.llvm.org/D61902

llvm-svn: 360867
2019-05-16 09:07:26 +00:00
Igor Kudrin 261a1bc129 Add missing "REQUIRES: x86" to the lto/irmover-warning.ll test.
llvm-svn: 360866
2019-05-16 09:04:52 +00:00
Fangrui Song ddb93b637e Simplify ArchSpec::IsMIPS()
llvm-svn: 360865
2019-05-16 08:37:32 +00:00
Fangrui Song 3e92df3e39 Add Triple::isPPC64()
llvm-svn: 360864
2019-05-16 08:31:22 +00:00
Karl-Johan Karlsson 0e525a4d6b [builtin] Fixed definitions of builtins that rely on the int/long long type is 32/64 bits
Summary:
The definition of the builtins __builtin_bswap32, __builtin_bitreverse32, __builtin_rotateleft32 and __builtin_rotateright32 rely on that the int type is 32 bits wide on the target.
The defintions of the builtins __builtin_bswap64, __builtin_bitreverse64, __builtin_rotateleft64, and __builtin_rotateright64 rely on that the long long type is 64 bits wide.

On targets where this is not the case (e.g. AVR) clang will generate faulty code (wrong llvm assembler intrinsics).

This patch add support for using 'Z' (the int32_t type) in Bultins.def. The builtins above are changed to be based on the int32_t type instead of the int type, and the int64_t type instead of the long long type.

The AVR backend (experimental) have a native int type that is only 16 bits wide. The supplied testcase will therefore fail if running the testcase on trunk as clang will convert e.g. __builtin_bitreverse32 into llvm.bitreverse.i16 on AVR.

Reviewers: dylanmckay, spatel, rsmith, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D61845

llvm-svn: 360863
2019-05-16 07:18:02 +00:00
Martin Storsjo 905af40cc6 [PPC] Fix 32-bit build of libunwind
Clang integrated assembler was unable to build libunwind PPC32 assembly code,
present in functions used to save/restore register context.

This change consists in replacing the assembly style used in libunwind source,
to one that is compatible with both Clang integrated assembler as well as
GNU assembler.

Patch by Leandro Lupori!

Differential Revision: https://reviews.llvm.org/D61792

llvm-svn: 360862
2019-05-16 06:49:20 +00:00
Martin Storsjo 44266b9e11 [PPC64][libunwind] Fix r2 not properly restored
This change makes each unwind step inspect the instruction at the
return address and, if needed, read r2 from its saved location and
modify the context appropriately.

The unwind logic is able to handle both ELFv1 and ELFv2 stacks.

Reported by Bug 41050

Patch by Leandro Lupori!

Differential Revision: https://reviews.llvm.org/D59694

llvm-svn: 360861
2019-05-16 06:49:13 +00:00
George Rimar ec895f11ce [llvm-readobj] - Revert r360676 partially. NFC.
In the r360676 "Apply clang format. NFC" I applied clang-format
for whole ELFDumper.cpp. It caused a little discussion,
one of the points mentioned was that previously nicely lined up
tables are not so nice now.

This patch reverts them.

llvm-svn: 360860
2019-05-16 06:22:51 +00:00
Clement Courbet c4fdd717ef Reland r360771 "[MergeICmps] Simplify the code."
This revision does not seem to be the culprit.

llvm-svn: 360859
2019-05-16 06:18:02 +00:00
Igor Kudrin 4669cf2750 [LTO] Improve readability of module IDs
Module IDs can appear in diagnostic messages.
This patch adds some auxiliary symbols to improve their readability.

Differential Revision: https://reviews.llvm.org/D61857

llvm-svn: 360858
2019-05-16 05:23:25 +00:00
Igor Kudrin 1ff8b7bdf1 [IRMover] Improve diagnostic messages for conflicting metadata
This does the similar for error messages as rL344011 has done for warnings.

With llvm::lto::LTO, the error might appear when LTO::run() is executed.
In that case, the calling code cannot know which module causes the error
and, subsequently, cannot hint the user.

Differential Revision: https://reviews.llvm.org/D61880

llvm-svn: 360857
2019-05-16 05:23:13 +00:00