Commit Graph

14 Commits

Author SHA1 Message Date
Derek Schuff 8bb5f2927a [WebAssembly] Implement eliminateCallFramePseudo
Summary:
Implement eliminateCallFramePsuedo to handle ADJCALLSTACKUP/DOWN
pseudo-instructions. Add a test calling a vararg function which causes non-0
adjustments. This revealed an issue with RegisterCoalescer wherein it
eliminates a COPY from SP32 to a vreg but failes to update the live ranges
of EXPR_STACK, causing a machineinstr verifier failure (so this test
is commented out).

Also add a dynamic alloca test, which causes a callseq_end dag node with
a 0 (instead of undef) second argument to be generated. We currently fail to
select that, so adjust the ADJCALLSTACKUP tablegen code to handle it.

Differential Revision: http://reviews.llvm.org/D15587

llvm-svn: 255844
2015-12-16 23:21:30 +00:00
Dan Gohman a712a6c4ce [WebAssembly] Avoid adding redundant EXPR_STACK uses.
llvm-svn: 255563
2015-12-14 22:37:23 +00:00
Dan Gohman 31448f16b6 [WebAssembly] Fix a typo in a comment.
llvm-svn: 254999
2015-12-08 03:43:03 +00:00
Dan Gohman d70e5907cd [WebAssembly] Assert MRI.isSSA() in passes that depend on SSA form.
llvm-svn: 254995
2015-12-08 03:30:42 +00:00
Dan Gohman 4da4abd87f [WebAssembly] Fix scheduling dependencies in register-stackified code
Add physical register defs to instructions used from stackified
instructions to prevent them from being scheduled into the middle of
a stack sequence. This is a conservative measure which may be loosened
in the future.

Differential Revision: http://reviews.llvm.org/D15252

llvm-svn: 254811
2015-12-05 00:51:40 +00:00
Dan Gohman 35bfb24c28 [WebAssembly] Initial varargs support.
Full varargs support will depend on prologue/epilogue support, but this patch
gets us started with most of the basic infrastructure.

Differential Revision: http://reviews.llvm.org/D15231

llvm-svn: 254799
2015-12-04 23:22:35 +00:00
Dan Gohman 391a98afd5 [WebAssembly] Fix dominance check for PHIs in the StoreResult pass
When a block has no terminator instructions, getFirstTerminator() returns
end(), which can't be used in dominance checks. Check dominance for phi
operands separately.

Also, remove some bits from WebAssemblyRegStackify.cpp that were causing
trouble on the same testcase; they were left behind from an earlier
experiment.

Differential Revision: http://reviews.llvm.org/D15210

llvm-svn: 254662
2015-12-03 23:07:03 +00:00
Dan Gohman 53d1399792 [WebAssembly] Fix comments to say "LIFO" instead of "FIFO" when describing a stack.
llvm-svn: 254523
2015-12-02 18:08:49 +00:00
Dan Gohman 7a6b9825ce [WebAssembly] Minor clang-format and selected clang-tidy cleanups. NFC.
llvm-svn: 254267
2015-11-29 22:32:02 +00:00
Dan Gohman 81719f8555 [WebAssembly] Support for register stackifying with load and store instructions.
llvm-svn: 254076
2015-11-25 16:55:01 +00:00
Dan Gohman 7bafa0eaef [WebAssembly] Add asserts that the expression stack is used in stack order.
llvm-svn: 253638
2015-11-20 02:33:24 +00:00
Dan Gohman b0992dafb3 [WebAssemby] Enforce FIFO ordering for instructions using stackified registers.
llvm-svn: 253634
2015-11-20 02:19:12 +00:00
Dan Gohman 4ba4816b97 [WebAssembly] Enable register coloring and register stackifying.
This also takes the push/pop syntax another step forward, introducing stack
slot numbers to make it easier to see how expressions are connected. For
example, the value pushed in $push7 is popped in $pop7.

And, this begins an experiment with making get_local and set_local implicit
when an operation directly uses or defines a register. This greatly reduces
clutter. If this experiment succeeds, it may make sense to do this for
const instructions as well.

And, this introduces more special code for ARGUMENTS; hopefully this code
will soon be obviated by proper support for live-in virtual registers.

llvm-svn: 253465
2015-11-18 16:12:01 +00:00
Dan Gohman 1462faad35 [WebAssembly] Prototype passes for register coloring and register stackifying.
These passes are not yet enabled by default.

llvm-svn: 253217
2015-11-16 16:18:28 +00:00