99837837ec
Add test cases that should have been committed with 118969.
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llvm-svn: 118974
2010-11-13 02:51:00 +00:00
868e3f0977
JIT: More nitty style tweakage, aka territory marking.
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llvm-svn: 118973
2010-11-13 02:48:57 +00:00
2ed3fe08e9
report_fatal_error: Simplify a possible ambiguity.
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llvm-svn: 118972
2010-11-13 02:48:51 +00:00
078f33c53a
More style nittiness.
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llvm-svn: 118971
2010-11-13 02:48:46 +00:00
056db5adcd
Clean up some doxyments/style.
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llvm-svn: 118970
2010-11-13 02:48:41 +00:00
b3099e6863
1. Adding test cases for MBlaze MC disassembler.
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2. Fixing several errors in disassembler uncovered by test cases.
3. Fixing invalid encoding of PCMPEQ and PCMPNE uncovered by test cases.
llvm-svn: 118969
2010-11-13 02:37:59 +00:00
2bcb8daa44
Add conditional move of large immediate.
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llvm-svn: 118968
2010-11-13 02:25:14 +00:00
1aa5863a3e
Swap multiclass operand order for consistency with other patterns.
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llvm-svn: 118965
2010-11-13 01:28:30 +00:00
69fd90e661
Continue ARM indexed load refactoring. Multiclass for LDR{B} pre/post indexed
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instructions.
llvm-svn: 118963
2010-11-13 01:07:20 +00:00
1d37f35eea
Fix the encoding of negative line deltas.
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llvm-svn: 118962
2010-11-13 01:06:27 +00:00
4a92fcb9fd
Fix some more 80-col violas.
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llvm-svn: 118959
2010-11-13 00:55:45 +00:00
e4f4743409
Fix 80-col violation / non-sensicalness.
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llvm-svn: 118958
2010-11-13 00:55:42 +00:00
2f790749e8
More ARM load/store indexed refactoring. Also fix an incorrect IndexMode
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flag for the LDRT/STRT family instructions as a side effect.
llvm-svn: 118955
2010-11-13 00:35:48 +00:00
1279fc47f9
Revert r118917, which is implicated in the llvm-gcc-i386-linux-selfhost failure.
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llvm-svn: 118954
2010-11-13 00:31:40 +00:00
bfd762b9e8
Update CMake.
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llvm-svn: 118953
2010-11-13 00:28:32 +00:00
9589bf8a86
lli: Switch to using ParseIRFile, for consistency with other LLVM tools.
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- Also, switch tests to not using llvm-as. They run 20% faster now, not that it matters.
llvm-svn: 118952
2010-11-13 00:28:01 +00:00
8ce967e393
Fix an obvious typo which inverted an immediate.
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llvm-svn: 118951
2010-11-13 00:27:47 +00:00
a08ccc8cb9
This should be still failing, but is. Disable it with the
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forget-me-stick for now.
llvm-svn: 118950
2010-11-13 00:25:06 +00:00
240162629c
1. Adding missing immediate mode asm parser test cases.
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2. Fixing improper immediate mode reverse subtract.
llvm-svn: 118948
2010-11-13 00:03:46 +00:00
1293c6a23a
Temporarily revert this.
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llvm-svn: 118946
2010-11-12 23:50:48 +00:00
9c40af415f
For pre-v6t2 targets, only select MOVi32imm if the immediate can be handled with movi + orr.
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llvm-svn: 118945
2010-11-12 23:46:13 +00:00
4b074b8995
Fixing improperly encoded reverse subtract instructions in MBlaze backend.
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llvm-svn: 118943
2010-11-12 23:41:10 +00:00
7cd724ae7d
Revert r118939 while I work out why it broke some buildbots.
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llvm-svn: 118942
2010-11-12 23:36:03 +00:00
c542248602
1. Finishing MBlaze MC asm parser test cases
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2. Parsing .word directive in MBlaze asm parser
3. Fixing hack where memory instructions reversed order of last two parameters
4. Fixing many improperly encoded instructions
5. Support parsing special instructions (MFS,MTS,etc.)
6. Removing unused functions from inst printer
llvm-svn: 118941
2010-11-12 23:30:17 +00:00
53a40df6ea
Remove DW_AT_start_scope support. It is incomplete and superseeded by location entries support.
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llvm-svn: 118940
2010-11-12 23:20:42 +00:00
0003a296ad
Attemt to provide correct encodings for Thumb2 binary operators.
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llvm-svn: 118939
2010-11-12 23:18:11 +00:00
f478cf9685
Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget.
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llvm-svn: 118938
2010-11-12 23:03:38 +00:00
49a66f7d71
Make this happen for ARM like x86. Don't entirely bail out when
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an address is in a different block, get it into a register and go
from there.
llvm-svn: 118936
2010-11-12 22:52:32 +00:00
0fc8084a64
Add conditional mvn instructions.
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llvm-svn: 118935
2010-11-12 22:42:47 +00:00
e09122b46b
Zap a copy/paste-o bit of dead code.
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llvm-svn: 118926
2010-11-12 21:29:10 +00:00
31a7234a47
Refactor to parameterize some ARM load/store encoding patterns. Preparatory
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to splitting the load/store pre/post indexed instructions into [r, r] and
[r, imm] forms.
llvm-svn: 118925
2010-11-12 21:28:15 +00:00
8fdd172502
First stab at providing correct Thumb2 encodings, start with adc.
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llvm-svn: 118924
2010-11-12 21:12:40 +00:00
246b71c596
Have GVN simplify instructions as it goes. For example, consider
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"%z = %x and %y". If GVN can prove that %y equals %x, then it turns
this into "%z = %x and %x". With the new code, %z will be replaced
with %x everywhere (and then deleted). Previously %z would be value
numbered too, which is a waste of time. Also, while a clever value
numbering algorithm would give %z the same value number as %x, our
current one doesn't do so (at least I don't think it does). The new
logic has an essentially equivalent effect to what you would get if
%z was given the same value number as %x, i.e. it should make value
numbering smarter. While there, get hold of target data once at the
start rather than a gazillion times all over the place.
llvm-svn: 118923
2010-11-12 21:10:24 +00:00
2d59ee34f1
Add some missing isel predicates on def : pat patterns to avoid generating VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next.
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llvm-svn: 118922
2010-11-12 20:32:20 +00:00
6bb1ae9d45
Kill more unused stuff.
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llvm-svn: 118921
2010-11-12 19:27:45 +00:00
dcc7732f88
MCELF: Copy the symbol name only if we're going to modify it.
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llvm-svn: 118920
2010-11-12 19:26:04 +00:00
984ff7d17e
Remove unused class.
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llvm-svn: 118919
2010-11-12 19:24:53 +00:00
7ac506d431
Add --enable-docs. Patch by NAKAMURA Takumi.
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llvm-svn: 118918
2010-11-12 19:24:06 +00:00
0284c5d0c7
When the definition of an address value is in a different block
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from the user of the address, fall back to just using the
address in a register instead of bailing out of fast-isel
altogether.
llvm-svn: 118917
2010-11-12 19:14:00 +00:00
87cf7f787e
accept lret as an alias for lretl, fixing the reopened part of PR8592
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llvm-svn: 118916
2010-11-12 18:54:56 +00:00
c4f4b2e878
Remove what looks like dead code in the production of debug lines.
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We only produce debug line information if we have seen a line directive, so
this code is dead. Also, if we want to be bug by bug compatible with
gas and sometimes produce "empty" .debug_line sections, this will
match the content produced by gas.
llvm-svn: 118914
2010-11-12 18:41:26 +00:00
6cbf6c1db5
typo (4th checkin for one fix)
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llvm-svn: 118913
2010-11-12 18:36:03 +00:00
b709ec6345
Emacs auto-fill bug.
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llvm-svn: 118908
2010-11-12 18:17:46 +00:00
3fd741191d
Fill in the default predication bits for ARM unconditional branch.
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llvm-svn: 118907
2010-11-12 18:13:26 +00:00
ff5f8680d8
Test case for PR8287: SD scheduling time. Fixed in r118904.
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llvm-svn: 118906
2010-11-12 17:57:22 +00:00
0deb9c20c0
Encoding for ARM LDRSB instructions.
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llvm-svn: 118905
2010-11-12 17:52:59 +00:00
116efac780
Fixes PR8287: SD scheduling time. The fix is a failsafe that prevents
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catastrophic compilation time in the event of unreasonable LLVM
IR. Code quality is a separate issue--someone upstream needs to do a
better job of reducing to llvm.memcpy. If the situation can be reproduced with
any supported frontend, then it will be a separate bug.
llvm-svn: 118904
2010-11-12 17:50:46 +00:00
5b013b102d
implement PR8592: empirically "lretq" is a "lret" with a rex.w prefix.
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llvm-svn: 118903
2010-11-12 17:41:20 +00:00
64634c36dd
tidy up.
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llvm-svn: 118896
2010-11-12 17:24:29 +00:00
de990b270d
gnu as support both % and @ before types, do the same.
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llvm-svn: 118893
2010-11-12 15:47:08 +00:00
Wesley Peck