Commit Graph

74 Commits

Author SHA1 Message Date
Chris Lattner ba1ed585ee Add support for "m" inline asm constraints.
llvm-svn: 28728
2006-06-08 18:03:49 +00:00
Evan Cheng e8a42360c5 Cygwin support. Patch by Anton Korobeynikov!
llvm-svn: 28672
2006-06-02 22:38:37 +00:00
Evan Cheng a2efb9f3ec Use xor to clear a register.
llvm-svn: 28667
2006-06-02 21:20:34 +00:00
Evan Cheng b33e54ead7 Remove bogus comment.
llvm-svn: 28564
2006-05-30 20:24:48 +00:00
Evan Cheng 734e1e241b A addressing mode folding enhancement:
Fold c2 in (x << c1) | c2 where (c2 < c1)
e.g.
int test(int x) {
  return (x << 3) + 7;
}

This can be codegen'd as:
leal 7(,%eax,8), %eax

llvm-svn: 28550
2006-05-30 06:59:36 +00:00
Evan Cheng 4af59dac0b Assert if InflightSet is not cleared after instruction selecting a BB.
llvm-svn: 28459
2006-05-25 00:24:28 +00:00
Evan Cheng 1a8e74d113 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause
non-deterministic behavior.

llvm-svn: 28454
2006-05-24 20:46:25 +00:00
Chris Lattner aa2372562e Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.

llvm-svn: 28447
2006-05-24 17:04:05 +00:00
Evan Cheng 85b6232b53 Back out indirect branch load folding hack. It broke some tests.
llvm-svn: 28425
2006-05-21 06:28:50 +00:00
Evan Cheng 401049ce33 - Use of load's chain result should be redirected to load's chain operand.
If it reads the chain result of the call, then the use, callseq_start,
  and call would form a cycle!
- Don't forget handle node replacement!
- There could also be a TokenFactor between the load and the callseq_start.

llvm-svn: 28420
2006-05-20 09:21:39 +00:00
Evan Cheng a26c451fa2 Missing break statements.
llvm-svn: 28418
2006-05-20 07:44:28 +00:00
Evan Cheng b9ac06bb33 Remove unused patterns.
llvm-svn: 28417
2006-05-20 01:40:16 +00:00
Evan Cheng f838cfcfbe Handle indirect call which folds a load manually. This never matches by
the TableGen generated code since the load's chain result is read by
the callseq_start node.

llvm-svn: 28416
2006-05-20 01:36:52 +00:00
Evan Cheng 9fee442e63 X86 integer register classes naming changes. Make them consistent with FP, vector classes.
llvm-svn: 28324
2006-05-16 07:21:53 +00:00
Evan Cheng db30388d48 Remove dead code
llvm-svn: 28261
2006-05-12 19:03:56 +00:00
Evan Cheng 9733bde74c Fixing truncate. Previously we were emitting truncate from r16 to r8 as
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
2006-05-08 08:01:26 +00:00
Evan Cheng ddb6cc1d8e Better implementation of truncate. ISel matches it to a pseudo instruction
that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.

llvm-svn: 28119
2006-05-05 05:40:20 +00:00
Chris Lattner 5d70a7c4a5 #include Intrinsics.h into all dag isels
llvm-svn: 27109
2006-03-25 06:47:10 +00:00
Evan Cheng 2dd2c652b2 Added getTargetLowering() to TargetMachine. Refactored targets to support this.
llvm-svn: 26742
2006-03-13 23:20:37 +00:00
Evan Cheng 990c3602bd Don't match x << 1 to LEAL. It's better to emit x + x.
llvm-svn: 26429
2006-02-28 21:13:57 +00:00
Evan Cheng 77d86ff8fc * Cleaned up addressing mode matching code.
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376
2006-02-25 10:09:08 +00:00
Evan Cheng e0ed6ec13f - Clean up the lowering and selection code of ConstantPool, GlobalAddress,
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
2006-02-23 20:41:18 +00:00
Evan Cheng 1f342c2884 PIC related bug fixes.
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
2006-02-23 02:43:52 +00:00
Evan Cheng 7eabbfd618 X86 codegen tweak to use lea in another case:
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323
2006-02-23 00:13:58 +00:00
Evan Cheng 5588de9415 x86 / Darwin PIC support.
llvm-svn: 26273
2006-02-18 00:15:05 +00:00
Evan Cheng a86ba85dc5 Prevent certain nodes that have already been selected from being folded into
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.

llvm-svn: 26117
2006-02-11 02:05:36 +00:00
Evan Cheng 2b6f78b664 Nicer code. :-)
llvm-svn: 26111
2006-02-10 22:46:26 +00:00
Evan Cheng d49cc3634e Added X86 isel debugging stuff.
llvm-svn: 26110
2006-02-10 22:24:32 +00:00
Evan Cheng 101e4b916a Match tblgen change.
llvm-svn: 26096
2006-02-09 22:12:53 +00:00
Evan Cheng d1b82d8db0 Match getTargetNode() changes (now return SDNode* instead of SDOperand).
llvm-svn: 26085
2006-02-09 07:17:49 +00:00
Evan Cheng 6dc90ca172 Change Select() from
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067
2006-02-09 00:37:58 +00:00
Evan Cheng d5f2ba0d6f - Update load folding checks to match those auto-generated by tblgen.
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012
2006-02-06 06:02:33 +00:00
Evan Cheng 54cb1833a4 Use SelectRoot() as entry of any tblgen based isel.
llvm-svn: 25997
2006-02-05 06:46:41 +00:00
Evan Cheng d19d51f414 Re-commit the last bit of change that was backed out.
llvm-svn: 25983
2006-02-05 05:25:07 +00:00
Chris Lattner 22b4edfb42 Temporarily revert this patch, which probably breaks with the
tblgen patch reverted.

llvm-svn: 25971
2006-02-04 09:24:16 +00:00
Evan Cheng ce87cac555 Complex pattern's custom matcher should not call Select() on any operands.
Select them afterwards if it returns true.

llvm-svn: 25968
2006-02-04 08:50:49 +00:00
Evan Cheng 72d5c256c9 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
- Use XORP* to implement fneg.

llvm-svn: 25857
2006-01-31 22:28:30 +00:00
Evan Cheng cde9e30bc6 x86 CPU detection and proper subtarget support
llvm-svn: 25679
2006-01-27 08:10:46 +00:00
Chris Lattner de02d7727f Add explicit #includes of <iostream>
llvm-svn: 25515
2006-01-22 23:41:00 +00:00
Evan Cheng 6135a7a546 Didn't mean to check that in.
llvm-svn: 25436
2006-01-19 01:52:56 +00:00
Evan Cheng 267ba5965e A obvious typo
llvm-svn: 25435
2006-01-19 01:46:14 +00:00
Evan Cheng 911c68d7a8 Fix FP_TO_INT**_IN_MEM lowering.
llvm-svn: 25368
2006-01-16 21:21:29 +00:00
Chris Lattner 78c358d1ad Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code.
llvm-svn: 25333
2006-01-15 09:00:21 +00:00
Chris Lattner 8869c6f782 silence a warning
llvm-svn: 25322
2006-01-14 20:11:13 +00:00
Evan Cheng 2ae799aff0 Select DYNAMIC_STACKALLOC
llvm-svn: 25225
2006-01-11 22:15:18 +00:00
Evan Cheng bc7a0f44bd * Add special entry code main() (to set x87 to 64-bit precision).
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.

llvm-svn: 25207
2006-01-11 06:09:51 +00:00
Chris Lattner 7c551268d0 implement FP_REG_KILL insertion for the dag-dag instruction selector
llvm-svn: 25192
2006-01-11 01:15:34 +00:00
Chris Lattner 29852a58b0 Fit into 80 cols
llvm-svn: 25191
2006-01-11 00:46:55 +00:00
Evan Cheng 73a1ad975e FP_TO_INT*_IN_MEM and x87 FP Select support.
llvm-svn: 25188
2006-01-10 20:26:56 +00:00
Evan Cheng 7c4486215f * Added undef patterns.
* Some reorg.

llvm-svn: 25163
2006-01-09 23:10:28 +00:00