2ae0fe3ac3
AVX512: Implemented encoding and intrinsics for vpalignr
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12270
llvm-svn: 246428
2015-08-31 11:14:02 +00:00
7a4e1ba737
[X86] Fix bug in COMISD and COMISS definition in td files
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COMISD should receive QWORD because it is defined as
(V)COMISD xmm1, xmm2/m64
COMISS should receive DWORD because it is defined as
(V)COMISS xmm1, xmm2/m32
Differential Revision: http://reviews.llvm.org/D11712
llvm-svn: 245551
2015-08-20 11:21:36 +00:00
66233b7d79
Removing tailing whitespaces
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llvm-svn: 244203
2015-08-06 09:06:20 +00:00
8352a0ddf2
AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11528
llvm-svn: 243390
2015-07-28 06:53:28 +00:00
f2460112ad
Implemented encoding and intrinsics of the following instructions
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vunpckhps/pd, vunpcklps/pd,
vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11509
llvm-svn: 243246
2015-07-26 14:41:44 +00:00
074a64e72c
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 243122
2015-07-24 17:24:15 +00:00
fe414353db
Revert r242990: "AVX-512: Implemented encoding , DAG lowering and ..."
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This commit broke the build. Numerous build bots broken, and it was
blocking my progress so reverting.
It should be trivial to reproduce -- enable the BPF backend and it
should fail when running llvm-tblgen.
llvm-svn: 242992
2015-07-23 08:03:44 +00:00
da1b2ea955
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 242990
2015-07-23 07:39:21 +00:00
a5b2e5e2a7
[X86][AVX512] add reduce/range/scalef/rndScale
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include encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D11222
llvm-svn: 242896
2015-07-22 12:00:43 +00:00
f7fd547e27
AVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11351
llvm-svn: 242761
2015-07-21 07:11:28 +00:00
0f370936a0
AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
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In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.
Differential Revision: http://reviews.llvm.org/D11134
llvm-svn: 242023
2015-07-13 13:26:20 +00:00
8b756596fc
[X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
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With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.
This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.
Differential Revision: http://reviews.llvm.org/D10947
llvm-svn: 241506
2015-07-06 20:30:47 +00:00
c6f3c82ffc
[X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
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pmulhrsw
review:
http://reviews.llvm.org/D10948
llvm-svn: 241443
2015-07-06 14:03:40 +00:00
73f26f8ffc
[x86][AVX512] add Multiply High Op
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include encoding and intrinsics tests.
review
http://reviews.llvm.org/D10896
llvm-svn: 241406
2015-07-05 12:23:20 +00:00
15820b072b
AVX-512: Implemented missing encoding for FMA scalar instructions
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Added tests for encoding
Differential Revision: http://reviews.llvm.org/D10865
llvm-svn: 241159
2015-07-01 13:24:28 +00:00
30bc4ca313
AVX-512: all forms of SCATTER instruction on SKX,
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encoding, intrinsics and tests.
llvm-svn: 240936
2015-06-29 12:14:24 +00:00
a7a8e9a018
AVX-512: Implemented missing encoding and intrinsics for FMA instructions
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Added tests for DAG lowering ,encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D10796
llvm-svn: 240926
2015-06-29 09:10:00 +00:00
7ec4b7a8bb
[x86][AVX512]
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Add vscalef support
include encoding and intrinsics
review:
http://reviews.llvm.org/D10730
llvm-svn: 240906
2015-06-28 14:30:39 +00:00
6a1a357f1f
AVX-512: Added all SKX forms of GATHER instructions.
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Added intrinsics.
Added encoding and tests.
llvm-svn: 240905
2015-06-28 10:53:29 +00:00
5e2f8c4231
AVX-512: Added all forms of VPABS instruction
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Added all intrinsics, tests for encoding, tests for intrinsics.
llvm-svn: 240386
2015-06-23 08:19:46 +00:00
55a997437c
AVX-512: added VPSHUFB instruction - all SKX forms
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Added intrinsics and encoding tests.
llvm-svn: 240277
2015-06-22 13:00:42 +00:00
ba5ab328e5
AVX-512: All forms of VCOPMRESS VEXPAND instructions,
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encoding tests.
llvm-svn: 240272
2015-06-22 11:16:30 +00:00
81f03c30a5
[AVX512]
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add instructions: VPAVGB and VPAVGW
review
http://reviews.llvm.org/D10504
llvm-svn: 240012
2015-06-18 12:30:53 +00:00
d3057e5e37
AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD.
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Intrinsics and tests for them are comming in the next patch.
llvm-svn: 240003
2015-06-18 08:56:19 +00:00
4f13f3f9b8
reverted 239999 due to test failures
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llvm-svn: 240001
2015-06-18 08:06:49 +00:00
975a637cd9
AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD
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and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.
llvm-svn: 239999
2015-06-18 07:29:40 +00:00
dfcc3d31a7
AVX-512: cvtusi2ss/d intrinsics.
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Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.
Differential Revision: http://reviews.llvm.org/D10473
llvm-svn: 239888
2015-06-17 07:23:57 +00:00
02d126cb9d
[AVX512] add integer min/max intrinsics support.
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review:
http://reviews.llvm.org/D10439
llvm-svn: 239806
2015-06-16 08:39:27 +00:00
abe4a79b75
AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
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Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D10430
llvm-svn: 239694
2015-06-14 12:44:55 +00:00
00c9ad5ec2
AVX-512: Fixed a bug in comparison of i1 vectors.
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cmp eq should give kxnor instruction
cmp neq should give kxor
https://llvm.org/bugs/show_bug.cgi?id=23631
llvm-svn: 239460
2015-06-10 06:49:28 +00:00
00d9f8457b
AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL
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Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.
Differential Revision: http://reviews.llvm.org/D10310
llvm-svn: 239300
2015-06-08 14:03:17 +00:00
4078c75bd4
AVX-512: added all SKX forms of VPERMW/D/Q instructions.
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Added all forms of VPERMPS/PD instrcuctions.
Added encoding tests.
llvm-svn: 239016
2015-06-04 07:07:13 +00:00
402ebb34af
re-apply 238809
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AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991
llvm-svn: 238923
2015-06-03 13:41:48 +00:00
9e38086534
AVX-512: Implemented SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2 instructions for SKX and KNL.
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Added tests for encoding.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 238917
2015-06-03 10:56:40 +00:00
8938f5acca
AVX-512: Implemented VRANGESD and VRANGESS instructions for SKX Implemented DAG lowering for all these forms.
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Added tests for encoding.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 238834
2015-06-02 14:12:54 +00:00
3425c932da
AVX-512: Implemented VFIXUPIMMSD and VFIXUPIMMSS instructions for KNL
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Implemented DAG lowering for all these forms.
Added tests for encoding.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 238811
2015-06-02 08:28:57 +00:00
8d897dd05f
revert 238809
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llvm-svn: 238810
2015-06-02 07:45:19 +00:00
17de10f37e
AVX-512: Implemented GETEXP instruction for KNL and SKX
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Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
llvm-svn: 238809
2015-06-02 07:18:14 +00:00
3582eb3b39
AVX-512: Implemented VRANGEPD and VRANGEPD instructions for SKX.
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Implemented DAG lowering for all these forms.
Added tests for encoding.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 238738
2015-06-01 11:05:34 +00:00
75ede68793
AVX-512: added all forms of VPSHUFD and VPSHUFHW, VPSHUFLW
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including encodings.
llvm-svn: 238729
2015-06-01 07:17:23 +00:00
42c96d9c0a
AVX-512: Implemented VFIXUPIMMPD and VFIXUPIMMPS instructions for KNL and SKX
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Implemented DAG lowering for all these forms.
Added tests for encoding.
by Igor Breger (igor.breger@intel.com )
llvm-svn: 238728
2015-06-01 06:50:49 +00:00
86c7b46680
AVX-512: Fixed a bug in extracting subvector from v64i1
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By Igor Breger (igor.breger@intel.com )
llvm-svn: 238322
2015-05-27 14:09:33 +00:00
3948c590e3
AVX-512: Implemented all forms of sign-extend and zero-extend instructions for KNL and SKX
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Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 238301
2015-05-27 08:15:19 +00:00
f61727d880
AVX-512: fixed algorithm of building vectors of i1 elements
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fixed extract-insert i1 element,
load i1, zextload i1 should be with "and $1, %reg" to prevent loading garbage.
added a bunch of new tests.
llvm-svn: 237793
2015-05-20 14:32:03 +00:00
08ce53c0ea
AVX-512: Added patterns for scalar-to-vector broadcast
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llvm-svn: 237558
2015-05-18 07:06:23 +00:00
ad9c396838
AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set
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Added encoding tests.
llvm-svn: 237557
2015-05-18 06:42:57 +00:00
1d6a495d6d
AVX-512: fixed a bug in mask operations - (i1 1) pattern
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Filling k-reg with all-ones value was wrong,
(i1 1) should switch on only one bit in mask register
llvm-svn: 237536
2015-05-17 07:28:51 +00:00
1b2f2f1b37
AVX-512: fixed a bug in encoding of VPSRAQ instrcution,
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added a bunch of encoding tests.
llvm-svn: 237232
2015-05-13 07:35:05 +00:00
0d7e9364d1
AVX-512: Added SKX instructions and intrinsics:
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{add/sub/mul/div/} x {ps/pd} x {128/256} 2. max/min with sae
By Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 236971
2015-05-11 06:05:05 +00:00
75d1489326
AVX-512: fixed a bug in i1 vectors lowering
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llvm-svn: 236947
2015-05-10 10:33:32 +00:00
Igor Breger