047a767d74
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of
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MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.
llvm-svn: 90634
2009-12-05 00:44:40 +00:00
95fc6ee51a
Remove unused member functions.
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llvm-svn: 76960
2009-07-24 07:43:59 +00:00
fbcc663cbf
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
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This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
llvm-svn: 75640
2009-07-14 16:55:14 +00:00
56d0659726
assert(0) -> LLVM_UNREACHABLE.
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Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
llvm-svn: 75379
2009-07-11 20:10:48 +00:00
fb8d6d5b58
Implement changes from Chris's feedback.
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Finish converting lib/Target.
llvm-svn: 75043
2009-07-08 20:53:28 +00:00
fa04002254
Convert more abort() calls to llvm_report_error().
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Also remove trailing semicolon.
llvm-svn: 75027
2009-07-08 19:04:27 +00:00
5a16986cfc
Silence warnings when assertions are turned off.
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llvm-svn: 74776
2009-07-03 16:03:33 +00:00
d379e896ff
Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
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llvm-svn: 74580
2009-07-01 01:59:31 +00:00
d5ca70648c
Convert Alpha and Mips to use a MachineFunctionInfo subclass to
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carry GlobalBaseReg, and GlobalRetAddr too in Alpha's case. This
eliminates the need for them to search through the
MachineRegisterInfo livein list in order to identify these
virtual registers. EmitLiveInCopies is now the only user of the
virtual register portion of MachineRegisterInfo's livein data.
llvm-svn: 72802
2009-06-03 20:30:14 +00:00
f7b83c7ae7
Change MachineInstrBuilder::addReg() to take a flag instead of a list of
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booleans. This gives a better indication of what the "addReg()" is
doing. Remembering what all of those booleans mean isn't easy, especially if you
aren't spending all of your time in that code.
I took Jakob's suggestion and made it illegal to pass in "true" for the
flag. This should hopefully prevent any unintended misuse of this (by reverting
to the old way of using addReg()).
llvm-svn: 71722
2009-05-13 21:33:08 +00:00
2af1f85f1f
Factor out the code to add a MachineOperand to a MachineInstrBuilder.
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llvm-svn: 64891
2009-02-18 05:45:50 +00:00
635f2a69d9
Remove non-DebugLoc versions of BuildMI from Alpha and Cell.
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llvm-svn: 64433
2009-02-13 02:30:42 +00:00
baca6ed65e
Check in missing file.
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llvm-svn: 64410
2009-02-12 23:24:44 +00:00
f6d609a227
Move debug loc info along when the spiller creates new instructions.
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llvm-svn: 64342
2009-02-12 00:02:55 +00:00
64dfcacd5f
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
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suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
llvm-svn: 64124
2009-02-09 07:14:22 +00:00
c544cb0eca
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
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llvm-svn: 62600
2009-01-20 19:12:24 +00:00
906152a20f
Tidy up #includes, deleting a bunch of unnecessary #includes.
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llvm-svn: 61715
2009-01-05 17:59:02 +00:00
3f86b51333
Split foldMemoryOperand into public non-virtual and protected virtual
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parts, and add target-independent code to add/preserve
MachineMemOperands.
llvm-svn: 60488
2008-12-03 18:43:12 +00:00
0b2732598c
Add more const qualifiers. This fixes build breakage from r59540.
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llvm-svn: 59542
2008-11-18 19:49:32 +00:00
33332bce17
Const-ify several TargetInstrInfo methods.
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llvm-svn: 57622
2008-10-16 01:49:15 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
27fb3dcbc7
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
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was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
llvm-svn: 55375
2008-08-26 18:03:31 +00:00
4f6bf04616
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API.
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llvm-svn: 54802
2008-08-14 22:49:33 +00:00
3b46030375
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
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MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
2008-07-07 23:14:23 +00:00
7d98a48f15
- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
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- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.
llvm-svn: 53097
2008-07-03 09:09:37 +00:00
0f760dfe09
Fix "Control reaches the end of non-void function" warnings,
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patch by David Chisnall.
llvm-svn: 48963
2008-03-30 18:22:13 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
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llvm-svn: 46893
2008-02-08 21:20:40 +00:00
f0f438a517
remove MachineOpCode typedef.
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llvm-svn: 45679
2008-01-07 02:48:55 +00:00
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
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a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
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Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
c68554683d
Handle blocks with 2 unconditional branches in AnalyzeBranch.
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llvm-svn: 37571
2007-06-13 17:59:52 +00:00
5514bbef46
Add a utility routine to check for unpredicated terminator instruction.
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llvm-svn: 37528
2007-06-08 21:59:56 +00:00
fc94eb66d2
BlockHasNoFallThrough() now returns true if block ends with a return instruction.
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llvm-svn: 37266
2007-05-21 18:44:17 +00:00
99be49dd9b
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
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llvm-svn: 37192
2007-05-18 00:05:48 +00:00
8cd224e81c
Relex assertions to account for additional implicit def / use operands.
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llvm-svn: 36430
2007-04-25 07:12:14 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
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llvm-svn: 32333
2006-12-07 22:21:48 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
dbd3d294e6
Matches MachineInstr changes.
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llvm-svn: 31712
2006-11-13 23:36:35 +00:00
dfbf91e59d
more shotenning
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llvm-svn: 31331
2006-10-31 23:46:56 +00:00
692e4155aa
Add all that branch mangling niftiness
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llvm-svn: 31313
2006-10-31 16:49:55 +00:00
ed32883b27
fix warning about missing newline at end of file
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llvm-svn: 31162
2006-10-24 17:07:11 +00:00
042d56230e
implement uncond branch insertion so alpha works work branchfolding.
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llvm-svn: 31158
2006-10-24 16:41:36 +00:00
43e569c95f
these are copies too
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llvm-svn: 26653
2006-03-09 18:18:51 +00:00
1318240fd0
isStoreToStackSlot
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llvm-svn: 25925
2006-02-03 03:07:37 +00:00
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Dan Gohman