Commit Graph

146834 Commits

Author SHA1 Message Date
Duncan Sands e1aa194aab There is no longer any need to silence this compiler warning as the warning has
been turned off globally.

llvm-svn: 178451
2013-03-31 17:44:09 +00:00
Hal Finkel 8540f7771c Cleanup ImmToIdxMap and noImmForm in PPCRegisterInfo
ImmToIdxMap should be a DenseMap (not a std::map) because there
is no ordering requirement. Also, we don't need a separate list
of instructions for noImmForm in eliminateFrameIndex, because this
list is essentially the complement of the keys in ImmToIdxMap.

No functionality change intended.

llvm-svn: 178450
2013-03-31 14:43:31 +00:00
Benjamin Kramer b60633fb87 X86: Promote sitofp <8 x i16> to <8 x i32> when AVX is available.
A vector sext + sitofp is a lot cheaper than 8 scalar conversions.

llvm-svn: 178448
2013-03-31 12:49:15 +00:00
Hal Finkel beb296bea1 Add the PPC lfiwax instruction
This instruction is available on modern PPC64 CPUs, and is now used
to improve the SINT_TO_FP lowering (by eliminating the need for the
separate sign extension instruction and decreasing the amount of
needed stack space).

llvm-svn: 178446
2013-03-31 10:12:51 +00:00
Hal Finkel e53429a13e Cleanup PPC(64) i32 -> float/double conversion
The existing SINT_TO_FP code for i32 -> float/double conversion was disabled
because it relied on broken EXTSW_32/STD_32 instruction definitions. The
original intent had been to enable these 64-bit instructions to be used on CPUs
that support them even in 32-bit mode.  Unfortunately, this form of lying to
the infrastructure was buggy (as explained in the FIXME comment) and had
therefore been disabled.

This re-enables this functionality, using regular DAG nodes, but only when
compiling in 64-bit mode. The old STD_32/EXTSW_32 definitions (which were dead)
are removed.

llvm-svn: 178438
2013-03-31 01:58:02 +00:00
Rafael Espindola b49ec5d0aa Remove unused default values.
llvm-svn: 178435
2013-03-30 23:04:08 +00:00
Benjamin Kramer 9335443236 DAGCombine: visitXOR can replace a node without returning it, bail out in that case.
Fixes the crash reported in PR15608.

llvm-svn: 178429
2013-03-30 21:28:18 +00:00
Justin Holewinski 45df882045 Add start of user documentation for NVPTX
Summary: This is the beginning of user documentation for the NVPTX back-end.  I want to ensure I am integrating this properly into the rest of the LLVM documentation.

Differential Revision: http://llvm-reviews.chandlerc.com/D600

llvm-svn: 178428
2013-03-30 16:41:14 +00:00
Benjamin Kramer 9c9e0a2c04 Change '@SECREL' suffix to GAS-compatible '@SECREL32'.
'@SECREL' is what is used by the Microsoft assembler, but GNU as expects '@SECREL32'.
With the patch, the MC-generated code works fine in combination with a recent GNU as (2.23.51.20120920 here).

Patch by David Nadlinger!
Differential Revision: http://llvm-reviews.chandlerc.com/D429

llvm-svn: 178427
2013-03-30 16:21:50 +00:00
Sean Silva 2a74699dd5 [docs] llvmbugs is not the place for patches.
llvm-svn: 178426
2013-03-30 15:33:02 +00:00
Sean Silva ab4997d0ec [docs] Annotate mailing lists with their "name".
Nobody says "the developer's list" or "commits archive"; they always say
"llvmdev" or "llvm-commits". It makes sense for our documentation to
at least make that association explicitly.

llvm-svn: 178425
2013-03-30 15:33:01 +00:00
Sean Silva 84b296c8d1 [docs] Reorganize mailing lists.
Order them roughly by "which one should a newbie join first".

llvm-svn: 178424
2013-03-30 15:32:54 +00:00
Sean Silva 0129924384 [docs] Pull IRC and Mailing Lists under a new "Community" heading.
llvm-svn: 178423
2013-03-30 15:32:51 +00:00
Sean Silva 163b5c4bd5 [docs] The GEP FAQ is not "design and overview"
llvm-svn: 178422
2013-03-30 15:32:50 +00:00
Sean Silva 9d205c8edc [docs] Put DeveloperPolicy under "Development Process Documentation"
llvm-svn: 178421
2013-03-30 15:32:47 +00:00
Benjamin Kramer a73cc5eead Put private class into an anonmyous namespace.
llvm-svn: 178420
2013-03-30 15:23:08 +00:00
Justin Holewinski 91203e8468 Remove old NVPTX cpus and add new NVPTX cpus
llvm-svn: 178419
2013-03-30 14:38:26 +00:00
Justin Holewinski 368374308d Use kernel metadata to differentiate between kernel and device
functions for the NVPTX target.

llvm-svn: 178418
2013-03-30 14:38:24 +00:00
Justin Holewinski 59fd8ba5f5 [NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.
llvm-svn: 178417
2013-03-30 14:29:30 +00:00
Justin Holewinski b94bd05b95 [NVPTX] Add NVVMReflect pass to allow compile-time selection of
specific code paths.

This allows us to write code like:

  if (__nvvm_reflect("FOO"))
    // Do something
  else
    // Do something else

and compile into a library, then give "FOO" a value at kernel
compile-time so the check becomes a no-op.

llvm-svn: 178416
2013-03-30 14:29:25 +00:00
Justin Holewinski 0497ab142d [NVPTX] Run clang-format on all NVPTX sources.
Hopefully this resolves any outstanding style issues and gives us
an automated way of ensuring we conform to the style guidelines.

llvm-svn: 178415
2013-03-30 14:29:21 +00:00
Hal Finkel 7d4585973a Add support for gcc-compatible -mfprnd -mno-fprnd PPC options
gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target
feature; support these options as well.

llvm-svn: 178414
2013-03-30 13:47:44 +00:00
Benjamin Kramer 06c44dce73 Object: Turn a couple of degenerate for loops into while loops.
No functionality change.

llvm-svn: 178413
2013-03-30 13:07:51 +00:00
Benjamin Kramer 0345f9f900 Sema: Don't crash when trying to emit a precedence warning on postinc/decrement.
Post-Inc can occur as a binary call (the infamous dummy int argument), but it's
not really a binary operator.

Fixes PR15628.

llvm-svn: 178412
2013-03-30 11:56:00 +00:00
Sean Callanan 6447c47541 Elide all artificial copy constructors, because
they are probably trivial.  This means that we
don't confuse Clang about whether a class is
trivially copy constructible.  It can figure
that out itself as long as we don't explicitly
feed it the constructors.

If the class is trivially copy-constructible,
this can change the ABI that Clang uses to call
functions that return that class (e.g., by making
the object be returned in a register), so this
is quite important for correctness.

<rdar://problem/13457741>

llvm-svn: 178411
2013-03-30 03:06:45 +00:00
Sean Callanan e55bc8a9c1 Fixed the way ClangASTImporter deports types from
ASTContexts that will not stay around.  Before, we
did this in a very half-hearted way.  Now we maintain
work queues of all Decls that need to be completed
before the source ASTContext can go away; we then
expunge their origins completely.

<rdar://problem/13511875>

llvm-svn: 178410
2013-03-30 02:31:21 +00:00
Shuxin Yang 7b0c94e207 Implement XOR reassociation. It is based on following rules:
rule 1: (x | c1) ^ c2 => (x & ~c1) ^ (c1^c2),
     only useful when c1=c2
  rule 2: (x & c1) ^ (x & c2) = (x & (c1^c2))
  rule 3: (x | c1) ^ (x | c2) = (x & c3) ^ c3 where c3 = c1 ^ c2
  rule 4: (x | c1) ^ (x & c2) => (x & c3) ^ c1, where c3 = ~c1 ^ c2

 It reduces an application's size (in terms of # of instructions) by 8.9%.
 Reviwed by Pete Cooper. Thanks a lot!

 rdar://13212115  

llvm-svn: 178409
2013-03-30 02:15:01 +00:00
Akira Hatanaka b3c1847b30 [mips] Add patterns for DSP indexed load instructions.
llvm-svn: 178408
2013-03-30 02:14:45 +00:00
Akira Hatanaka b1457304cc [mips] Define reg+imm load/store pattern templates.
llvm-svn: 178407
2013-03-30 02:01:48 +00:00
Akira Hatanaka fb221c197d [mips] Fix DSP instructions to have explicit accumulator register operands.
Check that instruction selection can select multiply-add/sub DSP instructions
from a pattern that doesn't have intrinsics.

llvm-svn: 178406
2013-03-30 01:58:00 +00:00
Akira Hatanaka 33c060480d Remove unused variables.
llvm-svn: 178405
2013-03-30 01:46:28 +00:00
Akira Hatanaka 9efcd76c2c [mips] Move the code which does dag-combine for multiply-add/sub nodes to
derived class MipsSETargetLowering.

We shouldn't be generating madd/msub nodes if target is Mips16, since Mips16
doesn't have support for multipy-add/sub instructions.

llvm-svn: 178404
2013-03-30 01:42:24 +00:00
Akira Hatanaka be8612f6f4 [mips] Fix definitions of multiply, multiply-add/sub and divide instructions.
The new instructions have explicit register output operands and use table-gen
patterns instead of C++ code to do instruction selection.

Mips16's instructions are unaffected by this change.

llvm-svn: 178403
2013-03-30 01:36:35 +00:00
Jordan Rose b8cb8359ce [analyzer] Restructure ExprEngine::VisitCXXNewExpr to do a bit less work.
No functionality change.

llvm-svn: 178402
2013-03-30 01:31:48 +00:00
Jordan Rose 8f6b4b043a [analyzer] Handle caching out while evaluating a C++ new expression.
Evaluating a C++ new expression now includes generating an intermediate
ExplodedNode, and this node could very well represent a previously-
reachable state in the ExplodedGraph. If so, we can short-circuit the
rest of the evaluation.

Caught by the assertion a few lines later.

<rdar://problem/13510065>

llvm-svn: 178401
2013-03-30 01:31:42 +00:00
Jordan Rose 6fdef11c17 [analyzer] Add debug helper LocationContext::dumpStack().
Sample output:
  #0 void construct(pointer __p, llvm::ImutAVLTree<llvm::ImutContainerInfo<clang::ento::BugType *> > *const &__val)
  #1 void push_back(const value_type &__x)
  #2 void destroy()
  #3 void release()
  #4 void ~ImmutableSet()

llvm-svn: 178400
2013-03-30 01:31:35 +00:00
Sean Callanan 42f26b488b Disable warnings from Clang correctly, by directly
manipulating the diagnostics engine.

<rdar://problem/13508470>

llvm-svn: 178399
2013-03-30 01:26:06 +00:00
Anton Yartsev 5bfcb2f0ef [analyzer] Garbage removed
llvm-svn: 178398
2013-03-30 01:24:21 +00:00
Anton Yartsev ae3630b011 [analyzer] Test added
llvm-svn: 178397
2013-03-30 01:22:45 +00:00
Akira Hatanaka f0ea500c14 [mips] Remove function getFPBranchCodeFromCond. Rename invertFPCondCodeAdd.
llvm-svn: 178396
2013-03-30 01:16:38 +00:00
Akira Hatanaka d5a0e096bc Fix indentation.
llvm-svn: 178395
2013-03-30 01:15:17 +00:00
Akira Hatanaka 28721bd7dd [mips] Add mips-specific nodes which will be used to select multiply and divide
instructions.

llvm-svn: 178394
2013-03-30 01:14:04 +00:00
Akira Hatanaka 3a34d14745 [mips] Implement getRepRegClassFor in MipsSETargetLowering. This function is
called in several places in ScheduleDAGRRList.cpp.

llvm-svn: 178393
2013-03-30 01:12:05 +00:00
Akira Hatanaka cd77e15cfb [mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStack
to handle accumulator registers.

llvm-svn: 178392
2013-03-30 01:08:05 +00:00
Akira Hatanaka 3b70145184 [mips] Expand pseudo load, store and copy instructions right before
callee-saved scan.

The code makes use of register's scavenger's capability to spill multiple
registers.

llvm-svn: 178391
2013-03-30 01:04:11 +00:00
Akira Hatanaka c8d85025a0 [mips] Define pseudo instructions for spilling and copying accumulator
registers.

llvm-svn: 178390
2013-03-30 00:54:52 +00:00
Enrico Granata 3a193f4b11 Fixing Python commands test cases to work even after removing Printf
(and using the new syntax for printing :-)

llvm-svn: 178389
2013-03-30 00:53:13 +00:00
Anton Yartsev 3dfc33e3ac [analyzer] Enabled unix.Malloc checker.
+ Refactoring.

llvm-svn: 178388
2013-03-30 00:50:37 +00:00
Anton Yartsev fa637577f9 [analyzer] Tests for intersections with other checkers from MallocChecker.cpp factored out to NewDelete-intersections.mm
llvm-svn: 178387
2013-03-30 00:43:02 +00:00
Eric Christopher 4887c8f4ff Use SmallVectorImpl instead of SmallVector at the uses.
llvm-svn: 178386
2013-03-29 23:34:06 +00:00