Matt Arsenault
|
93311a9812
|
AMDGPU/GlobalISel: Fix custom lowering of llvm.trunc.f64 for SI
This was missing an operand from BFE and not erasing the original
instruction.
|
2020-07-20 10:06:18 -04:00 |
Matt Arsenault
|
df5c2159d0
|
AMDGPU/GlobalISel: Legalize some 16-bit round instructions
|
2019-12-24 09:53:01 -05:00 |
Matt Arsenault
|
6aebcd5499
|
AMDGPU/GlobalISel: Legalize G_INTRINSIC_TRUNC
llvm-svn: 361027
|
2019-05-17 12:20:01 +00:00 |
Matt Arsenault
|
2e5f900849
|
GlobalISel: fewerElementsVector for intrinsic_trunc/intrinsic_round
llvm-svn: 352298
|
2019-01-27 00:12:21 +00:00 |
Matt Arsenault
|
f4c21c575a
|
AMDGPU/GlobalISel: RegBankSelect for some fp ops
llvm-svn: 349880
|
2018-12-21 03:14:45 +00:00 |