Commit Graph

116490 Commits

Author SHA1 Message Date
Reid Kleckner 97b7e26d13 Disable failing TestDevNull test on Windows
llvm-svn: 236126
2015-04-29 16:54:11 +00:00
Adrian Prantl ba6ec4b70b Temporarily relax a check in the debug info verifier.
The clang frontend helps out GDB by emitting the members of local anonymous
unions as artificial local variables with shared storage. When SROA splits
the storage for artificial local variables that are smaller than the entire
union, the overhang piece will be outside of the allotted space for the
variable and this check fails.

rdar://problem/20730771

llvm-svn: 236124
2015-04-29 16:52:17 +00:00
Reid Kleckner c695471365 [X86] Avoid mangling frameescape labels
x86 Windows uses the '_' prefix for all global symbols, and this was
mistakenly being applied to frameescape labels, which are not externally
visible global symbols. They use the private global prefix 'L'.

The *right* way to fix this is probably to stop masquerading this label
as an ExternalSymbol and create a new SDNode type. These labels are not
"external", and we know they will be resolved by assembly time. Having a
custom SDNode type would allow us to do better X86 address mode
matching, so it's probably worth doing eventually.

llvm-svn: 236123
2015-04-29 16:46:01 +00:00
Duncan P. N. Exon Smith a9308c49ef IR: Give 'DI' prefix to debug info metadata
Finish off PR23080 by renaming the debug info IR constructs from `MD*`
to `DI*`.  The last of the `DIDescriptor` classes were deleted in
r235356, and the last of the related typedefs removed in r235413, so
this has all baked for about a week.

Note: If you have out-of-tree code (like a frontend), I recommend that
you get everything compiling and tests passing with the *previous*
commit before updating to this one.  It'll be easier to keep track of
what code is using the `DIDescriptor` hierarchy and what you've already
updated, and I think you're extremely unlikely to insert bugs.  YMMV of
course.

Back to *this* commit: I did this using the rename-md-di-nodes.sh
upgrade script I've attached to PR23080 (both code and testcases) and
filtered through clang-format-diff.py.  I edited the tests for
test/Assembler/invalid-generic-debug-node-*.ll by hand since the columns
were off-by-three.  It should work on your out-of-tree testcases (and
code, if you've followed the advice in the previous paragraph).

Some of the tests are in badly named files now (e.g.,
test/Assembler/invalid-mdcompositetype-missing-tag.ll should be
'dicompositetype'); I'll come back and move the files in a follow-up
commit.

llvm-svn: 236120
2015-04-29 16:38:44 +00:00
Jan Vesely 7539548738 CodeGen: Default overflow operations to expand so we don't have to assume targets are lying
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: ab
Differential Revision: http://reviews.llvm.org/D9265

llvm-svn: 236119
2015-04-29 16:30:46 +00:00
Zoran Jovanovic cca29e8f6e [mips][microMIPSr6] Implement SUB and SUBU instructions
Differential Revision: http://reviews.llvm.org/D8764

llvm-svn: 236118
2015-04-29 16:22:46 +00:00
Zoran Jovanovic 5f34d44354 [mips][microMIPSr6] Implement ADD, ADDU and ADDIU instructions
Differential Revision: http://reviews.llvm.org/D8704

llvm-svn: 236111
2015-04-29 15:11:07 +00:00
James Y Knight c09bdfa4cb Sparc: Prefer reg+reg address encoding when only one register used.
Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.

Futhermore, reg+imm is invalid for the (not yet supported) "alternate
address space" instructions.

Differential Revision: http://reviews.llvm.org/D8753

llvm-svn: 236107
2015-04-29 14:54:44 +00:00
Rafael Espindola c54a0d0bf4 Relax assert to avoid spurious failures with /dev/null.
llvm-svn: 236106
2015-04-29 14:53:25 +00:00
Vasileios Kalintiris 1249e74648 Mips fast-isel - handle functions which return i8 or i6 .
Summary: Allow Mips fast-isel to handle functions which return i8/i16 signed/unsigned.

Test Plan:
Make check tests are forthcoming.
Already passes test-suite at O0/O2 for Mips 32 r1/r2

Reviewers: dsanders, rkotler

Subscribers: llvm-commits, rfuhler

Differential Revision: http://reviews.llvm.org/D6765

llvm-svn: 236103
2015-04-29 14:17:14 +00:00
Rafael Espindola cad91323dc Don't constrain the section order in tests that don't depend on it.
llvm-svn: 236102
2015-04-29 13:55:07 +00:00
Daniel Sanders 301f937765 [mips] Correct 128-bit shifts on 64-bit targets.
Summary:
The existing code was correct for 32-bit GPR's but not 64-bit GPR's. It now
accounts for both cases.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D9337

llvm-svn: 236099
2015-04-29 12:28:58 +00:00
Toma Tabacu 79588100d7 [mips] [IAS] Inline assemble-time shifting out of createLShiftOri. NFC.
Summary:
Do the assemble-time shifts from createLShiftOri at the source, which groups all the shifting together, closer to the main logic path, and
store the results in concisely-named variables to improve code clarity.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8973

llvm-svn: 236096
2015-04-29 10:19:56 +00:00
Elena Demikhovsky a9f20495a2 fixed 80-chars; NFC
llvm-svn: 236093
2015-04-29 08:49:57 +00:00
Elena Demikhovsky ac969012ef Fixed masked gather/scatter switch-case
llvm-svn: 236092
2015-04-29 08:38:53 +00:00
Craig Topper 119998dbf1 [TableGen] Use range-based for loops. NFC.
llvm-svn: 236089
2015-04-29 07:13:14 +00:00
Craig Topper 39ba33b8f0 [TableGen] Fold a couple dyn_casts into the ifs that check their results. NFC
llvm-svn: 236088
2015-04-29 07:13:12 +00:00
Craig Topper ed5a950808 [TableGen] Replace some dyn_casts followed by an assert with just a regular cast which asserts internally. NFC
llvm-svn: 236087
2015-04-29 07:13:05 +00:00
Elena Demikhovsky 744fe0de33 fixed comments, blanks, nullptr; NFC
llvm-svn: 236086
2015-04-29 06:49:50 +00:00
Craig Topper eb4d7c6b70 [TableGen] Use range-based for loops. NFC
llvm-svn: 236083
2015-04-29 04:43:36 +00:00
Hans Wennborg ccc8c2477a Drop Dragonegg from the release export script
Follow-up to r236077.

llvm-svn: 236081
2015-04-29 02:36:43 +00:00
Filipe Cabecinhas 6fe8aabd45 Use an "early return" idiom for the error case. NFC
llvm-svn: 236080
2015-04-29 02:36:08 +00:00
Filipe Cabecinhas d8a1bcd0ad Check that we have a valid PointerType element type before calling get()
Same as r236073 but for PointerType.

Bug found with AFL fuzz.

llvm-svn: 236079
2015-04-29 02:27:28 +00:00
Filipe Cabecinhas 52d42c725a Use the ArrayType member function for array element types.
ArrayType and StructType accept the same types, so no test.

llvm-svn: 236078
2015-04-29 02:27:21 +00:00
Hans Wennborg 99ebb31283 Drop Dragonegg support from the release script
It doesn't have a maintainer and none of the release testers test it,
so I don't think it should be part of the release.

http://reviews.llvm.org/D9331

llvm-svn: 236077
2015-04-29 02:14:26 +00:00
Filipe Cabecinhas 1351cba720 Turn an assert into report_fatal_error since it's reachable based on user input
Bug found with AFL fuzz.

llvm-svn: 236076
2015-04-29 01:58:31 +00:00
Lang Hames f3a8362bf2 [Orc] It's not valid to pass a null resolver to addModuleSet. Use a no-op
resolver with a diagnostic instread.

llvm-svn: 236074
2015-04-29 01:33:35 +00:00
Filipe Cabecinhas f15fb032ef Make sure that isValidElementType(Type) before calling {Array,Struct}Type::get(Type)
Bug found with AFL fuzz.

llvm-svn: 236073
2015-04-29 01:27:01 +00:00
Matthias Braun 5295793bca RegisterCoalescer: hide terminal rule option by default
llvm-svn: 236062
2015-04-28 23:55:11 +00:00
Hans Wennborg bb66f202eb test-release.sh: Drop some unused command-line options.
These haven't done anything since before r142165.

llvm-svn: 236061
2015-04-28 23:37:41 +00:00
Rafael Espindola 89feff3b76 Map directly from signature symbol to group index. NFC.
llvm-svn: 236058
2015-04-28 22:59:58 +00:00
Eric Christopher 0ba41a6841 Reuse a lookup in an assert.
llvm-svn: 236054
2015-04-28 22:38:35 +00:00
Rafael Espindola cf6d5a9f94 Remove redundant temporary std::vector.
New sections are added to the end of the list, so the RelSections array was
redundant.

llvm-svn: 236053
2015-04-28 22:26:19 +00:00
Tim Northover e18d662201 ARM: fix peephole optimisation of TST
We were trying to look through COPY instructions, but only to the next
instruction in a BB and incorrectly anyway. The cases where that would actually
be a good idea are rare enough (and not even tested!) that it's not worth
trying to get right.

rdar://20721342

llvm-svn: 236050
2015-04-28 22:03:55 +00:00
Rafael Espindola 41920d0382 Avoid one more walk over all sections. NFC.
Set the group section index as they are created.

llvm-svn: 236049
2015-04-28 22:03:22 +00:00
Andrew Kaylor 91307434f4 Style updates
llvm-svn: 236048
2015-04-28 22:01:51 +00:00
Rafael Espindola fac3fbc5ff Use a range loop. NFC.
llvm-svn: 236047
2015-04-28 21:58:05 +00:00
Andrew Kaylor 046f7b42f2 [WinEH] Split blocks at calls to llvm.eh.begincatch
Differential Revision: http://reviews.llvm.org/D9311

llvm-svn: 236046
2015-04-28 21:54:14 +00:00
Rafael Espindola 8a90d87d76 Avoid an extra walk over the sections just to assign sections to groups.
Assign the sections in the same pass we compute the index.

llvm-svn: 236045
2015-04-28 21:52:33 +00:00
James Y Knight e8da8096ec Sparc: Add alternate aliases for conditional branch instructions.
llvm-svn: 236042
2015-04-28 21:27:31 +00:00
Reid Kleckner 2e49c605ad [SEH] Add an LLVM intrinsic for _exception_info
Eventually, we will lower this out during IR preparation.

llvm-svn: 236036
2015-04-28 21:20:42 +00:00
Rafael Espindola 55a3afb418 Remove the GroupMapTy DenseMap. NFC.
Instead use the Group symbol of MCSectionELF.

llvm-svn: 236033
2015-04-28 21:07:28 +00:00
Sanjay Patel 2fbc4e5c49 transform fadd chains to increase parallelism
This is a compromise: with this simple patch, we should always handle a chain of exactly 3
operations optimally, but we're not generating the optimal balanced binary tree for a longer
sequence.

In general, this transform will reduce the dependency chain for a sequence of instructions
using N operands from a worst case N-1 dependent operations to N/2 dependent operations. 
The optimal balanced binary tree would reduce the chain to log2(N).

The trade-off for not dealing with longer sequences is: (1) we have less complexity in the
compiler, (2) we avoid unknown compile-time blowup calculating a balanced tree, and (3) we
don't need to worry about the increased register pressure required to parallelize longer
sequences. It also seems unlikely that we would ever encounter really long strings of
dependent ops like that in the wild, but I'm not sure how to verify that speculation.
FWIW, I see no perf difference for test-suite running on btver2 (x86-64) with -ffast-math
and this patch.

We can extend this patch to cover other associative operations such as fmul, fmax, fmin, 
integer add, integer mul.

This is a partial fix for:
https://llvm.org/bugs/show_bug.cgi?id=17305

and if extended:
https://llvm.org/bugs/show_bug.cgi?id=21768
https://llvm.org/bugs/show_bug.cgi?id=23116

The issue also came up in:
http://reviews.llvm.org/D8941

Differential Revision: http://reviews.llvm.org/D9232

llvm-svn: 236031
2015-04-28 21:03:22 +00:00
Alexei Starovoitov 659ece9ddb [bpf] fix build
Patch by Brenden Blanco.

llvm-svn: 236030
2015-04-28 20:38:56 +00:00
Rafael Espindola ad3cfaaa20 Use range loops. NFC.
llvm-svn: 236028
2015-04-28 20:23:35 +00:00
Filipe Cabecinhas b435d0f439 Relax an assert when there's a type mismatch in forward references
Summary:
We don't seem to need to assert here, since this function's callers expect
to get a nullptr on error. This way we don't assert on user input.

Bug found with AFL fuzz.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9308

llvm-svn: 236027
2015-04-28 20:18:47 +00:00
Rafael Espindola e3ff9305cd Avoid adding to SectionIndexMap sections that we never lookup. NFC.
llvm-svn: 236026
2015-04-28 20:09:13 +00:00
Daniel Berlin ec1de3fb19 Make getModRefInfo(Instruction *) not crash on certain types of instructions
llvm-svn: 236023
2015-04-28 19:19:14 +00:00
Rafael Espindola 163f672cd5 Use a range loop. NFC.
llvm-svn: 236015
2015-04-28 19:07:16 +00:00
Sanjay Patel f75ee4dc07 [x86] remove RCPPS and RSQRTPS intrinsic instruction definitions
We don't need codegen-only intrinsic instructions for the vector forms of these instructions.

This makes the reciprocal estimate instruction lowering identical to how we handle normal
square roots: (V)SQRTPS / (V)SQRTPD.

No existing regression tests fail with this patch.

Differential Revision: http://reviews.llvm.org/D9301

llvm-svn: 236013
2015-04-28 18:48:45 +00:00