79a45a839c
Define a new sub-register index sub_32 for accessing the 32-bit sub-register of
...
a 64-bit integer register. Move the subreg index definitions to the beginning
of the file.
llvm-svn: 140319
2011-09-22 17:57:32 +00:00
a58fde665a
Use the C personality function instead of the C++ personality function.
...
llvm-svn: 140318
2011-09-22 17:56:40 +00:00
35b7fe8c25
Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or
...
VK_Mips_GPOFF_LO.
llvm-svn: 140316
2011-09-22 17:44:37 +00:00
da33066424
Add F31 to the set of callee-saved registers.
...
llvm-svn: 140315
2011-09-22 17:35:03 +00:00
cf9c4f80ba
Fix typo.
...
llvm-svn: 140313
2011-09-22 17:26:58 +00:00
efc211d977
PTX: Remove physical register defs
...
llvm-svn: 140310
2011-09-22 16:45:48 +00:00
43787cd447
PTX: Use .param space for device function return values on SM 2.0+, and attempt
...
to fix up parameter passing on SM < 2.0
llvm-svn: 140309
2011-09-22 16:45:46 +00:00
ae10a30386
PTX: Fix style issues
...
llvm-svn: 140308
2011-09-22 16:45:43 +00:00
8bc34e72e9
PTX: Fixup codegen to handle emission of virtual registers.
...
llvm-svn: 140307
2011-09-22 16:45:40 +00:00
47423e4fb9
PTX: Customize codegen passes in backend
...
llvm-svn: 140306
2011-09-22 16:45:37 +00:00
28a548ebe3
PTX: Add new PTX-specific register allocator that keeps virtual registers
...
instead of allocating physical registers.
This is part of a work-in-progress overhaul of the PTX register allocation scheme.
llvm-svn: 140305
2011-09-22 16:45:33 +00:00
6d1872b77a
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
...
llvm-svn: 140299
2011-09-22 07:01:50 +00:00
3d10b95bf7
Add definition of 64-bit floating registers used for Mips64.
...
llvm-svn: 140297
2011-09-22 03:48:47 +00:00
cfd26cd744
The SSE version differences for fmin/fmax are more involved than I thought.
...
- x87: no min or max.
- SSE1: min/max for single precision scalars and vectors.
- SSE2: min/max for single and double precision scalars and vectors.
- AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check)
llvm-svn: 140296
2011-09-22 03:27:22 +00:00
25ce3647e5
Add enums and functions for symbols Mips64 uses.
...
llvm-svn: 140295
2011-09-22 03:09:07 +00:00
dc397a6402
X86: Don't form min/max nodes if the target is missing SSE.
...
llvm-svn: 140294
2011-09-22 03:01:42 +00:00
dc7baed9d3
Mips64 aligns stack on 16-byte boundary.
...
llvm-svn: 140292
2011-09-22 02:53:37 +00:00
6a5f8b2fd4
Remove unnecessary condition check.
...
llvm-svn: 140291
2011-09-22 02:41:29 +00:00
fbe52c0192
Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.
...
llvm-svn: 140284
2011-09-21 23:53:44 +00:00
f52c68f0ca
Print out immediate offset versions of PC-relative load/store instructions as [pc, #123 ] rather than simply #123 .
...
llvm-svn: 140283
2011-09-21 23:44:46 +00:00
5e6b65cf0d
Do not unnecessarily use AT_specification DIE because it does not add any value.
...
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.
llvm-svn: 140282
2011-09-21 23:41:11 +00:00
ef65f002df
Fix for DbgInfoPrinter.cpp:174:12: warning: ‘LineNo’ may be used uninitialized in this function.
...
llvm-svn: 140281
2011-09-21 23:34:23 +00:00
f4bbc0416f
The last verification check for the new EH model.
...
This makes sure that the unwind destination of an invoke is a landing pad.
llvm-svn: 140280
2011-09-21 22:57:02 +00:00
7b3fc8ee38
Attempt to update the shadow stack GC pass to the new EH model.
...
This inserts a cleanup landingpad instruction and a resume to mimic the old
unwind instruction.
llvm-svn: 140277
2011-09-21 22:14:28 +00:00
e5e189f669
X86Disassembler: if verbose logging is going to nulls(), disable logging completely.
...
Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.
llvm-svn: 140276
2011-09-21 21:47:35 +00:00
098f5a2911
Tidy up. Whitepsace.
...
llvm-svn: 140275
2011-09-21 21:36:53 +00:00
eee3afcb86
Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile.
...
patch contributed by Jia Liu!
llvm-svn: 140273
2011-09-21 19:23:46 +00:00
bcc3fadad9
These do not need to be conditional on the presence of CommentStream, as they have a fallback path now.
...
llvm-svn: 140267
2011-09-21 17:58:45 +00:00
1b185f4c65
Undo a change made in r140254.
...
MipsArchVersion needs to be initialized to Mips32.
llvm-svn: 140261
2011-09-21 17:31:45 +00:00
2eeb4e5bd4
DWARF: avoid unnecessary map lookups.
...
llvm-svn: 140260
2011-09-21 17:31:42 +00:00
50f123d8e5
fix comment
...
llvm-svn: 140258
2011-09-21 17:14:40 +00:00
bcc7a92e53
MipsArchVersion does not need to be in the initialization list and MipsABI
...
should be initialized to UnknownABI.
llvm-svn: 140254
2011-09-21 16:41:43 +00:00
bc9ba30158
[VECTOR-SELECT] Address one of the bugs in pr10902.
...
Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.
llvm-svn: 140249
2011-09-21 14:34:38 +00:00
c1cd8506ce
Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995.
...
llvm-svn: 140246
2011-09-21 08:45:10 +00:00
a318b8dce6
Change:
...
assert(!"error message");
To:
assert(0 && "error message");
which is more consistant across the code base.
llvm-svn: 140234
2011-09-21 03:09:09 +00:00
3d673cc323
Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
...
llvm-svn: 140233
2011-09-21 03:00:58 +00:00
6de4d12120
Set ABI if it hasn't been set on the command line.
...
Check if architecture & ABI combination is valid.
llvm-svn: 140230
2011-09-21 02:45:29 +00:00
6e506eb57d
Fix typo.
...
llvm-svn: 140229
2011-09-21 02:24:25 +00:00
924123acb3
Lower ARM adds/subs to add/sub after adding optional CPSR operand.
...
This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.
llvm-svn: 140228
2011-09-21 02:20:46 +00:00
3f1fdf1b31
whitespace
...
llvm-svn: 140227
2011-09-21 02:17:37 +00:00
69fa8ffeef
In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.
...
llvm-svn: 140217
2011-09-21 00:25:23 +00:00
bb49e721b8
Change the names of functions isMips* to hasMips*.
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llvm-svn: 140214
2011-09-20 23:53:09 +00:00
1815b688cc
Make sure IPSCCP never marks a tracked call as overdefined in SCCPSolver::ResolvedUndefsIn. If we do, we can end up in a situation where a function is resolved to return a constant, but the caller is marked overdefined, which confuses the code later.
...
<rdar://problem/9956541> (again).
llvm-svn: 140210
2011-09-20 23:28:51 +00:00
6cb23f6e7f
Add a DAGCombine for subvector extracts to remove useless chains of
...
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.
llvm-svn: 140204
2011-09-20 23:19:33 +00:00
8058234b32
Revert r140097, working on a better approach
...
llvm-svn: 140203
2011-09-20 23:19:29 +00:00
5227ea6028
lib/Linker: add support of deps which does not end with ".so".
...
It happens (for example) when you want to have a dependency on the .so
with the specific version, like liblzma.so.1.0.0 or
libcrypto.so.0.9.8.
llvm-svn: 140201
2011-09-20 22:52:35 +00:00
f7638e1e51
Simplify max/minp[s|d] dagcombine matching
...
llvm-svn: 140199
2011-09-20 22:34:45 +00:00
a6e1c51ed7
Relax this condition.
...
Some passes require breaking critical edges before they're called. Don't
segfault because of that.
llvm-svn: 140196
2011-09-20 22:28:17 +00:00
04289fcad8
Place the check for an exit landing pad where it will be run on both code paths through the if-then-else.
...
llvm-svn: 140195
2011-09-20 22:27:16 +00:00
0058520770
Omit extracting a loop if one of the exits is a landing pad.
...
The landing pad must accompany the invoke when it's extracted. However, if it
does, then the loop isn't properly extracted. I.e., the resulting extraction has
a loop in it. The extracted function is then extracted, etc. resulting in an
infinite loop.
llvm-svn: 140193
2011-09-20 22:23:09 +00:00
49621cb209
Remove the hack to check UNAME_RELEASE when identifying the Darwin version.
...
This was only needed to locate llvm-gcc's installation directory when clang
falls back to run llvm-gcc for i386 kexts. As of clang svn r140187, we're
now just searching paths with several different Darwin versions on either
side of the current version, so this is no longer needed.
llvm-svn: 140188
2011-09-20 22:05:56 +00:00
60aa85b672
Tidy up a bit more, fix tab and remove trailing whitespaces
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llvm-svn: 140186
2011-09-20 21:45:26 +00:00
33e91a6cf7
The wrong relocation was being emitted for several SSSE3 instructions.
...
This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.
llvm-svn: 140184
2011-09-20 21:39:21 +00:00
05f3f4939a
Tidy up code!
...
llvm-svn: 140183
2011-09-20 21:39:06 +00:00
61a003315e
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
...
llvm-svn: 140181
2011-09-20 21:38:18 +00:00
2b37261fd6
Initial Mips64 support. Patch by Liu with some modifications.
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llvm-svn: 140178
2011-09-20 20:28:08 +00:00
3d48f59231
Check the terminator, not the basic block.
...
llvm-svn: 140176
2011-09-20 20:20:50 +00:00
c1da6ea344
When extracting a basic block that ends in an 'invoke' instruction, we need to
...
extract its associated landing pad block as well. However, that landing pad
block may have more than one predecessor. So split the landing pad block so that
individual landing pads have only one predecessor.
This type of transformation may produce a false positive with bugpoint.
llvm-svn: 140173
2011-09-20 19:10:24 +00:00
fc1176e061
Use ArrayRef instead of an explicit 'const std::vector &'.
...
llvm-svn: 140172
2011-09-20 19:05:04 +00:00
7d06f5cdd4
If simple ownership works then friendship is not required.
...
llvm-svn: 140169
2011-09-20 18:48:56 +00:00
1bfe55a378
Use ArrayRef instead of 'const std::vector' to pass around the list of basic blocks to extract.
...
llvm-svn: 140168
2011-09-20 18:42:07 +00:00
add1f17575
Update GCOVLines to provide interfaces to write line table and calculate complete length.
...
llvm-svn: 140167
2011-09-20 18:35:00 +00:00
c98ac850eb
U is good enough
...
llvm-svn: 140166
2011-09-20 18:33:29 +00:00
9a2ba72c49
Fix comments.
...
llvm-svn: 140164
2011-09-20 18:24:46 +00:00
52363bdbeb
Restore hasPostISelHook tblgen flag.
...
No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.
llvm-svn: 140160
2011-09-20 18:22:31 +00:00
e4e20f43e4
Eliminate sign-comparison warnings in APInt
...
llvm-svn: 140158
2011-09-20 18:11:52 +00:00
6c3ad65288
Add mips64 & mips64el to Triple. Patch by Liu with modifications.
...
llvm-svn: 140157
2011-09-20 18:09:37 +00:00
1a155a8200
Update comment.
...
llvm-svn: 140156
2011-09-20 18:05:45 +00:00
9cb1fc034b
Use StringRef instead of std::string.
...
llvm-svn: 140154
2011-09-20 17:55:19 +00:00
972df96ab1
Eliminate unnecessary copy of FileName from GCOVLines.
...
GCOVLines is always accessed through a StringMap where the key is FileName.
llvm-svn: 140151
2011-09-20 17:43:14 +00:00
b011105d6c
There is no need to write a local utility routine to find subprogram info if the utility routine is already available in DebugInfo.
...
llvm-svn: 140145
2011-09-20 15:57:19 +00:00
68c92d86da
Extend changes from r139986 to produce 256-bit AVX minps/minpd/maxps/maxpd.
...
llvm-svn: 140140
2011-09-20 07:38:59 +00:00
8586e62d91
ARM isel bug fix for adds/subs operands.
...
Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile
llvm-svn: 140134
2011-09-20 03:17:40 +00:00
53df4b6dfa
whitespace
...
llvm-svn: 140133
2011-09-20 03:06:13 +00:00
b35198021a
Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH.
...
llvm-svn: 140125
2011-09-20 00:46:54 +00:00
36d8c92105
Remove from cmake too.
...
llvm-svn: 140122
2011-09-20 00:38:04 +00:00
69c02e9476
Remove more of llvmc and dependencies.
...
llvm-svn: 140121
2011-09-20 00:34:27 +00:00
716f17399e
Thumb2 assembly parsing and encoding for USAX.
...
llvm-svn: 140119
2011-09-20 00:30:45 +00:00
691389c93f
Remove incorrect comments. These are not disassmebly only patterns.
...
llvm-svn: 140116
2011-09-20 00:26:34 +00:00
62f8eee0eb
Thumb2 assembly parsing and encoding for UQASX/UQSAX.
...
llvm-svn: 140111
2011-09-20 00:18:52 +00:00
08a478063c
Thumb1 convenience aliases for disassembler round-trip testing. CPS instruction.
...
llvm-svn: 140108
2011-09-20 00:10:37 +00:00
4da03f007f
Thumb CPS definition is not disassembler only.
...
llvm-svn: 140106
2011-09-20 00:00:06 +00:00
d9846bbce2
Thumb2 range check on CPS mode immediate.
...
llvm-svn: 140105
2011-09-19 23:58:31 +00:00
163be01d69
tMOVSr is not allowed in an IT block either.
...
llvm-svn: 140104
2011-09-19 23:57:20 +00:00
61e4604dd8
CPS instructions are UNPREDICTABLE inside IT blocks.
...
llvm-svn: 140102
2011-09-19 23:47:10 +00:00
fbb4481097
Tidy up comments.
...
llvm-svn: 140099
2011-09-19 23:38:34 +00:00
c4398d2c7b
Fix PR10949. Fix the encoding of VMOVPQIto64rr.
...
llvm-svn: 140098
2011-09-19 23:36:59 +00:00
51792dcc4d
Based on the small opt Zvi's patch was trying to achieve, eliminate
...
128-bit undef subvector insertion into a 256-bit vector
llvm-svn: 140097
2011-09-19 23:36:50 +00:00
fc5451832a
Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL.
...
llvm-svn: 140095
2011-09-19 23:31:02 +00:00
7cdaa3a1a8
Revert r140083 and r140084 until buildbots can be fixed.
...
llvm-svn: 140094
2011-09-19 23:30:41 +00:00
15d97fd89b
Thumb2 assembly parsing and encoding for UHASX/UHSAX.
...
llvm-svn: 140088
2011-09-19 23:13:25 +00:00
a6e6504e2a
Thumb2 assembly parsing and encoding for UASX.
...
llvm-svn: 140085
2011-09-19 23:05:22 +00:00
d3c9d971e6
If we are extracting a basic block that ends in an invoke call, we must also
...
extract the landing pad block. Otherwise, there will be a situation where the
invoke's unwind edge lands on a non-landing pad.
We also forbid the user from extracting the landing pad block by itself. Again,
this is not a valid transformation.
llvm-svn: 140083
2011-09-19 23:00:52 +00:00
f902d92fc9
Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle.
...
llvm-svn: 140079
2011-09-19 22:34:23 +00:00
05541f45f3
Thumb2 assembly parsing and encoding for TBB/TBH.
...
llvm-svn: 140078
2011-09-19 22:21:13 +00:00
61d7c8a065
Fix an infinite loop where a transform in InstCombiner::visitAnd claims a construct is changed when it is not. (See included testcase.)
...
Patch by Xiaoyi Guo.
llvm-svn: 140072
2011-09-19 21:58:15 +00:00
d4a3d452d4
Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix
...
PR10955 and PR10948.
llvm-svn: 140069
2011-09-19 21:29:24 +00:00
4418a60272
Rename LLVM_MULTITHREADED define and fix build without threads.
...
Patch by Arrowdodger.
llvm-svn: 140064
2011-09-19 20:43:23 +00:00
1a23fbb9fd
Tidy up a bit.
...
llvm-svn: 140050
2011-09-19 20:31:59 +00:00
8221319707
Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH.
...
llvm-svn: 140047
2011-09-19 20:29:33 +00:00
79738336a8
Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't
...
yet legal according to comments in LegalizeDAG.cpp:227.
Memcpy nodes created for copying byval arguments are inserted before
CALLSEQ_START.
The two failing tests reported in PR10876 pass after applying this patch.
llvm-svn: 140046
2011-09-19 20:26:02 +00:00
c20a3ebba0
Silence -Wsign-compare warnings from GCC.
...
llvm-svn: 140043
2011-09-19 20:08:54 +00:00
8c021d85a6
Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding.
...
llvm-svn: 140041
2011-09-19 20:00:02 +00:00
222b5a4f5a
Fix a typo in the bitcode reader in the handling of atomic stores. Reported by David Meyer on llvmdev.
...
llvm-svn: 140040
2011-09-19 19:41:28 +00:00
40700e0992
ARM asm parsing should handle pre-indexed writeback w/o immediate.
...
For example, 'ldrb r9, [sp]!' is odd, but valid.
llvm-svn: 140035
2011-09-19 18:42:21 +00:00
ddfcec92d9
Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port over additional encoding tests to decoding tests.
...
llvm-svn: 140032
2011-09-19 18:07:10 +00:00
264abdecf0
Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH.
...
llvm-svn: 140029
2011-09-19 17:56:37 +00:00
1223416411
MCInstrAnalysis: Don't crash on instructions with no operands.
...
llvm-svn: 140027
2011-09-19 17:56:00 +00:00
7251e41b16
[indvars] Fix PR10946: SCEV cannot handle Vector IVs.
...
llvm-svn: 140026
2011-09-19 17:54:39 +00:00
dbd883b915
Add Win32 support to llvm::llvm_execute_on_thread(). Thanks to Aaron Ballman!
...
llvm-svn: 140011
2011-09-19 07:41:43 +00:00
763c11cc12
Fix typos in my prev commit, found by Tobi.
...
llvm-svn: 140003
2011-09-18 19:00:23 +00:00
261a10a007
setOperationAction should be done on the return value of the type, not the operands.
...
llvm-svn: 140001
2011-09-18 14:57:03 +00:00
7ae11279e9
When promoting integer vectors we often create ext-loads. This patch adds a
...
dag-combine optimization to implement the ext-load efficiently (using shuffles).
For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.
llvm-svn: 139995
2011-09-18 10:39:32 +00:00
7aaa0aa7a7
white space cleanups
...
llvm-svn: 139994
2011-09-18 10:29:29 +00:00
d9d01917ee
Fix typo by changing Lower256IntVETCC to Lower256IntVSETCC.
...
llvm-svn: 139993
2011-09-18 08:03:58 +00:00
f2b8c854dd
Synthesize x86 max/min instructions also for vectors (i.e. produce
...
maxps and maxpd). This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it. Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.
llvm-svn: 139986
2011-09-17 16:49:39 +00:00
4641efe304
Describe more AVX 128-bit convert instructions without patterns to have
...
mayLoad = 1
llvm-svn: 139973
2011-09-16 23:41:29 +00:00
502cd9d87a
Bitfield mask instructions are unpredictable if the encoded LSB is higher than the encoded MSB.
...
llvm-svn: 139972
2011-09-16 23:30:01 +00:00
b925e935d7
Fix bitfield decoding based on Eli's feedback.
...
llvm-svn: 139969
2011-09-16 23:04:48 +00:00
d0c435c23c
Thumb2 assembly parsing and encoding for SUB(immediate).
...
llvm-svn: 139966
2011-09-16 22:58:42 +00:00
bcfa9a6f89
Thumb2 pre-indexed loads/stores use the restricted GPR set for Rt.
...
llvm-svn: 139965
2011-09-16 22:42:36 +00:00
3ca958cd19
Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).
...
llvm-svn: 139964
2011-09-16 22:29:48 +00:00
9764bced10
Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's.
...
llvm-svn: 139958
2011-09-16 22:17:02 +00:00
5389ed5dfb
Add mayLoad attribute to AVX convert instructions, since non of them
...
are declared with load patterns. This fix the crash in PR10941. No testcases,
since a fold is triggered and then converted back to the register form
afterwards.
llvm-svn: 139953
2011-09-16 22:02:14 +00:00
9c0b86a76d
Thumb2 assembly parsing and encoding for STR.
...
More addressing mode encoding bits. Handle pre increment for STR/STRB/STRH
and STR(register).
llvm-svn: 139949
2011-09-16 21:55:56 +00:00
5c3657a0e5
Tidy up. 80 columns.
...
llvm-svn: 139944
2011-09-16 21:09:00 +00:00
fe82365cb0
Fix disassembly of Thumb2 LDRSH with a #-0 offset.
...
llvm-svn: 139943
2011-09-16 21:08:33 +00:00
92606beeae
Thumb2 assembly parsing and encoding for STR(immediate).
...
Add aliases for STRB/STRH while there. Tests forthcoming for those.
llvm-svn: 139942
2011-09-16 21:06:12 +00:00
2d406f02bf
Fix PR10884.
...
This PR basically reports a problem where a crash in generated code
happened due to %rbp being clobbered:
pushq %rbp
movq %rsp, %rbp
....
vmovmskps %ymm12, %ebp
....
movq %rbp, %rsp
popq %rbp
ret
Since Eric's r123367 commit, the default stack alignment for x86 32-bit
has changed to be 16-bytes. Since then, the MaxStackAlignmentHeuristicPass
hasn't been really used, but with AVX it becomes useful again, since per
ABI compliance we don't always align the stack to 256-bit, but only when
there are 256-bit incoming arguments.
ReserveFP was only used by this pass, but there's no RA target hook that
uses getReserveFP() to check for the presence of FP (since nothing was
triggering the pass to run, the uses of getReserveFP() were removed
through time without being noticed). Change this pass to use
setForceFramePointer, which is properly called by MachineFunction
hasFP method.
The testcase is very big and dependent on RA, not sure if it's worth
adding to test/CodeGen/X86.
llvm-svn: 139939
2011-09-16 20:58:28 +00:00
099c9767c3
Thumb2 assembly parsing and encoding for STMIA.
...
llvm-svn: 139938
2011-09-16 20:50:13 +00:00
8aee874bf1
Thumb2 assembly parsing and encoding for SSAX.
...
llvm-svn: 139929
2011-09-16 18:37:10 +00:00
f67d3ff8f3
Fix a minor bug in fs::create_directories. Patch by Albert Wong.
...
llvm-svn: 139928
2011-09-16 18:36:31 +00:00
9d9c99ff07
Thumb2 assembly parsing and encoding for SSAT.
...
llvm-svn: 139926
2011-09-16 18:32:30 +00:00
e6e7cd146a
Thumb2 assembly parsing and encoding for SRS.
...
llvm-svn: 139925
2011-09-16 18:25:22 +00:00
d73c6458de
Thumb2 assembly parsing and encoding for SMMULL.
...
llvm-svn: 139921
2011-09-16 18:05:48 +00:00
c1826a9de0
Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX.
...
llvm-svn: 139909
2011-09-16 17:10:44 +00:00
7a0b90b187
Thumb2 assembly parsing and encoding for SMLALD/SMLALDX.
...
llvm-svn: 139906
2011-09-16 16:58:03 +00:00
5e6d5cd7da
Kill some dead code.
...
llvm-svn: 139904
2011-09-16 16:45:40 +00:00
6c45b75154
Tidy up a bit.
...
llvm-svn: 139903
2011-09-16 16:39:25 +00:00
f9799d2c2d
Thumb2 assembly parsing and encoding for SMLAL.
...
llvm-svn: 139902
2011-09-16 16:38:00 +00:00
67b014b2c2
Namespacify.
...
llvm-svn: 139892
2011-09-16 00:35:06 +00:00
e2c92a3112
Spill mode: Hoist back-copies locally.
...
The leaveIntvAfter() function normally inserts a back-copy after the
requested instruction, making the back-copy kill the live range.
In spill mode, try to insert the back-copy before the last use instead.
That means the last use becomes the kill instead of the back-copy. This
lowers the register pressure because the last use can now redefine the
same register it was reading.
This will also improve compile time: The back-copy isn't a kill, so
hoisting it in hoistCopiesForSize() won't force a recomputation of the
source live range. Similarly, if the back-copy isn't hoisted by the
splitter, the spiller will not attempt hoisting it locally.
llvm-svn: 139883
2011-09-16 00:03:35 +00:00
e8339b2e63
Disable local spill hoisting for non-killing copies.
...
If the source register is live after the copy being spilled, there is no
point to hoisting it. Hoisting inside a basic block only serves to
resolve interferences by shortening the live range of the source.
llvm-svn: 139882
2011-09-16 00:03:33 +00:00
10a93ff8e0
Remove incorrect comments.
...
llvm-svn: 139877
2011-09-15 23:45:50 +00:00
a0c3b97221
Don't attach annotations to MCInst's. Instead, have the disassembler return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.
...
llvm-svn: 139876
2011-09-15 23:38:46 +00:00
639222d090
use 64-bit types instead of off_t/size_t to avoid the issue when
...
gold plugin is built with Large File Support (sizeof(off_t) == 64 on i686)
and the rest of LLVM is built w/o Large File Support
(sizeof(off_t) == 32 on i686) which corrupts the stack.
llvm-svn: 139873
2011-09-15 23:13:00 +00:00
7b43568a93
Add a fixme note!
...
llvm-svn: 139872
2011-09-15 23:04:24 +00:00
b08ce9b4c4
Thumb2 assembly parsing and encoding for SHASX/SHSAX.
...
llvm-svn: 139870
2011-09-15 22:34:29 +00:00
10f9ce2b7d
Minor cleanup.
...
llvm-svn: 139869
2011-09-15 22:26:18 +00:00
ba912e06c2
Use a more efficient lowering for Unordered/Monotonic atomic load/store on Thumb1.
...
llvm-svn: 139865
2011-09-15 22:18:49 +00:00
c69d68a150
Add the remaining AVX versions of instructions to X86InstrInfo, this
...
time for describing high latency ones and for recognizting loads
from the same base pointer
llvm-svn: 139864
2011-09-15 22:15:52 +00:00
112ec17e1b
DWARF: Reset the state after parsing a line table prologue and remove an unnecessary lookup.
...
llvm-svn: 139859
2011-09-15 21:59:13 +00:00
6b302955b1
Factor out partial register update checks for some SSE instructions.
...
Also add the AVX versions and add comments!
llvm-svn: 139854
2011-09-15 21:42:23 +00:00
ee8f14a799
Some legalization fixes for atomic load and store.
...
llvm-svn: 139851
2011-09-15 21:20:49 +00:00
49fc9ddae6
CommandLine: Add support for 64 bit unsigned integer options.
...
llvm-svn: 139848
2011-09-15 21:17:37 +00:00
901339d070
DWARF: Don't crash when looking up an invalid address.
...
llvm-svn: 139846
2011-09-15 21:08:54 +00:00
bceb9e5c05
Add an option to disable spill hoisting.
...
When -split-spill-mode is enabled, spill hoisting is performed by
SplitKit instead of by InlineSpiller. This hidden command line option
is for testing the splitter spill mode.
llvm-svn: 139845
2011-09-15 21:06:00 +00:00
10725a202b
Thumb2 assembly parsing and encoding for SASX.
...
llvm-svn: 139843
2011-09-15 21:01:23 +00:00
74111ee07f
Reapply r139759. Disable IV rewriting by default. See PR10916.
...
llvm-svn: 139842
2011-09-15 20:58:37 +00:00
eaa5265285
Thumb2 assembly parsing and encoding for RSB.
...
llvm-svn: 139839
2011-09-15 20:54:14 +00:00
2602ca67e8
DWARF: Put all the pieces we have together and provide a single accessor to DIContext that provides line information when given an address.
...
llvm-svn: 139836
2011-09-15 20:43:22 +00:00
679e1752f8
DWARF: Remove accessors that parse the whole line table section in one go, this can't possibly work.
...
The address size is specified by the compile unit associated with a line table, there is no global address size.
llvm-svn: 139835
2011-09-15 20:43:18 +00:00
4cbe06e7f8
Thumb2 assembly parsing and encoding for REV16/REVSH.
...
llvm-svn: 139828
2011-09-15 19:46:13 +00:00
233f130101
The the MC disassembler C API to print in verbose mode. Perhaps there should be a parameter to request verbose mode?
...
llvm-svn: 139821
2011-09-15 18:37:20 +00:00
d1814791ad
Add support for stored annotations to MCInst, and provide facilities for MC-based InstPrinters to print them out. Enhance the ARM and X86 InstPrinter's to do so in verbose mode.
...
llvm-svn: 139820
2011-09-15 18:36:29 +00:00
53e2e48de7
VirtRegMap is counting spill slots, not register spills.
...
Fix the stats counters to reflect that.
llvm-svn: 139819
2011-09-15 18:31:13 +00:00
fa1ca3070b
Change all checks regarding the presence of any SSE level to always
...
take into consideration the presence of AVX. This change, together with
the SSEDomainFix enabled for AVX, makes AVX codegen to always (hopefully)
emit the same code as SSE for 128-bit vector ops. I don't
have a testcase for this, but AVX now beats SSE in performance for
128-bit ops in the majority of programas in the llvm testsuite
llvm-svn: 139817
2011-09-15 18:27:36 +00:00
62d79875d3
Enable SSEDomainFix pass for AVX mode.
...
llvm-svn: 139816
2011-09-15 18:27:32 +00:00
c94c967656
Count correctly when a COPY turns into a spill or reload.
...
The number of spills could go negative since a folded COPY is just a
spill, and it may be eliminated.
llvm-svn: 139815
2011-09-15 18:22:52 +00:00
ab154f0b65
Thumb2 assembly parsing and encoding for REV.
...
llvm-svn: 139813
2011-09-15 18:13:30 +00:00
6dda032003
DWARF: Print line tables per compile unit, so they get the right address size.
...
llvm-svn: 139808
2011-09-15 18:02:20 +00:00
ebdf32f907
Assmebler symbol attribute directives don't work on temporary symbols.
...
Assembler private local symbols aren't legal targets of symbol attributes,
so issue a diagnostic for them.
Based on patch by Stepan Dyatkovskiy.
llvm-svn: 139807
2011-09-15 17:56:49 +00:00
37eb6962c6
Count inserted spills and reloads more accurately.
...
Adjust counters when removing spill and reload instructions.
We still don't account for reloads being removed by eliminateDeadDefs().
llvm-svn: 139806
2011-09-15 17:54:28 +00:00
07d4b1c455
DWARF: wire up .debug_str dumping.
...
llvm-svn: 139799
2011-09-15 16:57:13 +00:00
a9aa3c18e3
Handle missing newline at EOF more gracefully in MC AsmLexer.
...
If we see an EOF w/o a preceding end-of-line, return an EndOfStatement
token before returning the Eof token.
Based on patch by Stepan Dyatkovskiy.
llvm-svn: 139798
2011-09-15 16:52:06 +00:00
07b3503f8b
Trace through sibling PHIs in bulk.
...
When traceSiblingValue() encounters a PHI-def value created by live
range splitting, don't look at all the predecessor blocks. That can be
very expensive in a complicated CFG.
Instead, consider that all the non-PHI defs jointly dominate all the
PHI-defs. Tracing directly to all the non-PHI defs is much faster that
zipping around in the CFG when there are many PHIs with many
predecessors.
This significantly improves compile time for indirectbr interpreters.
llvm-svn: 139797
2011-09-15 16:41:12 +00:00
d93c4ece15
ARM support the pre-UAL mnemonic 'qsubaddx' for 'qsax.'
...
llvm-svn: 139796
2011-09-15 16:16:50 +00:00
22f76390a6
Thumb2 push/pop mnemonic recognition.
...
llvm-svn: 139794
2011-09-15 15:55:04 +00:00
b8b1d4c435
Speed up LiveIntervals::shrinkToUse with some caching.
...
Blocks with multiple PHI successors only need to go on the worklist
once. Use a SmallPtrSet to track the live-out blocks that have already
been handled. This is a lot faster than the two live range check we
would otherwise do.
Also stop recomputing hasPHIKill flags. Like RenumberValues(), it is
conservatively correct to leave them in, and they are not used for
anything important.
llvm-svn: 139792
2011-09-15 15:24:16 +00:00
fb75d78d33
Revert r139782, "RemoveCopyByCommutingDef doesn't need hasPHIKill()."
...
It does, after all.
RemoveCopyByCommutingDef rewrites the uses of one particular value
number in A. It doesn't know how to rewrite phi uses, so there can't be
any.
llvm-svn: 139787
2011-09-15 06:27:32 +00:00
9bca64ff2a
DWARF: Make DIE printing more bulletproof.
...
llvm-svn: 139786
2011-09-15 05:43:00 +00:00
ee674b3e3b
Add some more DWARF extensions from:
...
1. http://gcc.gnu.org/wiki/TemplateParmsDwarf
2. ftp://ftp.software.ibm.com/software/os390/czos/dwarf/mips_extensions.pdf
llvm-svn: 139784
2011-09-15 05:21:03 +00:00
4c099551f9
Stop verifying hasPHIKill() flags.
...
There is only one legitimate use remaining, in addIntervalsForSpills().
All other calls to hasPHIKill() are only used to update PHIKill flags.
The addIntervalsForSpills() function is part of the old spilling
framework, only used by linearscan.
llvm-svn: 139783
2011-09-15 05:16:30 +00:00
0499e7bbd0
RemoveCopyByCommutingDef doesn't need hasPHIKill().
...
Instead, let HasOtherReachingDefs() test for defs in B that overlap any
phi-defs in A as well. This test is slightly different, but almost
identical.
A perfectly precise test would only check those phi-defs in A that are
reachable from AValNo.
llvm-svn: 139782
2011-09-15 05:03:50 +00:00
dca022e377
It is safe to remat a value killed by phis.
...
The source live range is recomputed using shrinkToUses() which does
handle phis correctly. The hasPHIKill() condition was relevant in the
old days when ReMaterializeTrivialDef() tried to recompute the live
range itself.
The shrinkToUses() function will mark the original def as dead when no
more uses and phi kills remain. It is then removed by
runOnMachineFunction().
llvm-svn: 139781
2011-09-15 04:52:06 +00:00
e7ca8ecd92
Leave hasPHIKill flags alone in LiveInterval::RenumberValues.
...
It is conservatively correct to keep the hasPHIKill flags, even after
deleting PHI-defs.
The calculation can be very expensive after taildup has created a
quadratic number of indirectbr edges in the CFG, and the hasPHIKill flag
isn't used for anything after RenumberValues().
llvm-svn: 139780
2011-09-15 04:37:18 +00:00
34368124aa
Update Dwarf enums list for DWARF 4.
...
Note that DW_TAG_rvalue_reference_type is officially 0x42, not 0x41.
llvm-svn: 139779
2011-09-15 04:23:44 +00:00
21a5092830
DWARF: Print the number for unknown abbrev fields.
...
Thanks Nick!
llvm-svn: 139778
2011-09-15 04:15:59 +00:00
4137b6a2b6
DWARF: Fail gracefully when encountering unknown values in an abbrev.
...
llvm-svn: 139777
2011-09-15 04:00:58 +00:00
4d0449204e
Give structs with virtual methods a virtual destructor.
...
llvm-svn: 139776
2011-09-15 03:41:51 +00:00
21b6f1188f
DWARF: Silence GCC -Wsign-compare warning.
...
llvm-svn: 139775
2011-09-15 03:20:04 +00:00
123bfbbb73
DWARF: Fix indentation.
...
llvm-svn: 139774
2011-09-15 03:11:09 +00:00
a57c46aa49
DWARF: Include <algorithm> explicitly.
...
llvm-svn: 139773
2011-09-15 02:19:33 +00:00
5acab501de
DWARF: Add basic support for line tables.
...
The llvm-dwarfdump output isn't very verbose yet.
llvm-svn: 139771
2011-09-15 02:12:05 +00:00
888bea0b95
Make demanded-elt simplification for shufflevector slightly stronger. Spotted by inspection.
...
llvm-svn: 139768
2011-09-15 01:14:29 +00:00
76a86d3d4c
[regcoalescing] bug fix for RegistersDefinedFromSameValue.
...
An improper SlotIndex->VNInfo lookup was leading to unsafe copy removal.
Fixes PR10920 401.bzip2 miscompile with no IV rewrite.
llvm-svn: 139765
2011-09-15 01:09:33 +00:00
da5f010177
Fix the code creating VZEXT_LOAD so that it creates the right memoperand. Issue spotted in -debug output. I can't think of any practical effects at the moment, but it might matter if we start doing more aggressive alias analysis in CodeGen.
...
llvm-svn: 139758
2011-09-14 23:42:45 +00:00
8b74454619
Update the comment for system_temp_directory() to indicate when it
...
will ignore the erasedOnReboot option, and properly escape the
backslash in "C:\TEMP". Thanks to Aaron and Francois.
llvm-svn: 139755
2011-09-14 23:21:47 +00:00
801e06b768
Thumb2 assembly parsing and encoding for PKH.
...
llvm-svn: 139754
2011-09-14 23:16:41 +00:00
521526845c
ARMv7a has the PKH instructions.
...
llvm-svn: 139753
2011-09-14 23:16:34 +00:00
Akira Hatanaka