a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
...
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
6005589faf
More cleanups for MachineOperand:
...
- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
2007-12-30 21:56:09 +00:00
c98c0e57eb
MachineOperand:
...
- Add getParent() accessors.
- Move SubReg out of the AuxInfo union, to make way for future changes.
- Remove the getImmedValue/setImmedValue methods.
- in some MachineOperand::Create* methods, stop initializing fields that are dead.
MachineInstr:
- Delete one copy of the MachineInstr printing code, now there is only one dump
format and one copy of the code.
- Make MachineOperand use the parent field to get info about preg register names if
no target info is otherwise available.
- Move def/use/kill/dead flag printing to the machineoperand printer, so they are
always printed for an operand.
llvm-svn: 45460
2007-12-30 21:31:53 +00:00
96317d2412
fix typo duncan noticed!
...
llvm-svn: 45459
2007-12-30 21:21:10 +00:00
35fececec9
simpilfy some register printing code.
...
llvm-svn: 45458
2007-12-30 21:08:36 +00:00
383a873a9a
eliminate a copy of the machineoperand printing stuff. Keep the copy that
...
knows how to print offsets.
llvm-svn: 45457
2007-12-30 21:03:30 +00:00
49bd29daa0
Simplify and clean up some machine operand/instr printing/dumping stuff.
...
llvm-svn: 45456
2007-12-30 21:01:27 +00:00
0dad74d252
two register machineoperands are not identical unless their subregs match.
...
llvm-svn: 45455
2007-12-30 20:55:08 +00:00
81798417dc
MachineOperand::getImmedValue -> MachineOperand::getImm
...
llvm-svn: 45454
2007-12-30 20:50:28 +00:00
3c6ce5b43c
make machine operands fatter: give each one an up-pointer to the
...
machineinstr that owns it.
llvm-svn: 45449
2007-12-30 06:11:04 +00:00
20421fe936
use simplified operand addition methods.
...
llvm-svn: 45436
2007-12-30 00:57:42 +00:00
bbbae8e1ce
use simplified operand addition methods.
...
llvm-svn: 45435
2007-12-30 00:51:11 +00:00
e35dfb827f
Start using the simplified methods for adding operands.
...
llvm-svn: 45432
2007-12-30 00:41:17 +00:00
c288ff1d78
simplify some code by factoring operand construction better.
...
llvm-svn: 45428
2007-12-30 00:12:25 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
a087a8d2ce
remove attribution from lib Makefiles.
...
llvm-svn: 45415
2007-12-29 20:09:26 +00:00
3b6a82118b
Fold comparisons against a constant nan, and optimize ORD/UNORD
...
comparisons with a constant. This allows us to compile isnan to:
_foo:
fcmpu cr7, f1, f1
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
instead of:
LCPI1_0: ; float
.space 4
_foo:
lis r2, ha16(LCPI1_0)
lfs f0, lo16(LCPI1_0)(r2)
fcmpu cr7, f1, f0
mfcr r2
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 45405
2007-12-29 08:37:08 +00:00
2de9b85297
make sure not to zap volatile stores, thanks a lot to Dale for noticing this!
...
llvm-svn: 45402
2007-12-29 07:15:45 +00:00
5919b48fe9
don't fold fp_round(fp_extend(load)) -> fp_round(extload)
...
llvm-svn: 45400
2007-12-29 06:55:23 +00:00
3f9c6a7260
Delete a store whose input is a load from the same pointer:
...
x = load p
store x -> p
llvm-svn: 45398
2007-12-29 06:26:16 +00:00
bccb8c432d
Flesh out the Briggs implementation a little bit more, fix a few FIXMEs.
...
llvm-svn: 45347
2007-12-24 22:12:23 +00:00
e110199916
Sketch out an implementation of Briggs' copy placement algorithm.
...
llvm-svn: 45334
2007-12-23 15:37:26 +00:00
de272b1b63
initial code for forming an FGETSIGN node. This is disabled until
...
legalizer support goes in.
llvm-svn: 45323
2007-12-22 21:35:38 +00:00
afc8f13bf5
improve support for fgetsign
...
llvm-svn: 45322
2007-12-22 21:26:52 +00:00
efd1cddb5a
Tell TargetLoweringOpt whether it is running before
...
or after legalize.
llvm-svn: 45321
2007-12-22 20:56:36 +00:00
843cad4df2
Add a new FGETSIGN operation, which defaults to expand on all
...
targets.
llvm-svn: 45320
2007-12-22 20:47:56 +00:00
41689b52ab
Use getIntrinsicID instead of looking up intrinsic prototypes. Also
...
fixes a bug with indirect calls. (Test case will be included with
ocaml collector patch.)
llvm-svn: 45316
2007-12-22 17:27:01 +00:00
5a4c05d047
Note what still needs doing.
...
llvm-svn: 45310
2007-12-22 04:59:10 +00:00
4534100765
Remove critical edge breaking. It won't be necessary as long as we are very careful when inserting copies.
...
llvm-svn: 45309
2007-12-22 04:50:11 +00:00
f989141d30
More accurate checks for two-address constraints.
...
llvm-svn: 45259
2007-12-20 09:25:31 +00:00
a509537e25
The physical register + virtual register joining requirement was much too strict.
...
llvm-svn: 45253
2007-12-20 02:23:25 +00:00
61bc51ee97
Bring back a burr scheduling heuristic that's still needed.
...
llvm-svn: 45252
2007-12-20 02:22:36 +00:00
65c001e6bc
Updated comments to reflect what "side effects" means in this situation.
...
llvm-svn: 45245
2007-12-20 01:08:10 +00:00
e9d8861cdf
Simplify LowerCallTo by using a callsite.
...
llvm-svn: 45198
2007-12-19 09:48:52 +00:00
030bce7b83
The C++ exception handling personality function wants
...
to know about calls that cannot throw ('nounwind'):
if such a call does throw for some reason then the
personality will terminate the program. The distinction
between an ordinary call and a nounwind call is that
an ordinary call gets an entry in the exception table
but a nounwind call does not. This patch sets up the
exception table appropriately. One oddity is that
I've chosen to bracket nounwind calls with labels (like
invokes) - the other choice would have been to bracket
ordinary calls with labels. While bracketing
ordinary calls is more natural (because bracketing
by labels would then correspond exactly to getting an
entry in the exception table), I didn't do it because
introducing labels impedes some optimizations and I'm
guessing that ordinary calls occur more often than
nounwind calls. This fixes the gcc filter2 eh test,
at least at -O0 (the inliner needs some tweaking at
higher optimization levels).
llvm-svn: 45197
2007-12-19 07:36:31 +00:00
9f06e5e2df
Don't leave newly created nodes around if it turns out they are not needed.
...
llvm-svn: 45186
2007-12-19 01:34:38 +00:00
166f746246
Add debugging info. Use the newly created "hasUnmodelledSideEffects" method.
...
llvm-svn: 45178
2007-12-18 21:38:04 +00:00
95cc3e0e66
Support more insane CEP's in AsmPrinter (Yes, PyPy folks do really use them).
...
llvm-svn: 45172
2007-12-18 20:53:41 +00:00
483a969ece
Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
...
llvm-svn: 45167
2007-12-18 19:38:14 +00:00
78ced47a2f
Also print alignment and volatileness.
...
llvm-svn: 45164
2007-12-18 19:06:30 +00:00
91e0fc9cb4
FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit.
...
llvm-svn: 45157
2007-12-18 08:42:10 +00:00
e2dbba5828
SelectionDAG::dump() should print SrcValue of LoadSDNode and StoreSDNode.
...
llvm-svn: 45151
2007-12-18 07:02:08 +00:00
b5a79d0eaa
Make invokes of inline asm legal. Teach codegen
...
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).
llvm-svn: 45108
2007-12-17 18:08:19 +00:00
edf0788758
Change the PointerType api for creating pointer types. The old functionality of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space.
...
llvm-svn: 45082
2007-12-17 01:12:55 +00:00
7b8a741189
Break local interferences in StrongPHIElimination. One step closer...
...
llvm-svn: 45070
2007-12-16 05:44:27 +00:00
ccb3981256
A few more comments.
...
llvm-svn: 45069
2007-12-16 04:07:23 +00:00
8a332b235d
Add explicit keywords, and fix a minor typo that they uncovered.
...
llvm-svn: 45034
2007-12-14 15:41:34 +00:00
0fcf56f8f5
Bug fix. Must also match ResNo when matching an operand with a user.
...
llvm-svn: 45028
2007-12-14 08:25:15 +00:00
53b677e4e8
Add register pairs to the list to check for local interferences.
...
llvm-svn: 44987
2007-12-13 05:53:03 +00:00
1f93edd08a
Remove ugly and horrible code. It's not necessary for correctness, and can be added back later if it causes code quality issues.
...
llvm-svn: 44986
2007-12-13 05:43:37 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
...
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
7a7742c2fe
Allow vector integer constants to be created with
...
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
llvm-svn: 44954
2007-12-12 22:21:26 +00:00
499e5bffcf
Forgot to remove a register from the PHI-union after I'd determined that it
...
interfered with other registers. Seems like that might be a good thing to do. :-)
llvm-svn: 44902
2007-12-12 01:25:08 +00:00
6766d2fa4f
If deleting a reload instruction due to reuse (value is available in register R and reload is targeting R), make sure to invalidate the kill information of the last kill.
...
llvm-svn: 44894
2007-12-11 23:36:57 +00:00
38236ef6cb
Need to grow the indexed map. Added debug statements.
...
llvm-svn: 44892
2007-12-11 23:27:51 +00:00
642e15a7cb
Simplify slightly.
...
llvm-svn: 44881
2007-12-11 22:22:22 +00:00
f24dd1c1eb
More progress on StrongPHIElimination. Now we actually USE the DomForest!
...
llvm-svn: 44877
2007-12-11 20:12:11 +00:00
b678ae7c38
Blark! How in the world did this work without this?!
...
llvm-svn: 44874
2007-12-11 19:40:06 +00:00
7717a8a37d
- Update the virtual reg to machine instruction map when hoisting.
...
- Fix subtle bug when creating initially creating this map.
llvm-svn: 44873
2007-12-11 19:17:04 +00:00
5143d898c8
Checking for "zero operands" during the "CanHoistInst()" method isn't necessary
...
because those with side effects will be caught by other checks in here.
Also, simplify the check for a BB in a sub loop.
llvm-svn: 44871
2007-12-11 18:45:11 +00:00
303417d242
Switch over to MachineLoopInfo.
...
llvm-svn: 44838
2007-12-11 02:09:15 +00:00
f54030231e
Pretty print shuffle mask operand.
...
llvm-svn: 44837
2007-12-11 02:08:35 +00:00
7843c16f31
CollectorMetadata and Collector are rejiggered to get along with
...
per-function collector model. Collector is now the factory for
CollectorMetadata, so the latter may be subclassed.
llvm-svn: 44827
2007-12-11 00:30:17 +00:00
ba61806ef1
A little more progress on StrongPHIElimination, now that I have a better sense of
...
how the CodeGen machinery works.
llvm-svn: 44786
2007-12-10 08:07:09 +00:00
d202e03fe5
Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.
...
llvm-svn: 44785
2007-12-10 07:24:06 +00:00
64443973c0
Duncan points out that the subtraction is unneeded since hte code
...
knows the vector is not pow2
llvm-svn: 44740
2007-12-09 17:56:34 +00:00
69d3298777
Add support for splitting the operand of a return instruction.
...
llvm-svn: 44728
2007-12-09 00:06:19 +00:00
3f19dfe794
Reverting 44702. It wasn't correct to rename them.
...
llvm-svn: 44727
2007-12-08 23:58:46 +00:00
e48fc80446
add many new cases to SplitResult. SplitResult now handles all the cases that LegalizeDAG does.
...
llvm-svn: 44726
2007-12-08 23:58:27 +00:00
de9046af54
Implement splitting support for store, allowing us to compile:
...
%f8 = type <8 x float>
define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
%p = load %f8* %P ; <%f8> [#uses=1]
%q = load %f8* %Q ; <%f8> [#uses=1]
%R = add %f8 %p, %q ; <%f8> [#uses=1]
store %f8 %R, %f8* %S
ret void
}
into:
_test_f8:
movaps 16(%rdi), %xmm0
addps 16(%rsi), %xmm0
movaps (%rdi), %xmm1
addps (%rsi), %xmm1
movaps %xmm0, 16(%rdx)
movaps %xmm1, (%rdx)
ret
llvm-svn: 44725
2007-12-08 23:24:26 +00:00
de87224cd9
implement vector splitting of load, undef, and binops.
...
llvm-svn: 44724
2007-12-08 23:08:49 +00:00
1ef437d4e1
implement some methods.
...
llvm-svn: 44723
2007-12-08 22:40:18 +00:00
a5e7db115e
add scaffolding for splitting of vectors.
...
llvm-svn: 44722
2007-12-08 22:37:41 +00:00
8c8eaf6b92
reorganize header to separate into functional blocks.
...
llvm-svn: 44719
2007-12-08 21:59:32 +00:00
4063bd6eae
split scalarization out to its own file.
...
llvm-svn: 44718
2007-12-08 20:30:28 +00:00
5c7c46baaf
Split expansion out into its own file.
...
llvm-svn: 44717
2007-12-08 20:27:32 +00:00
029c816460
Split promotion support out to its own file.
...
llvm-svn: 44716
2007-12-08 20:24:38 +00:00
757d4beba9
Rename LegalizeDAGTypes.cpp -> LegalizeTypes.cpp
...
llvm-svn: 44715
2007-12-08 20:17:13 +00:00
92288147b6
Split the class definition of DAGTypeLegalizer out into a header.
...
Leave it visibility hidden, but not in an anon namespace.
llvm-svn: 44714
2007-12-08 20:16:06 +00:00
2b07d8c5a0
Renaming:
...
isTriviallyReMaterializable -> hasNoSideEffects
isReallyTriviallyReMaterializable -> isTriviallyReMaterializable
llvm-svn: 44702
2007-12-08 07:17:56 +00:00
4375173ba0
Incorporated comments from Evan and Chris:
...
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056043.html
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071203/056048.html
llvm-svn: 44696
2007-12-08 01:47:01 +00:00
fb706bc52b
Initial commit of the machine code LICM pass. It successfully hoists this:
...
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
2007-12-07 21:42:31 +00:00
85cdba29b0
Add an option to control this heuristic tweak so I can test it.
...
llvm-svn: 44671
2007-12-07 00:28:32 +00:00
5eff4de9c8
Redo previous patch so optimization only done for i1.
...
Simpler and safer.
llvm-svn: 44663
2007-12-06 17:53:31 +00:00
8393dc7378
Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta.
...
llvm-svn: 44660
2007-12-06 08:54:31 +00:00
eedaf92fcf
third time around: instead of disabling this completely,
...
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
llvm-svn: 44658
2007-12-06 07:47:55 +00:00
b5fdfb9612
Actually, disable this code for now. More analysis and improvements to
...
the X86 backend are needed before this should be enabled by default.
llvm-svn: 44657
2007-12-06 07:44:31 +00:00
7c709a5d08
implement a readme entry, compiling the code into:
...
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
llvm-svn: 44656
2007-12-06 07:33:36 +00:00
42558bf664
implement the rest of the functionality from SelectionDAGLegalize::ScalarizeVectorOp
...
llvm-svn: 44654
2007-12-06 05:53:43 +00:00
05bbbda78a
Fix PR1842.
...
llvm-svn: 44649
2007-12-06 01:43:46 +00:00
7fc1d98353
Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
...
llvm-svn: 44644
2007-12-06 00:01:56 +00:00
678b86d6ce
MachineInstr can change. Store indexes instead.
...
llvm-svn: 44612
2007-12-05 10:24:35 +00:00
06353b48b5
If a split live interval is spilled again, remove the kill marker on its last use.
...
llvm-svn: 44611
2007-12-05 09:51:10 +00:00
64b3baaaea
Clobber more bugs.
...
llvm-svn: 44610
2007-12-05 09:05:34 +00:00
d7de56ac93
Fix kill info for split intervals.
...
llvm-svn: 44609
2007-12-05 08:16:32 +00:00
c9693c60a5
more scalarization
...
llvm-svn: 44608
2007-12-05 07:45:02 +00:00
1a0d49a63c
scalarize vector binops
...
llvm-svn: 44607
2007-12-05 07:36:58 +00:00
269dbd31d0
- Mark last use of a split interval as kill instead of letting spiller track it.
...
This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
low spill weight so it would not be picked in case spilling is needed (avoid
pushing other intervals in the same BB to be spilled).
llvm-svn: 44601
2007-12-05 03:22:34 +00:00
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
...
the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Chris Lattner