Commit Graph

117 Commits

Author SHA1 Message Date
Richard Smith 228e6d4cf3 Fix integer undefined behavior due to signed left shift overflow in LLVM.
Reviewed offline by chandlerc.

llvm-svn: 162623
2012-08-24 23:29:28 +00:00
David Blaikie 46a9f016c5 More dead code removal (using -Wunreachable-code)
llvm-svn: 148578
2012-01-20 21:51:11 +00:00
Jay Foad 0745e645e0 Remove some unnecessary includes of PseudoSourceValue.h.
llvm-svn: 144631
2011-11-15 07:24:32 +00:00
Pete Cooper 82cd9e81fc Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses

llvm-svn: 144100
2011-11-08 18:42:53 +00:00
Evan Cheng bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
2011-07-14 20:59:42 +00:00
Kalle Raiskila 3531e9b0d9 Allow load from constant on SPU.
A 'load <4 x i32>* null' crashes llc before this fix.

llvm-svn: 126995
2011-03-04 12:00:11 +00:00
Ted Kremenek 3c4408ceb6 Null initialize a few variables flagged by
clang's -Wuninitialized-experimental warning.
While these don't look like real bugs, clang's
-Wuninitialized-experimental analysis is stricter
than GCC's, and these fixes have the benefit
of being general nice cleanups.

llvm-svn: 124073
2011-01-23 17:05:06 +00:00
Anton Korobeynikov 2f93128109 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
llvm-svn: 123170
2011-01-10 12:39:04 +00:00
Andrew Trick 10ffc2b6c2 Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.

llvm-svn: 122541
2010-12-24 05:03:26 +00:00
Kalle Raiskila b5e52df6dd Dont' feed ILA two inputs - it takes just one.
llvm-svn: 121372
2010-12-09 16:17:31 +00:00
Kalle Raiskila 427add8f24 Add missing i128 case.
llvm-svn: 120284
2010-11-29 09:36:26 +00:00
Wesley Peck 527da1b6e2 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
llvm-svn: 119990
2010-11-23 03:31:01 +00:00
Kalle Raiskila ac1ffa27b6 Add the missing cases to the type->registerclass conversion function.
llvm-svn: 115921
2010-10-07 16:32:42 +00:00
Kalle Raiskila 56f7cd255b Zap some redundant 'ori $?, $?, 0' from SPU.
Also remove some code that died in the process.
One now non-existant ori is checked for.

llvm-svn: 115306
2010-10-01 09:20:01 +00:00
Chris Lattner 82fd06d3ce it's more elegant to put the "getConstantPool" and
"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406
2010-09-21 06:22:23 +00:00
Kalle Raiskila c0e9b8d8bb Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
	or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.

Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.

llvm-svn: 114074
2010-09-16 12:29:33 +00:00
Chris Lattner 65b48b5dfc zap dead code.
llvm-svn: 113073
2010-09-04 18:12:00 +00:00
Benjamin Kramer 8fd07c026e Zap dead code.
llvm-svn: 112955
2010-09-03 12:13:18 +00:00
Chris Lattner bf80d28a74 zap dead code
llvm-svn: 112073
2010-08-25 19:00:00 +00:00
Kalle Raiskila 8b2f70125f Make SPU backend handle insertelement and
store for "half vectors"

llvm-svn: 110198
2010-08-04 13:59:48 +00:00
Duncan Sands 6d28e73acc Remove initialized but otherwise unused variables.
llvm-svn: 107127
2010-06-29 11:22:26 +00:00
Kalle Raiskila 056113a211 Handle loading from/storing to undef pointers on SPU by inserting a
random load/store, rather than crashing llc.

llvm-svn: 105710
2010-06-09 08:29:41 +00:00
Kalle Raiskila 8916358f97 Fix handling of 'load' nodes.
llvm-svn: 105269
2010-06-01 13:34:47 +00:00
Chris Lattner 0185047b3f "on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila!

llvm-svn: 103021
2010-05-04 17:58:46 +00:00
Dan Gohman 20e094c711 Use cast instead of dyn_cast when assuming success.
llvm-svn: 101636
2010-04-17 15:31:16 +00:00
Dan Gohman 21cea8ac2e Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.

llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman bcaf681cde Add const qualifiers to CodeGen's use of LLVM IR constructs.
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
Benjamin Kramer a6769269f3 Use twines to simplify calls to report_fatal_error. For code size and readability.
llvm-svn: 100756
2010-04-08 10:44:28 +00:00
Chris Lattner 2104b8d36e rename llvm::llvm_report_error -> llvm::report_fatal_error
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
Benjamin Kramer 2788f797ca Make isInt?? and isUint?? template specializations of the generic versions. This
makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.

llvm-svn: 99838
2010-03-29 21:13:41 +00:00
Benjamin Kramer f633ba8213 Remove a bunch of integer width predicate functions in favor of MathExtras.
Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).

llvm-svn: 99827
2010-03-29 19:07:58 +00:00
Chris Lattner f98f124a73 Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)

llvm-svn: 97555
2010-03-02 06:34:30 +00:00
Chris Lattner c51b7198a9 reapply my cellspu changes with a fix to not break the old isel.
llvm-svn: 96885
2010-02-23 05:30:43 +00:00
Dan Gohman 7e5c4906dd Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.
llvm-svn: 96871
2010-02-23 02:33:29 +00:00
Chris Lattner 22bc26e4cf fix hte last cellspu failure.
llvm-svn: 96854
2010-02-23 01:37:39 +00:00
Chris Lattner 807666783c hack around more crimes in instruction selection.
llvm-svn: 96852
2010-02-23 01:33:17 +00:00
Chris Lattner fbbe2617dc the cell backend is making all sorts of unsafe and incorrect assumptions
about ownership and update policies.  It isn't clear why it is doing all
this lowering at isel time instead of in legalize.  This fixes fcmp64.ll

llvm-svn: 96849
2010-02-23 01:20:00 +00:00
David Greene cfa68983e8 Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96232
2010-02-15 16:55:58 +00:00
Dan Gohman ea6f91ff64 Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.

This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.

llvm-svn: 92564
2010-01-05 01:24:18 +00:00
Dan Gohman b15f4a1cbd Remove uninteresting and confusing debug output.
llvm-svn: 86149
2009-11-05 18:47:09 +00:00
Dan Gohman 32f71d714b Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790
2009-09-25 18:54:59 +00:00
Scott Michel ec89f0c41a - Remove SelectSEXTi128 from SPUISelDAGToDAG.cpp, evidently, this is redundant
code, according to Anton (I'm not totally convinced, but we can always
  resurrect patches if we need to do so.)
- Start moving CellSPU's tests to prefer FileCheck.

llvm-svn: 79958
2009-08-24 23:57:35 +00:00
Scott Michel 8d1602af86 128-bit sign extension and vector shift cleanups, contributed by Ken Werner
(IBM).

llvm-svn: 79949
2009-08-24 22:28:53 +00:00
Chris Lattner 317dbbcfb1 eliminate uses of cerr()
llvm-svn: 79834
2009-08-23 07:05:07 +00:00
Owen Anderson 117c9e8497 Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
llvm-svn: 78759
2009-08-12 00:36:31 +00:00
Owen Anderson 9f94459d24 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Owen Anderson 53aa7a960c Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Dan Gohman 5ea74d55ce Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.

llvm-svn: 77691
2009-07-31 18:16:33 +00:00
Daniel Dunbar 5434756585 Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661
2009-07-31 03:02:41 +00:00
Dan Gohman bcb44baa57 Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654
2009-07-31 01:52:50 +00:00