Commit Graph

369141 Commits

Author SHA1 Message Date
Stella Laurenzo 6771b98c4e [mlir][CAPI] Add mlirAttributeGetType function.
* Also fixes the const-ness of the various DenseElementsAttr construction functions.
* Both issues identified when trying to use the DenseElementsAttr functions.

Differential Revision: https://reviews.llvm.org/D89517
2020-10-15 18:33:50 -07:00
Zequan Wu cd3090819c [llvm-cov] don't include all source files when provided source files are filtered out
When all provided source files are filtered out either due to `--ignore-filename-regex` or not part of binary, don't generate coverage reults for all source files. Because if users want to generate coverage results for all source files, they don't even need to provid selected source files or `--ignore-filename-regex`.

Differential Revision: https://reviews.llvm.org/D89359
2020-10-15 18:11:01 -07:00
Rob Suderman ad1fe3963f [MLIR] Fix gcc5 in D89161
Missing .str() makes gcc5 unable to infer the template to use.

Differential Revision: https://reviews.llvm.org/D89516
2020-10-15 17:03:06 -07:00
Richard Smith fc031d29be Switch the default of VerifyIntegerConstantExpression from constant
folding to not constant folding.

Constant folding of ICEs is done as a GCC compatibility measure, but new
code was picking it up, presumably by accident, due to the bad default.

While here, also switch the flag from a bool to an enum to make it more
obvious what it means at call sites. This highlighted a couple of places
where our behavior is different between C++11 and C++14 due to switching
from checking for an ICE to checking for a converted constant
expression (where there is no 'fold' codepath).
2020-10-15 16:58:47 -07:00
Rob Suderman 2bf423b021 [mlir] RewriterGen NativeCodeCall matcher with ConstantOp matcher
Added an underlying matcher for generic constant ops. This
included a rewriter of RewriterGen to make variable use more
clear.

Differential Revision: https://reviews.llvm.org/D89161
2020-10-15 16:32:20 -07:00
Vedant Kumar 273c299d5d [PM/CC1] Add -f[no-]split-cold-code CC1 option to toggle splitting
This patch adds -f[no-]split-cold-code CC1 options to clang. This allows
the splitting pass to be toggled on/off. The current method of passing
`-mllvm -hot-cold-split=true` to clang isn't ideal as it may not compose
correctly (say, with `-O0` or `-Oz`).

To implement the -fsplit-cold-code option, an attribute is applied to
functions to indicate that they may be considered for splitting. This
removes some complexity from the old/new PM pipeline builders, and
behaves as expected when LTO is enabled.

Co-authored by: Saleem Abdulrasool <compnerd@compnerd.org>
Differential Revision: https://reviews.llvm.org/D57265
Reviewed By: Aditya Kumar, Vedant Kumar
Reviewers: Teresa Johnson, Aditya Kumar, Fedor Sergeev, Philip Pfaffe, Vedant Kumar
2020-10-15 23:13:33 +00:00
Jessica Paquette 609d765cd3 [AArch64][GlobalISel] NFC: Refactor emitIntegerCompare
Simplify emitIntegerCompare and improve comments + asserts.

Mostly making the code a little easier to follow.

Also, this code is only used for G_ICMP. The legalizer ensures that the LHS/RHS
for every G_ICMP is either a s32 or s64. So, there's no need to handle anything
else. This lets us remove a bunch of checks for whether or not we successfully
emitted the compare.

Differential Revision: https://reviews.llvm.org/D89433
2020-10-15 16:04:08 -07:00
Amara Emerson c2551c1f40 [GlobalISel] Remove scalar src from non-sequential fadd/fmul reductions.
It's probably better to split these into separate G_FADD/G_FMUL + G_VECREDUCE
operations in the translator rather than carrying the scalar around. The
majority of the time it'll get simplified away as the scalars are probably
identity values.

Differential Revision: https://reviews.llvm.org/D89150
2020-10-15 15:51:44 -07:00
Thomas Raoux edbdea7466 [mlir][vector] Add unrolling patterns for Transfer read/write
Adding unroll support for transfer read and transfer write operation. This
allows to pick the ideal size for the memory access for a given target.

Differential Revision: https://reviews.llvm.org/D89289
2020-10-15 15:17:36 -07:00
David Blaikie 4c1c88bbc1 Add missing 'override' 2020-10-15 15:15:53 -07:00
Fangrui Song 5a338599fb [CGBuiltin] Respect asm labels and redefine_extname for builtins with specialized emitting
rL131311 added `asm()` support for builtin functions, but `asm()` for builtins with
specialized emitting (e.g. memcpy, various math functions) still do not work.

This patch makes these functions work for `asm()` and `#pragma redefine_extname`.
glibc uses `asm()` to redirect internal libc function calls to hidden aliases.

Limitation: such a function is a builtin in clang, but will not be recognized as
a libcall in optimization passes because Clang does not annotate the renamed
function as a libcall.  In GCC -O1 or above, `abs` can be optimized out but we can't.
Additionally, we cannot redirect `__builtin_sin` to `real_sin` in the following example:

  double sin(double x) asm("real_sin");
  double f(double d) { return __builtin_sin(d); }

---

According to @rsmith, the following three statements cannot be simultaneously true:

(1) The frontend function foo has known, builtin semantics X.
(2) The symbol foo has known, builtin semantics X.
(3) It's not correct to lower a call to the frontend function foo to the symbol foo.

People do want (1) (if it is profitable to expand a memcpy, do it).
This also means that people do not want to add -fno-builtin-memcpy.
People do want (3): that is why they use asm("__GI_memcpy") in the first place.

So unfortunately we make a compromise by not refuting (2) (see the limitation above).
For most libcalls, there is a small loss because compilers don't synthesize them.
For the few glibc cares about, it uses `asm("memcpy = __GI_memcpy");` to make
the assembly level redirection.
(Changing function names (e.g. `__memcpy`) is a hit to ergonomics which is not acceptable).

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D88712
2020-10-15 15:14:38 -07:00
Reid Kleckner 5fbab4025e [MS] Apply `inreg` to AArch64 sret parms on instance methods
The documentation rules indicate that instance methods should return
large, trivially copyable aggregates via X1/X0 and not X8 as is normally
done when returning such structs from free functions:
https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#return-values

Fixes PR47836, a bug in the initial implementation of these rules.

I tried to simplify the logic a bit as well while I'm here.

Differential Revision: https://reviews.llvm.org/D89362
2020-10-15 14:54:42 -07:00
Jim Ingham 6754caa9bf Add an SB API to get the SBTarget from an SBBreakpoint
Differential Revision: https://reviews.llvm.org/D89358
2020-10-15 14:28:44 -07:00
Kazushi (Jam) Marukawa a91dd3d37d [VE] Add VGT/VSC/PFCHV instructions
Add VGT/VSC/PFCHV vector instructions and regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D89471
2020-10-16 06:28:22 +09:00
Kazushi (Jam) Marukawa 410e5b17cf [VE] Support fabs/fcos/fsin/fsqrt math functions
VE doesn't have instruction for fabs/fcos/fsin/fsqrt, so expand them.
Add regression tests also.  Update fcopysign regression test, also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D89457
2020-10-16 06:27:38 +09:00
Yaxun (Sam) Liu e384e94fbe Revert "[HIP] Change default --gpu-max-threads-per-block value to 1024"
This reverts commit 187658b8a6 due to
AMDGPU backend issues.
2020-10-15 17:25:55 -04:00
Leonard Chan 79829a4704 Revert "[clang] Add -fc++-abi= flag for specifying which C++ ABI to use"
This reverts commits 683b308c07 and
8487bfd4e9.

We will go for a more restricted approach that does not give freedom to
everyone to change ABIs on whichever platform.

See the discussion on https://reviews.llvm.org/D85802.
2020-10-15 14:24:38 -07:00
Thomas Lively 1992e30c2d [WebAssembly] Prototype i8x16.popcnt
As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target
builtin and intrinsic rather than normal codegen patterns to make the
instruction opt-in until it is merged to the proposal and stabilized in engines.

Differential Revision: https://reviews.llvm.org/D89446
2020-10-15 21:18:22 +00:00
Jameson Nash 122d92dfc3 fix symbol printing on windows
Similar to MCSymbol::print in 3d6c8ebb58
(llvm-svn: 81682, PR4966), these symbols may need to be quoted to be handled by
the linker correctly.

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D87099
2020-10-15 17:14:55 -04:00
Florian Hahn 89c0124273 [LoopVersion] Unify SCEVChecks and alias check handling (NFC).
This is an initial cleanup of the way LoopVersioning interacts with LAA.

Currently LoopVersioning has 2 ways of initializing things:

1. Passing LAI and passing UseLAIChecks = true
2. Passing UseLAIChecks = false, followed by calling setSCEVChecks and
   setAliasChecks.

Both ways of initializing lead to the same result and the duplication
seems more complicated than necessary.

This patch removes the UseLAIChecks flag from the constructor and the
setSCEVChecks & setAliasChecks helpers and move initialization
exclusively to the constructor.

This simplifies things, by providing a single way to initialize
LoopVersioning and reducing duplication.

Reviewed By: Meinersbur, lebedev.ri

Differential Revision: https://reviews.llvm.org/D84406
2020-10-15 22:02:17 +01:00
Yitzhak Mandelbaum 65cb4fdd69 [libTooling] Change `after` range-selector to operate only on source ranges
Currently, `after` fails when applied to locations in macro arguments.  This
change projects the subrange into a file source range and then applies `after`.

Differential Revision: https://reviews.llvm.org/D89468
2020-10-15 20:58:30 +00:00
Richard Smith 68f116aa23 PR47864: Fix assertion in pointer-to-member emission if there are
multiple declarations of the same base class.
2020-10-15 13:51:51 -07:00
Michael Jones f6bf2823c4 [libc] Use entrypoints.txt as the single source of list of functions for a platform.
The function listings in api.td are removed. The same lists are now deduced using the information
in entrypoints.txt.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D89267
2020-10-15 20:46:13 +00:00
alex-t 42ed388120 [AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough
removeMBBifRedundant normally tries to keep predecessors fallthrough when removing redundant MBB.
         It has to change MBBs layout to keep the new successor to immediately follow the predecessor of removed MBB.
         It only may be allowed in case the new successor itself has no successors to which it fall through.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D89397
2020-10-15 23:20:54 +03:00
Roman Lebedev 2008dacf6e
[NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch 2020-10-15 23:15:04 +03:00
Roman Lebedev dfdfcdc8d3
[NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch 2020-10-15 23:15:04 +03:00
Roman Lebedev b3d2df42f7
[NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch 2020-10-15 23:15:03 +03:00
Nico Weber 6601dfb0b8 [gn bulid] Remove phantom WebAssembly tablegen() calls
Apparenlty I added these in https://reviews.llvm.org/rL350628 but
I'm not sure why. They never existed in the CMake build, and now
they're causing trouble.
2020-10-15 16:14:11 -04:00
Evgenii Stepanov 2e794a46b5 [AArch64] Stack frame reordering.
Implement stack frame reordering in the AArch64 backend.

Unlike the X86 implementation, AArch64 does not seem to benefit from
"access density" based frame reordering, mainly because it has a much
smaller variety of addressing modes, and the fact that all instructions
are 4 bytes so each frame object is either in range of an instruction
(and then the access is "free") or not (and that has a code size cost
of 4 bytes).

This change improves Memory Tagging codegen by
* Placing an object that has been chosen as the base tagged pointer of
the function at SP + 0. This saves one instruction to setup the pointer
(IRG does not have an offset immediate), and more because that object
can now be referenced without materializing its tagged address in a
scratch register.
* Placing objects that go out of scope simultaneously together. This
exposes opportunities for instruction merging in tryMergeAdjacentSTG.

Differential Revision: https://reviews.llvm.org/D72366
2020-10-15 12:50:16 -07:00
Evgenii Stepanov 2f63e57fa5 [MTE] Pin the tagged base pointer to one of the stack slots.
Summary:
Pin the tagged base pointer to one of the stack slots, and (if
necessary) rewrite tag offsets so that an object that occupies that
slot has both address and tag offsets of 0. This allows ADDG
instructions for that object to be eliminated and their uses replaced
with the tagged base pointer itself.

This optimization must be done in machine instructions and not in the IR
instrumentation pass, because referring to a stack slot through an IRG
pointer would confuse the stack coloring pass.

The optimization makes a (pretty naive) attempt to find the slot that
would benefit the most by counting the uses of stack slots in the
function.

Reviewers: ostannard, pcc

Subscribers: merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72365
2020-10-15 12:50:16 -07:00
Stanislav Mekhanoshin d1beb95d12 [AMDGPU] gfx1032 target
Differential Revision: https://reviews.llvm.org/D89487
2020-10-15 12:41:18 -07:00
Thomas Lively 3f738d1f5e Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions"
This reverts commit 7c8385a352 with a typing fix
to an instruction selection pattern.
2020-10-15 19:32:34 +00:00
Erik Pilkington 351317167e [SemaObjC] Fix composite pointer type calculation for `void*` and pointer to lifetime qualified ObjC pointer type
Fixes a regression introduced in 9a6f4d451c. rdar://70101809

Differential revision: https://reviews.llvm.org/D89475
2020-10-15 15:21:01 -04:00
Sean Silva ee491ac91e [mlir] Add std.tensor_to_memref op and teach the infra about it
The opposite of tensor_to_memref is tensor_load.

- Add some basic tensor_load/tensor_to_memref folding.
- Add source/target materializations to BufferizeTypeConverter.
- Add an example std bufferization pattern/pass that shows how the
  materialiations work together (more std bufferization patterns to come
  in subsequent commits).
  - In coming commits, I'll document how to write composable
  bufferization passes/patterns and update the other in-tree
  bufferization passes to match this convention. The populate* functions
  will of course continue to be exposed for power users.

The naming on tensor_load/tensor_to_memref and their pretty forms are
not very intuitive. I'm open to any suggestions here. One key
observation is that the memref type must always be the one specified in
the pretty form, since the tensor type can be inferred from the memref
type but not vice-versa.

With this, I've been able to replace all my custom bufferization type
converters in npcomp with BufferizeTypeConverter!

Part of the plan discussed in:
https://llvm.discourse.group/t/what-is-the-strategy-for-tensor-memref-conversion-bufferization/1938/17

Differential Revision: https://reviews.llvm.org/D89437
2020-10-15 12:19:20 -07:00
Sean Silva 9c728a7cbf [mlir] Fix typo in LangRef 2020-10-15 12:19:20 -07:00
Martin Storsjö 3785a413fe Reapply [LLD] [COFF] Implement a GNU/ELF like -wrap option
Add a simple forwarding option in the MinGW frontend, and implement
the private -wrap option in the COFF linker.

The feature in lld-link isn't gated by the -lldmingw option, but
the option is left as a private, undocumented option primarily
used by the MinGW driver.

The implementation is significantly based on the support for --wrap
in the ELF linker, but many small nuance details are different
between the ELF and COFF linkers, ending up with more than a few
implementation differences.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47384.

Differential Revision: https://reviews.llvm.org/D89004

Reapplied with the bitfield member canInline fixed so it doesn't break
builds targeting windows.
2020-10-15 22:14:02 +03:00
Sanjay Patel 77fb8cbd60 [InstCombine] update tests for logic folds to exercise commuted patterns; NFC
This was the intent for D88551.
I also varied the types a bit for extra coverage
and tried to make better test/value names.
2020-10-15 14:37:49 -04:00
Anh Tuyen Tran 224fd6ff48 [NFC][CaptureTracking] Move static function isNonEscapingLocalObject to llvm namespace
Function isNonEscapingLocalObject is a static one within BasicAliasAnalysis.cpp.
It wraps around PointerMayBeCaptured of CaptureTracking, checking whether a pointer
is to a function-local object, which never escapes from the function.

Although at the moment, isNonEscapingLocalObject is used only by BasicAliasAnalysis,
its functionality can be used by other pass(es), one of which I will put up for review
very soon. Instead of copying the contents of this static function, I move it to llvm
scope, and place it amongst other functions with similar functionality in CaptureTracking.

The rationale for the location are:
- Pointer escape and pointer being captured are actually two sides of the same coin
- isNonEscapingLocalObject is wrapping around another function in CaptureTracking

Reviewed By: jdoerfert (Johannes Doerfert)

Differential Revision: https://reviews.llvm.org/D89465
2020-10-15 18:37:29 +00:00
Konstantin Zhuravlyov 67f189e93c Make sure both cc1 and cc1as process -m[no-]code-object-v3
Differential Revision: https://reviews.llvm.org/D89478
2020-10-15 14:03:26 -04:00
Louis Dionne 6abc15ae3c [libc++] Reduce dependencies on <iostream> from <random>
We included <istream> and <ostream> from <random>, but really it is
sufficient to include <iosfwd> if we make sure we access ios_base
members through a dependent type. This allows us to break a hard
dependency of <random> on locales.
2020-10-15 13:40:18 -04:00
peter klausler 2aad6a0884 [flang][msvc] Avoid a reinterpret_cast
The call to the binary->decimal formatter in real.cpp was cheating
by using a reinterpret_cast<> to extract its binary value.
Use a more principled and portable approach by extending the
API of evaluate::Integer<> to include ToUInt<>()/ToSInt<>()
member function templates that do the "right" thing.  Retain
ToUInt64()/ToSInt64() for compatibility.

Differential revision: https://reviews.llvm.org/D89435
2020-10-15 10:38:48 -07:00
Nicolas Vasilache cf6fd404f3 [mlir][Linalg] NFC - Rename test files s/_/-/g 2020-10-15 17:30:04 +00:00
Arthur Eubanks 3d338f6813 Revert "[LLD] [COFF] Implement a GNU/ELF like -wrap option"
This reverts commit a012c704b5.

Breaks Windows builds.

C:\src\llvm-mint\lld\COFF\Symbols.cpp(26,1): error: static_assert failed due to requirement 'sizeof(lld::coff::SymbolUnion) <= 48' "symbols should be optimized for memory usage"
static_assert(sizeof(SymbolUnion) <= 48,
2020-10-15 10:27:25 -07:00
David Green 13ec3dd66f [LV] Add a getRecurrenceBinOp and make use of it. NFC 2020-10-15 18:21:41 +01:00
Louis Dionne 17dcf85ebe [libc++][filesystem] Only include <fstream> when we actually need it in copy_file_impl
This allows building <filesystem> on systems that don't support <fstream>,
such as systems that don't support localization.
2020-10-15 13:21:14 -04:00
Sanjay Patel 9f6048f83d [CostModel] remove cost-kind predicate for ctlz/cttz intrinsics in basic TTI implementation
The cost modeling for intrinsics is a patchwork based on different
expectations from the callers, so it's a mess. I'm hoping to untangle
this to allow canonicalization to the new min/max intrinsics in IR.
The general goal is to remove the cost-kind restriction here in the
basic implementation class. Ie, if some intrinsic has throughput cost
of 104, assume that it has the same size, latency, and blended costs.
Effectively, an intrinsic with cost N is composed of N simple
instructions. If that's not correct, the target should provide a more
accurate override.

The x86-64 SSE2 subtarget cost diffs require explanation:

1. The scalar ctlz/cttz are assuming "BSR+XOR+CMOV" or
   "TEST+BSF+CMOV/BRANCH", so not cheap.
2. The 128-bit SSE vector width versions assume cost of 18 or 26
   (no explanation provided in the tables, but this corresponds to a
   bunch of shift/logic/compare).
3. The 512-bit vectors in the test file are scaled up by a factor of
   4 from the legal vector width costs.
4. The plain latency cost-kind is not affected in this patch because
   that calc is diverted before we get to getIntrinsicInstrCost().

Differential Revision: https://reviews.llvm.org/D89461
2020-10-15 13:14:41 -04:00
Hiroshi Yamauchi 1ebee7adf8 [PGO] Remove the old memop value profiling buckets.
Following up D81682 and D83903, remove the code for the old value profiling
buckets, which have been replaced with the new, extended buckets and disabled by
default.

Also syncing InstrProfData.inc between compiler-rt and llvm.

Differential Revision: https://reviews.llvm.org/D88838
2020-10-15 10:09:49 -07:00
Louis Dionne 54f7ad2d6f [libc++] NFC: Remove unused include 2020-10-15 12:54:50 -04:00
Louis Dionne e0d01294bc [libc++] Allow building libc++ on platforms without a random device
Some platforms, like several embedded platforms, do not provide a source
of randomness through a random device. This commit makes it possible to
build and test libc++ for such platforms, i.e. without std::random_device.

Surprisingly, the only functionality that doesn't work on such platforms
is std::random_device itself -- everything else in <random> still works,
one just has to find alternative ways to seed the PRNGs.
2020-10-15 12:20:29 -04:00
Sanjay Patel e9df9028a7 [x86] add no 'unwind' to reduce test noise; NFC
I suggested this in D89412, but the comment was missed.
2020-10-15 11:51:13 -04:00