Commit Graph

292107 Commits

Author SHA1 Message Date
Craig Topper 88c142b42b [TableGen] Make TiedAsmOperandTable in the AsmMatcher 'static' since its at file scope.
llvm-svn: 334957
2018-06-18 16:17:46 +00:00
Craig Topper b41a137669 [TableGen] Remove unused member variable.
I think this became unused after r324196.

llvm-svn: 334956
2018-06-18 16:17:45 +00:00
Pavel Labath 6682979c04 Fix macosx build broken by the VersionTuple refactor
I actually did check that macos builds before committing, but this error
was in conditionally compiled code that did not seem to be used on my
machine.

I also fix a typo in the previous speculative NetBSD patch.

llvm-svn: 334955
2018-06-18 16:10:20 +00:00
Pavel Labath 76ba497177 Fix netbsd build broken by r334950
This also includes one more build fix for windows.

llvm-svn: 334953
2018-06-18 15:44:36 +00:00
Pavel Labath 9d4758ecdd Attempt to fix windows&freebsd builds broken by r334950
llvm-svn: 334952
2018-06-18 15:29:42 +00:00
Florian Hahn 63cbcf98a5 [VPlanRecipeBase] Add eraseFromParent().
Reviewers: dcaballe, hsaito, mkuper, hfinkel

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D48081

llvm-svn: 334951
2018-06-18 15:18:48 +00:00
Pavel Labath 2272c4811f Use llvm::VersionTuple instead of manual version marshalling
Summary:
This has multiple advantages:
- we need only one function argument/instance variable instead of three
- no need to default initialize variables
- no custom parsing code
- VersionTuple has comparison operators, which makes version comparisons much
  simpler

Reviewers: zturner, friss, clayborg, jingham

Subscribers: emaste, lldb-commits

Differential Revision: https://reviews.llvm.org/D47889

llvm-svn: 334950
2018-06-18 15:02:23 +00:00
Sander de Smalen 13684d8400 [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions.
Summary:
The variants added by this patch are:
- SQINC  (signed increment)
- UQINC  (unsigned increment)
- SQDEC  (signed decrement)
- UQDEC  (unsigned decrement)

For example:
  uqincw  x0, all, mul #4

Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar

Differential Revision: https://reviews.llvm.org/D47715

llvm-svn: 334948
2018-06-18 14:47:52 +00:00
Simon Pilgrim 9173c97ce4 [X86][BtVer2] Flag AVX2+ scheduler classes as unsupported
Jaguar only supports up to AVX1

Differential Revision: https://reviews.llvm.org/D48274

llvm-svn: 334947
2018-06-18 14:31:14 +00:00
George Rimar 507a924e21 [ELF] - Simplify the conflict-variable-linkage-name.s test case. [NFC]
This is a follow up requested during post commit review for
"[lld] r333880 - [ELF] - Also use DW_AT_linkage_name when gathering information about variables for error messages."

It removes checking of the input objects since it is really excessive.

llvm-svn: 334946
2018-06-18 14:14:35 +00:00
Andrea Di Biagio 487da729a2 [llvm-mca] Add tests for XOP and AVX512 instructions that implicitly clear the upper portion of a super-register.
When the destination register of a XOP instruction is an XMM register, bits
[255:128] of the corresponding YMM register are cleared.

When the destination register of a EVEX encoded instruction is an XMM/YMM
register, the upper bits of the corresponding ZMM are cleared.
On processors that feature AVX512, a write to an XMM registers always clears the
upper portion of the corresponding ZMM register if the instruction is VEX or
EVEX encoded.

These new tests show some interesting cases which aren't correctly analyzed by
llvm-mca. The lack of knowledge related to the implicit update on the
super-registers is addressed by D48225.

llvm-svn: 334945
2018-06-18 14:00:30 +00:00
Francis Visoiu Mistrih 1197f01bb9 [sanitizer] Guard call to internal_lseek when SANITIZER_MAC is true
r334881 breaks macOS bots because internal_lseek is not defined (neither
used on macOS):
http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/46240/consoleFull.

See discussion from r334881: https://reviews.llvm.org/rL334881

llvm-svn: 334944
2018-06-18 13:53:51 +00:00
Florian Hahn 3bcff3662c [VPlan] Fix sanitizer problem with insertBefore.
llvm-svn: 334943
2018-06-18 13:51:28 +00:00
Sander de Smalen 118099a62c [TableGen][AsmMatcherEmitter] Allow tied operands of different classes in aliases.
Allow a tied operand of a different operand class in InstAliases,
so that the operand can be printed (and added to the MC instruction)
as the appropriate register. For example, 'GPR64as32', which would
be printed/parsed as a 32bit register and should match a tied 64bit
register operand, where the former is a sub-register of the latter.

This patch also generalizes the constraint checking to an overrideable
method in MCTargetAsmParser, so that target asmparsers can specify
whether a given operand satisfies the tied register constraint.

Reviewers: olista01, rengolin, fhahn, SjoerdMeijer, samparker, dsanders, craig.topper

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47714

llvm-svn: 334942
2018-06-18 13:39:29 +00:00
Tobias Grosser 67dc08bd4c Adjust for clang-format changes
llvm-svn: 334941
2018-06-18 13:01:52 +00:00
Tobias Grosser 09a5437886 [ScopInfo] Move splitAliasGroupsByDomain and getAccessDomain to isl++ [NFCI]
llvm-svn: 334940
2018-06-18 12:53:26 +00:00
Tobias Grosser 9b29af946f [ScopInfo] Move more functions to isl++ [NFCI]
This change includes:

  - getFortranArrayIds
  - adjustDomainDimensions
  - propagateInvalidStmtDomains
  - buildAliasGroupsForAccesses

llvm-svn: 334939
2018-06-18 12:49:47 +00:00
Tobias Grosser 85dfb53e32 [ScopInfo] Move addNonEmptyDomainConstraints to isl++ [NFCI]
llvm-svn: 334938
2018-06-18 12:41:58 +00:00
Tobias Grosser fd5c856fe5 Move buildConditionSet to C++
llvm-svn: 334937
2018-06-18 12:35:36 +00:00
Paul Robinson 7555c589af Update copyright year to 2018.
llvm-svn: 334936
2018-06-18 12:22:17 +00:00
Kristof Umann 30f086565c [analyzer] Checker for uninitialized C++ objects
This checker analyzes C++ constructor calls, and reports uninitialized fields.

Due to the nature of this problem (uninitialized fields after an object
construction), this checker doesn't search for bugs, but rather is a tool to
enforce a specific programming model where every field needs to be initialized.

This checker lands in alpha for now, and a number of followup patches will be
made to reduce false negatives and to make it easier for the user to understand
what rules the checker relies on, eg. whether a derived class' constructor is
responsible for initializing inherited data members or whether it should be
handled in the base class' constructor.

Differential Revision: https://reviews.llvm.org/D45532

llvm-svn: 334935
2018-06-18 11:50:17 +00:00
Simon Pilgrim 99a5832016 [SLPVectorizer] Avoid calling const VL.size() repeatedly in for-loop. NFCI.
llvm-svn: 334934
2018-06-18 11:35:36 +00:00
Florian Hahn 7591e4e94a [VPlanRecipeBase] Add insertBefore helper.
Reviewers: dcaballe, mkuper, hfinkel, hsaito, mssimpso

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D48080

llvm-svn: 334933
2018-06-18 11:34:17 +00:00
Clement Courbet e752fd65e8 [llvm-exegesis] Optionally ignore instructions without a sched class.
Summary: See PR37602.

Reviewers: RKSimon

Subscribers: llvm-commits, tschuett

Differential Revision: https://reviews.llvm.org/D48267

llvm-svn: 334932
2018-06-18 11:27:47 +00:00
Sander de Smalen d521c4353e [AArch64][SVE] Asm: Support for vector element compares.
This patch adds instructions for comparing elements from two vectors, e.g.
  cmpgt p0.s, p0/z, z0.s, z1.s

and also adds support for comparing to a 64-bit wide element vector, e.g.
  cmpgt p0.s, p0/z, z0.s, z1.d

The patch also contains aliases for certain comparisons, e.g.:
  cmple p0.s, p0/z, z0.s, z1.s => cmpge p0.s, p0/z, z1.s, z0.s
  cmplo p0.s, p0/z, z0.s, z1.s => cmphi p0.s, p0/z, z1.s, z0.s
  cmpls p0.s, p0/z, z0.s, z1.s => cmphs p0.s, p0/z, z1.s, z0.s
  cmplt p0.s, p0/z, z0.s, z1.s => cmpgt p0.s, p0/z, z1.s, z0.s

llvm-svn: 334931
2018-06-18 10:59:19 +00:00
David L. Jones 82e08bd776 [ASTMatchers] Add support for matching the type of a friend decl.
This allows matchers like:

  friendDecl(hasType(cxxRecordDecl(...)))
  friendDecl(hasType(asString(...)))

It seems that hasType is probably the most reasonable narrowing matcher to
overload, since it is already used to narrow to other declaration kinds.

Differential Revision: https://reviews.llvm.org/D48242

Reviewers: klimek, aaron.ballman

Subscribers: cfe-commits
llvm-svn: 334930
2018-06-18 09:23:08 +00:00
David L. Jones 8f7adcd7fb [ASTMatchers] Don't assert-fail in specifiesTypeLoc().
The specifiesTypeLoc() matcher narrows a nestedNameSpecifier matcher based on a
typeloc within the NNS. However, the matcher does not guard against NNS which
are a namespace, and cause getTypeLoc to assert-fail.

llvm-svn: 334929
2018-06-18 08:59:16 +00:00
Petr Hosek 068246886a [Fuzzer] Set an explicit libc++ dependency when needed
On targets that don't link internal libc++ (Fuchsia and Linux) but
use libc++ as their C++ library and libFuzzer is being built using
the just built compiler together with libc++ as part of runtimes, we
need an explicit dependency from libFuzzer object library to libc++ to
make sure the headers are available by the time we start building
libFuzzer.

Differential Revision: https://reviews.llvm.org/D48261

llvm-svn: 334928
2018-06-18 08:01:57 +00:00
Clement Courbet 0d9da88d18 [X86] Fix NOOP sched overrides on BDW/HSW/SKL.
Summary: Noop certainly does not use resources.

Reviewers: RKSimon, craig.topper, andreadb

Subscribers: gbedwell, llvm-commits, gchatelet

Differential Revision: https://reviews.llvm.org/D48028

llvm-svn: 334927
2018-06-18 06:48:22 +00:00
Vitaly Buka e26d5f4b12 Fix libcxxabi tests after clang r334924
llvm-svn: 334926
2018-06-18 06:43:55 +00:00
Craig Topper f0ab7bd196 [X86] Create X86InstrFMA3Group objects fully in a static table instead of on the heap. NFCI
Previously we heap allocated the X86InstrFMA3Group objects which were created by passing them small register/memory opcode arrays that existed as individual static tables.

Rather than a bunch of small static arrays we now have one large static table of X86InstrFMA3Group objects. Rather than storing a pointer to the opcode arrays in the X86InstrFMA3Group object, we now store have a register and memory array as part of the object. If a group doesn't have memory or register opcodes, the array entries will be 0.

This greatly simplifies the destruction of the X86InstrFMA3Info object. We no longer need to delete the X86InstrFMA3Group objects as we destruct the DenseMap. And we don't need to keep track of which ones we already deleted.

This reduces the llc binary size on my local machine by ~50k. I can only assume that's really due to the fact that we had something like 512 small static arrays that we passed to the init functions either one at a time or in pairs. So there were between 256 and 512 distinct calls to the init functions in the initOnceImpl method.

llvm-svn: 334925
2018-06-18 06:32:22 +00:00
Vitaly Buka db666a44e7 Fix libcxx tests after clang r334677.
llvm-svn: 334924
2018-06-18 06:24:29 +00:00
Vitaly Buka 7fd0d388e0 [sanitizer] Suppress unused function warning
llvm-svn: 334923
2018-06-18 05:55:44 +00:00
Craig Topper 16fdde5e63 [X86] Add '.s' aliases to the assembler for the various redundant move encodings to match gas and our EVEX instructions.
We already have these aliases for EVEX enocded instructions, but not for the GPR, MMX, SSE, and VEX versions.

Also remove the vpextrw.s EVEX alias. That's not something gas implements.

llvm-svn: 334922
2018-06-18 05:00:50 +00:00
Frederic Riss 49c9d8b849 Fix the 'tb' alias command
No idea when this broke or if it ever worked. Added a small test
for one-shot breakpoints while I was there.

llvm-svn: 334921
2018-06-18 04:34:33 +00:00
Craig Topper 916d0cf649 [X86] Move the 'vmovq.s' and similar assembly strings for EVEX vector moves with reversed operands to InstAliases.
The .s assembly strings allow the reversed forms to be targeted from assembly which matches gas behavior. But when printing the instructions we should print them without the .s to match other tooling like objdump. By using InstAliases we can use the normal string in the instruction and just hide it from the assembly parser.

Ideally we'd add the .s versions to the legacy SSE and VEX versions as well for full compatibility with gas. Not sure how we got to state where only EVEX was supported.

llvm-svn: 334920
2018-06-18 01:28:05 +00:00
Craig Topper 2be74395cf [TableGen] Prevent double flattening of InstAlias asm strings in the asm matcher emitter.
Unlike CodeGenInstruction, CodeGenInstAlias was flatting asm strings in its constructor. For instructions it was the users responsibility to flatten the string.

AsmMatcherEmitter didn't know this and treated them the same. This caused double flattening of InstAliases. This is mostly harmless unless the desired assembly string contains curly braces. The second flattening wouldn't know to ignore these and would remove the curly braces. And for variant 1 it would remove the contents of them as well.

To mitigate this, this patch makes removes the flattening from the CodeGenIntAlias constructor and modifies AsmWriterEmitter to account for the flattening not having been done.

llvm-svn: 334919
2018-06-18 01:28:01 +00:00
Lang Hames 0705ee8dc2 [ORC] Remove redundant condition
llvm-svn: 334918
2018-06-17 23:54:58 +00:00
Richard Smith 7ebd641fcf Fix libcxx tests after clang r334677.
Feature test macro versions may have a trailing L.

llvm-svn: 334917
2018-06-17 19:58:45 +00:00
Lang Hames a5247cc5c7 [ORC] Only notify queries that they are resolved/ready when the query state
changes.

This guards against redundant notifications.

llvm-svn: 334916
2018-06-17 18:59:01 +00:00
Craig Topper 9fe45d846e [X86] Add all the FMA instructions direclty to the load folding table instead of proxying through X86InstrFMA3Info.
These increases the size of the static tables, but is closer to what we would get if used the autogenerated table directly. This reduces the remaining large deltas between what's in the manual table and what's in the autogenerated table.

llvm-svn: 334915
2018-06-17 18:00:16 +00:00
Vitaly Buka 87ea4487f7 [sanitizer] Fix tsan GO build
llvm-svn: 334914
2018-06-17 17:58:08 +00:00
Vitaly Buka 4647c8b93d [sanitizer] Fix s390 build after r334900
llvm-svn: 334913
2018-06-17 17:40:38 +00:00
Vitaly Buka 755f0e8174 [sanitizer] Use confstr to check libc version in InitTlsSize
Reviewers: Lekensteyn, jakubjelinek

Subscribers: kubamracek, llvm-commits

Differential Revision: https://reviews.llvm.org/D48265

llvm-svn: 334912
2018-06-17 17:31:22 +00:00
Lang Hames cd018a4467 [ORC] Suppress an unused variable warning for a debug-mode only use.
llvm-svn: 334911
2018-06-17 17:18:12 +00:00
Lang Hames df5776b1dc [ORC] Erase empty dependence sets when adding new symbol dependencies.
llvm-svn: 334910
2018-06-17 16:59:53 +00:00
Lang Hames 11adecfb2c [ORC] In MaterializationResponsibility, only maintain the Materializing flag on
symbols in debug mode.

The MaterializationResponsibility class hijacks the Materializing flag to track
symbols that have not yet been resolved in order to guard against redundant
resolution. Since this is an API contract check and only enforced in debug mode
there is no reason to maintain the flag state in release mode.

llvm-svn: 334909
2018-06-17 16:59:52 +00:00
Craig Topper b0e986f88e [X86] Pass the parent SDNode to X86DAGToDAGISel::selectScalarSSELoad to simplify the hasSingleUseFromRoot handling.
Some of the calls to hasSingleUseFromRoot were passing the load itself. If the load's chain result has a user this would count against that. By getting the true parent of the match and ensuring any intermediate between the match and the load have a single use we can avoid this case. isLegalToFold will take care of checking users of the load's data output.

This fixed at least fma-scalar-memfold.ll to succed without the peephole pass.

llvm-svn: 334908
2018-06-17 16:29:46 +00:00
Simon Pilgrim e930f569f7 [llvm-mca][X86] Add some avx512f/avx512vl resource test placeholders
There are a lot of instructions to add under these ISAs (and the other AVX512 variants) but this should demonstrate how to test for the EVEX instructions with different maskings

llvm-svn: 334907
2018-06-17 16:25:48 +00:00
Sander de Smalen 279b7e74e7 [AArch64][SVE] Asm: Support for bitwise operations on predicate vectors.
This patch adds support for instructions performing bitwise operations
on predicate vectors, including AND, BIC, EOR, NAND, NOR, ORN, ORR, and
their status flag setting variants ANDS, BICS, EORS, NANDS, ORNS, ORRS.

This patch also adds several aliases:

  orr  p0.b, p1/z, p1.b, p1.b  => mov  p0.b, p1.b
  orrs p0.b, p1/z, p1.b, p1.b  => movs p0.b, p1.b

  and  p0.b, p1/z, p2.b, p2.b  => mov  p0.b, p1/z, p2.b
  ands p0.b, p1/z, p2.b, p2.b  => movs p0.b, p1/z, p2.b

  eor  p0.b, p1/z, p2.b, p1.b  => not  p0.b, p1/z, p2.b
  eors p0.b, p1/z, p2.b, p1.b  => nots p0.b, p1/z, p2.b

llvm-svn: 334906
2018-06-17 10:48:21 +00:00