Commit Graph

379762 Commits

Author SHA1 Message Date
David Sherwood 9700228abc [Analysis] Change VFABI::mangleTLIVectorName to use ElementCount
Adds support for mangling TLI vector names for scalable vectors.

Differential Revision: https://reviews.llvm.org/D96338
2021-02-12 09:38:12 +00:00
Alexander Belyaev 891e769ab6 [mlir] Initialize `isSmallAlloc` in `initialize` method. 2021-02-12 10:28:58 +01:00
Fraser Cormack e88da1d677 [RISCV] Add support for integer fixed min/max
This patch extends the initial fixed-length vector support to include
smin, smax, umin, and umax.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D96491
2021-02-12 09:19:45 +00:00
Kristof Beyls f816cf6a47 [DeveloperPolicy] Specify LLVM's license more clearly.
Before, the first mention of LLVM's license on the developer policy page stated
that LLVM's license is Apache 2. This patch makes that more accurate by
mentioning the LLVM exception this first time the LLVM license is discussed on
that page, i.e. Apache-2.0 with LLVM-exception.

Technically, the correct SPDX identifier for LLVM's license is 'Apache-2.0 WITH
LLVM-exception', but I thought that writing the 'WITH' in lower case made the
paragraph easier to read without reducing clarity.

Differential Revision: https://reviews.llvm.org/D96482
2021-02-12 09:16:43 +00:00
wlei c3aeabaea1 [CSSPGO][llvm-profgen] Add brackets for context id to support extended binary format
To align with https://reviews.llvm.org/D95547, we need to add brackets for context id before initializing the `SampleContext`.

Also added test cases for extended binary format from llvm-profgen side.

Differential Revision: https://reviews.llvm.org/D95929
2021-02-12 01:14:53 -08:00
Alexander Belyaev 16213e1f50 [mlir] Allow users of `PromoteBuffersToStackPass` to customize `small buffer` func.
Differential Revision: https://reviews.llvm.org/D96579
2021-02-12 10:11:58 +01:00
Raphael Isemann 0c118831a3 [lldb] Let TestPExpectTest test the right test class
This test supposed to check the test base we are using for pexpect tests, but instead it used the normal TestBase
class we use for all other tests. TestBase already had the substrs type check since D88792 so this
test was passing because of that.

This just changes the test base of the test to the pexpect one so that the `expect` calls find their intended
target function. Also moves the check to the very start so that we can check the argument without
actually having to start a terminal and all that jazz.

(I found this by accident as D88792 got somehow reverted in a downstream branch so this test started
failing).

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D96556
2021-02-12 09:56:43 +01:00
Sander de Smalen 1d42ba254f [BasicTTIImpl] Fix getCastInstrCost for scalable vectors by querying for ElementCount.
This fixes an overly restrictive assumption that the vector is a FixedVectorType,
in code that tries to calculate the cost of a cast operation when splitting
a too-wide vector. The algorithm works the same for scalable vectors, so this
patch removes the cast<FixedVectorType>.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D96253
2021-02-12 08:28:52 +00:00
Michael Kruse f0f5afc4dd [Polly] Remove unused declaration. NFC. 2021-02-12 02:20:31 -06:00
Sander de Smalen 63d787e5d4 [CostModel] An extending load to illegal type is not free.
COST(zext (<4 x i32> load(...) to <4 x i64>)) != 0 when
<4 x i64> is an illegal result type that requires splitting
of the operation.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D96250
2021-02-12 07:59:21 +00:00
Kazu Hirata d61b4cb9d8 [CodeGen] Use range-based for loops (NFC) 2021-02-11 23:31:31 -08:00
Kazu Hirata 9dc62d1dc1 [PGO] Drop unnecessary const from return types (NFC) 2021-02-11 23:31:29 -08:00
Kazu Hirata 3e2e63060f [TableGen] Use ListSeparator (NFC) 2021-02-11 23:31:27 -08:00
Fangrui Song 0fd7c31a09 DebugInfo/Symbolize: Use stable_sort
This fixes coff-dwarf.test on some build bots.
The test relies on the sort order and prefers main (StorageClass: External) to .text (StorageClass: Static).
2021-02-11 22:53:56 -08:00
Max Kazantsev b32fa1751f [Test] Add a potentially hanging test to prevent merging patches that hang it 2021-02-12 13:48:40 +07:00
Heejin Ahn 2968611fda [WebAssembly] Fix delegate's argument computation
I previously assumed `delegate`'s immediate argument computation
followed a different rule than that of branches, but we agreed to make
it the same
(https://github.com/WebAssembly/exception-handling/issues/146). This
removes the need for a separate `DelegateStack` in both CFGStackify and
InstPrinter.

When computing the immediate argument, we use a different function for
`delegate` computation because in MIR `DELEGATE`'s instruction's
destination is the destination catch BB or delegate BB, and when it is a
catch BB, we need an additional step of getting its corresponding `end`
marker.

Reviewed By: tlively, dschuff

Differential Revision: https://reviews.llvm.org/D96525
2021-02-11 21:57:28 -08:00
Peter Collingbourne e434fc0dde gn build: Support cross-compiling libunwind for Android.
- Usual cross-compilation fix: s/target_/current_/g

- Define _LIBUNWIND_IS_NATIVE_ONLY to enable unwinding past
  functions with return pointer authentication.

- Android needs two libunwind static libraries: one with symbols exported and
  one without. These both need to be in the same build tree so
  the libunwind_hermetic_static_library configuration option doesn't
  help here. Replace it with build rules that build both libraries.

- Install the libraries in the location that Android expects them to be.

Differential Revision: https://reviews.llvm.org/D96563
2021-02-11 21:47:33 -08:00
Pushpinder Singh 79401b43ce [OpenMP][AMDGPU] Add support for linking libomptarget bitcode
This patch uses the existing logic of CUDA for searching libomptarget
and extracts it to a common method.

Reviewed By: JonChesterfield, tianshilei1992

Differential Revision: https://reviews.llvm.org/D96248
2021-02-12 00:42:41 -05:00
Craig Topper 56277e3e10 [TableGen] Make the map in InfoByHwMode protected. NFCI
Switch some for loops to just use the begin()/end() implementations
in the InfoByHwMode struct.

Add a method to insert into the map for the one case that was
modifying the map directly.
2021-02-11 21:16:10 -08:00
Michael Kruse 9b123cde63 [Polly] Sanitize optimization levels.
The description of the -polly switch stated that it was only enabled
with -O3. This was a lie, the optimization level was ignored. Only at
-O0 Polly was not added to the pass pipeline because the pass builder,
but only because the extension points were not triggered.

In the NewPM, the VectorizerStart extensions point is actually trigger
even with -O0 which leads to the following crash:

   Assertion `Level != OptimizationLevel::O0 && "Must request optimizations!"' failed.

We sanitize the optimization levels using the following rules for both
pass mangers:

 1. Only enable Polly if optimizing at all (-O1, -O2 or -O3).
 2. Do not enable Polly when optimizing for size.
 3. Ignore the optimization level for diagnostic passes (printer, viewer
    or JScop-exporter).
 4. If only diagnostic passes enabled, skip the code-generation.
 5. Fix the description of the -polly command line option.
2021-02-11 23:07:48 -06:00
Jianzhou Zhao 083d45b21c [dfsan] Fix building OriginAddr at non-linux OS
Fix the broken build by D96545
2021-02-12 05:02:14 +00:00
Jonas Devlieghere 732534ed64 [lldb] s/TARGET_OS_EMBEDDED/TARGET_OS_IPHONE/
TARGET_OS_EMBEDDED is deprecated, use TARGET_OS_IPHONE and/or
TARGET_OS_SIMULATOR instead.
2021-02-11 20:40:59 -08:00
Jonas Devlieghere 4d3a061c32 [lldb] Fix 'r' and 'run' aliases on Apple Silicon
The 'r' and 'run' aliases were different based on the target
architecture. I suspect the intention was to disable shell expansion on
embedded devices. This fixes TestCustomShell.test on AS.
2021-02-11 20:23:53 -08:00
James Y Knight db00953ff3 Fix bitcode decoder error in "Encode alignment attribute for `atomicrmw`"
The wrong record field number was being used in bitcode decoding,
which broke a self-hosted LTO build. (Yet, somehow, this _doesn't_
seem to have broken simple bitcode encode/decode roundtrip tests, and
I'm not sure why...)

Fixes commit d06ab79816
2021-02-11 22:29:03 -05:00
Amara Emerson de035c18cf [GlobalISel] Fix sext_inreg(load) combine to not move the originating load.
The builder was using the extend user as the insertion point, which meant that
we were incorrectly "moving" the load from its original position, and therefore
could violate memory operation ordering.
2021-02-11 19:27:09 -08:00
Fangrui Song 92ee3dd95d DebugInfo/Symbolize: Don't differentiate function/data symbolization
Before d08bd13ac8, only `SymbolRef::ST_Function`
symbols were used for .symtab symbolization. That commit added a `"DATA"` mode
to llvm-symbolizer which used `SymbolRef::ST_Data` symbols for symbolization.

Since function and data symbols have different addresses, we don't need to
differentiate the two modes. This patches unifies the two modes to simplify
code.

`"DATA"` is used by `compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp`.
`check-hwasan` and `check-tsan` have runtime tests.

Differential Revision: https://reviews.llvm.org/D96322
2021-02-11 19:22:44 -08:00
Tom Stellard e3cd3a3c91 Partially Revert "scan-view: Remove Reporter.py and associated AppleScript files"
This reverts some of commit dbb01536f6.

The Reporter module was still being used by the ScanView.py module and deleting
it caused scan-view to fail.  This commit adds back Reporter.py but removes the
code the references the AppleScript files which were removed in
dbb01536f6.

Reviewed By: NoQ

Differential Revision: https://reviews.llvm.org/D96367
2021-02-11 19:10:46 -08:00
Michael Kruse 7387f33bfe [Polly] Hide IslScheduleOptimizer implementation from header. NFC.
These are implementation details of the IslScheduleOptimizer pass
implementation and not use anywhere else. Hence, we can move them to the
cpp file and into an anonymous namespace.

Only getPartialTilePrefixes is, aside from the pass itself, used
externally (by the ScheduleOptimizerTest) and moved into the polly
namespace.
2021-02-11 21:02:29 -06:00
Aart Bik 5f022ad6ed [mlir] detect integer overflow in debug mode
Rationale:
This computation failed ASAN for the following input
(integer overflow during 4032000000000000000 * 100):

  tensor<100x200x300x400x500x600x700x800xf32>

This change adds a simple overflow detection during
debug mode (which we run more regularly than ASAN).
Arguably this is an unrealistic tensor input, but
in the context of sparse tensors, we may start to
see cases like this.

Bug:
https://bugs.llvm.org/show_bug.cgi?id=49136

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96530
2021-02-11 18:20:40 -08:00
Philip Reames 8ef4b961a3 [knownbits] Preserve known bits for small shift recurrences
The motivation for this is that I'm looking at an example that uses shifts as induction variables. There's lots of other omissions, but one of the first I noticed is that we can't compute tight known bits. (This indirectly causes SCEV's range analysis to produce very poor results as well.)

Differential Revision: https://reviews.llvm.org/D96440
2021-02-11 17:56:36 -08:00
Sam Clegg ac2be2b6a3 [lld][WebAssembly] Fix for weak undefined functions in -pie mode
This fixes two somewhat related issues.  Firstly we were never
generating imports for weak functions (even with the `import-functions`
policy for undefined symbols).  Adding a direct call to foo in the
`weak-undefined-pic.s` exposed a crash in the linker which this
change fixes.

Secondly we were failing to call `handleWeakUndefines` for the `-pie`
case which is PIC but doesn't set the undefined symbol policy to
`import-functions`.  With this change `-pie` binaries will by default
call `handleWeakUndefines` which generates the undefined stub handlers
for any weakly undefined symbols.

Fixes: https://github.com/emscripten-core/emscripten/issues/13337

Differential Revision: https://reviews.llvm.org/D95914
2021-02-11 17:16:03 -08:00
Philip Reames 72fc5b1b8e [tests] Autogen update test to remove whitespace diffs 2021-02-11 17:06:49 -08:00
Philip Reames b911a71427 [tests] precommit a tests for D96534 (and other range quality items) 2021-02-11 17:02:59 -08:00
Philip Reames 6538cef317 [tests] Autogen a few tests for ease of update 2021-02-11 16:54:06 -08:00
Vitaly Buka f2133f2e31 [NFC,memprof] Update test after D96319 2021-02-11 16:36:16 -08:00
Vitaly Buka 686b65f85f [Msan, NewPM] Reduce size of msan binaries
EarlyCSEPass called after msan redices code size by about 10%.
Similar optimization exists for legacy pass manager in
addGeneralOptsForMemorySanitizer.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D96406
2021-02-11 16:07:18 -08:00
Craig Topper 7a7836b4d8 [RISCV] Add a pattern for a scalable vector mask vnot.
We can use a vnand.mm with the same register for both inputs.
This avoids materializing an alls ones constant with vmset.mm.
2021-02-11 15:34:58 -08:00
Vitaly Buka f2f59d2a06 [NFC] Extract function which registers sanitizer passes
Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D96481
2021-02-11 15:29:48 -08:00
Julian Lettner 9360f1a191 [Sanitizer] Fix sanitizer tests without reducing optimization levels
As discussed, these tests are compiled with optimization to mimic real
sanitizer usage [1].

Let's mark relevant functions with `noinline` so we can continue to
check against the stack traces in the report.

[1] https://reviews.llvm.org/D96198

This reverts commit 04af72c542.

Differential Revision: https://reviews.llvm.org/D96357
2021-02-11 15:22:20 -08:00
Valentin Clement a48bee2294 [flang][fir][NFC] Move BoxType to TableGen type definition
This patch is a follow up of D96422 and move BoxType to TableGen.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96476
2021-02-11 18:10:22 -05:00
Peter Collingbourne c314f5ede8 ObjectFileELF: Test whether reloc_header is non-null instead of asserting.
It is possible for the GetSectionHeaderByIndex lookup to fail because
the previous FindSectionContainingFileAddress lookup found a segment
instead of a section. This is possible if the binary does not have
a PLT (which means that lld will in some circumstances set DT_JMPREL
to 0, which is typically an address that is part of the ELF headers
and not in a section) and may also be possible if the section headers
have been stripped. To handle this possibility, replace the assert
with an if.

Differential Revision: https://reviews.llvm.org/D93438
2021-02-11 15:05:18 -08:00
Dave Lee a5ab1dc4ad [lldb] Add step target to ThreadPlanStepInRange constructor
`QueueThreadPlanForStepInRange` accepts a `step_into_target`, but the constructor for
`ThreadPlanStepInRange` does not. Instead, a caller would optionally call
`SetStepInTarget()` in a separate statement.

This change adds `step_into_target` as a constructor argument. This simplifies
construction of `ThreadPlanSP`, by avoiding a subsequent downcast and conditional
assignment. This constructor is already used in downstream repos.

Differential Revision: https://reviews.llvm.org/D96539
2021-02-11 14:57:20 -08:00
Hongtao Yu 0eed2b1a3c Remove test code that cause MSAN failure.
Summary:
The negative test (with the feature being added disabled) caused MSAN failure and that's the added feature is supposed to fix. Therefore the negative test code is being removed.
2021-02-11 14:51:55 -08:00
Dan Gohman f9c05fc391 [WebAssembly] Use the new crt1-command.o if present.
If crt1-command.o exists in the sysroot, the libc has new-style command
support, so use it.

Differential Revision: https://reviews.llvm.org/D89274
2021-02-11 14:44:37 -08:00
Nicolas Vasilache 5bc4f8846c s[mlir] Tighten computation of inferred SubView result type.
The AffineMap in the MemRef inferred by SubViewOp may have uncompressed symbols which result in type mismatch on otherwise unused symbols. Make the computation of the AffineMap compress those unused symbols which results in better canonical types.
Additionally, improve the error message to report which inferred type was expected.

Differential Revision: https://reviews.llvm.org/D96551
2021-02-11 22:38:16 +00:00
ShihPo Hung 9e62c9146d [RISCV] Initial support for insert/extract subvector
This patch handles cast-like insert_subvector & extract_subvector
in which case:
1. index starts from 0.
2. inserting a fixed-width vector into a scalable vector,
   or extracting a fixed-width vector from a scalable vector.

Reviewed By: craig.topper, frasercrmck

Differential Revision: https://reviews.llvm.org/D96352
2021-02-11 14:35:49 -08:00
James Y Knight 8043d5a964 NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg.
The ability to specify alignment was recently added, and it's an
important property which we should ensure is set as expected by
Clang. (Especially before making further changes to Clang's code in
this area.) But, because it's on the end of the lines, the existing
tests all ignore it.

Therefore, update all the tests to also verify the expected alignment
for atomicrmw and cmpxchg. While I was in there, I also updated uses
of 'load atomic' and 'store atomic', and added the memory ordering,
where that was missing.
2021-02-11 17:35:09 -05:00
Jianzhou Zhao 5ebbc5802f [dfsan] Introduce memory mapping for origin tracking
Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96545
2021-02-11 22:33:16 +00:00
Hafiz Abid Qadeer 60bed4ab57 Replace deprecated %T in 2 tests.
In D91442, @MaskRay commented about a failure. This commit does the following to
address his comments:

1. Replace %T with %t as former is deprecated.
2. Add an explicit --sysroot argument in a test.

Some tests were failing when gcc-10-riscv64-linux-gnu is installed on test machine.
This was happening because the test was checking a case when --gcc-toolchain is not
provided. But if --sysroot was also not provided then code could pick a toolchain
installed in /usr. So to make the test more robust, I have provided an explicit --sysroot
argument. Its value has been chosen to match the existing patterns.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D93023
2021-02-11 22:21:21 +00:00
Pengxuan Zheng 61cca0f2e5 [AArch64] Adding Neon Sm3 & Sm4 Intrinsics
This adds SM3 and SM4 Intrinsics support for AArch64, specifically:
        vsm3ss1q_u32
        vsm3tt1aq_u32
        vsm3tt1bq_u32
        vsm3tt2aq_u32
        vsm3tt2bq_u32
        vsm3partw1q_u32
        vsm3partw2q_u32
        vsm4eq_u32
        vsm4ekeyq_u32

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D95655
2021-02-11 14:20:20 -08:00