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31 Commits

Author SHA1 Message Date
Craig Topper a999c66292 Convert FMA4 patterns to use target specific nodes instead of intrinsics to align with FMA3. 
llvm-svn: 162829
 2012-08-29 07:18:25 +00:00
Jakob Stoklund Olesen 8ff666fcb6 Remove more mayLoad workarounds. 
llvm-svn: 162556
 2012-08-24 14:43:22 +00:00
Craig Topper 663d160adb Custom lower FMA intrinsics to target specific nodes and remove the patterns. 
llvm-svn: 162534
 2012-08-24 04:03:22 +00:00
Craig Topper 384fae2f0d Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms. 
llvm-svn: 162260
 2012-08-21 07:11:11 +00:00
Craig Topper 4f3879dfa7 Merge FMA3 instructions with and without patterns into single classes using null_frag. 
llvm-svn: 162257
 2012-08-21 05:56:45 +00:00
Craig Topper b58eec4eaf Remove FMA3 intrinsic instructions in favor of patterns. 
llvm-svn: 162194
 2012-08-20 06:21:25 +00:00
Craig Topper 37eca54912 Use correct intrinsic for 256-bit VFMSUBADDPS. 
llvm-svn: 162193
 2012-08-20 06:03:04 +00:00
Craig Topper 5122e9f194 Remove trailing white space and tab characters. No functional change. 
llvm-svn: 162192
 2012-08-19 23:37:46 +00:00
Elena Demikhovsky 3cb3b0045c Added FMA functionality to X86 target. 
llvm-svn: 161110
 2012-08-01 12:06:00 +00:00
Craig Topper c6ac4cefcc Add intrinsic forms for FMA instructions to opcode folding tables. 
llvm-svn: 157917
 2012-06-04 07:46:16 +00:00
Craig Topper fd53b80219 Rename fma4 intrinsics to just fma since they are now used for both FMA4 and FMA3. Autoupgrade support coming in a separate commit. 
llvm-svn: 157898
 2012-06-03 07:26:46 +00:00
Craig Topper 29eafea292 Use sse_load_f32/64 for scalar FMA3 intrinsic patterns instead of 128-bit loads to match instruction behavior. 
llvm-svn: 157895
 2012-06-03 01:40:43 +00:00
Craig Topper badd755a0e Add neverHasSideEffects and mayLoad to FMA3 instructions. 
llvm-svn: 157894
 2012-06-03 00:30:49 +00:00
Craig Topper 00649d5111 Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though. 
llvm-svn: 157804
 2012-06-01 06:07:48 +00:00
Craig Topper df09da8355 Tidy up. Remove trailing spaces and fix the worst of the 80 column violations. 
llvm-svn: 157799
 2012-06-01 05:24:29 +00:00
Elena Demikhovsky 602f3a26d6 Added FMA3 Intel instructions. 
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.

llvm-svn: 157737
 2012-05-31 09:20:20 +00:00
Jia Liu e1d619691b some comment fix for X86 and ARM 
llvm-svn: 150902
 2012-02-19 02:03:36 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Craig Topper 29b0737452 Mark scalar FMA4 instructions as ignoring the VEX.L bit. 
llvm-svn: 147602
 2012-01-05 08:56:10 +00:00
Craig Topper 03a0beda88 Add FMA4 instructions to disassembler. 
llvm-svn: 147367
 2011-12-30 05:20:36 +00:00
Craig Topper cd93de93fa Separate the concept of having memory access in operand 4 from the concept of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation. 
llvm-svn: 147366
 2011-12-30 04:48:54 +00:00
Craig Topper c0f9bcb5d5 Combine FMA4 SS/SD patterns with the instruction definitions. 
llvm-svn: 147365
 2011-12-30 03:33:59 +00:00
Craig Topper 51fe43fcd9 Combine FMA4 PS/PD patterns with the instruction definitions. 
llvm-svn: 147364
 2011-12-30 03:17:15 +00:00
Craig Topper 6c08930c5e Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to force alignment on these instructions. Add a couple testcases for memory forms. 
llvm-svn: 147361
 2011-12-30 02:18:36 +00:00
Craig Topper 2ca79b9d4b Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size, but with the special handling to be compatible with the intrinsic expecting a vector. Similar handling is already used elsewhere. 
llvm-svn: 147360
 2011-12-30 01:49:53 +00:00
Craig Topper d773607eee Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 instructions. 
llvm-svn: 147353
 2011-12-29 20:43:40 +00:00
Craig Topper 8cab06a214 Expose FMA3 instructions to the disassembler. 
llvm-svn: 147351
 2011-12-29 20:03:14 +00:00
Jan Sjödin d19760a40c Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this and fix the encoding. 
llvm-svn: 146151
 2011-12-08 14:43:19 +00:00
Jan Sjödin 9430e284a9 Support for encoding all FMA4 instructions and tablegen patterns for all 
remaining FMA4 instructions and intrinsics with tests.

llvm-svn: 145525
 2011-11-30 22:09:42 +00:00
Bruno Cardoso Lopes 0f9a1f5e6c This patch contains support for encoding FMA4 instructions and 
tablegen patterns for scalar FMA4 operations and intrinsic. Also
add tests for vfmaddsd.

Patch by Jan Sjodin

llvm-svn: 145133
 2011-11-25 19:33:42 +00:00
Bruno Cardoso Lopes acd9230b1b Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual 
llvm-svn: 109204
 2010-07-23 00:54:35 +00:00