65a5ee86ba
Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8
...
bits wide.
llvm-svn: 11548
2004-02-17 15:14:29 +00:00
e9583082a6
ADDmi{16,32} should be in the next case statement.
...
llvm-svn: 11547
2004-02-17 15:10:11 +00:00
e5585328d8
Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
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MOVSX, and MOVZX.
llvm-svn: 11546
2004-02-17 09:14:23 +00:00
93398df103
Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
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and DECm{8,16,32} instructions.
llvm-svn: 11545
2004-02-17 08:49:20 +00:00
574c7c9ce9
Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions.
...
llvm-svn: 11544
2004-02-17 08:49:00 +00:00
d5ce14ddd1
Add SUB{rm,mr,mi}{8,16,32} instructions.
...
llvm-svn: 11543
2004-02-17 08:17:40 +00:00
4e21b2352c
Add support to the local allocator for fusing spill code into the instructions
...
that need them. This is very useful on CISCy targets like the X86 because it
reduces the total spill pressure, and makes better use of it's (large)
instruction set. Though the X86 backend doesn't know how to rewrite many
instructions yet, this already makes a substantial difference on 176.gcc for
example:
Before:
Time:
8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator
Code quality:
734559 asm-printer - Number of machine instrs printed
111395 ra-local - Number of registers reloaded
79902 ra-local - Number of registers spilled
231554 x86-peephole - Number of peephole optimization performed
After:
Time:
7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator
Code quality:
733083 asm-printer - Number of machine instrs printed
2379 ra-local - Number of reloads fused into instructions
109046 ra-local - Number of registers reloaded
79881 ra-local - Number of registers spilled
230658 x86-peephole - Number of peephole optimization performed
So by fusing 2300 instructions, we reduced the static number of instructions
by 1500, and reduces the number of peepholes (and thus the work) by about 900.
This also clearly reduces the number of reload/spill instructions that are
emitted.
llvm-svn: 11542
2004-02-17 08:09:40 +00:00
7f615d7e9a
Add support for folding memory operands for ADC, SBB and SUB instructions.
...
llvm-svn: 11541
2004-02-17 08:08:51 +00:00
b591e5de31
Add support for ADC{rm.mr}32 and SBB{rm,mr}32.
...
llvm-svn: 11540
2004-02-17 08:06:31 +00:00
7ef6d2fd0e
Add a (hidden) option to print instructions that fail to fuse. It's looking
...
like compares and test's would be the next huge win...
llvm-svn: 11539
2004-02-17 08:03:47 +00:00
6974f4758a
Add support for folding memory operands in MOVri{8,16,32} instructions.
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llvm-svn: 11538
2004-02-17 07:47:20 +00:00
c07eeaef6b
Expand the repertoire of the forms we can print and encode.
...
llvm-svn: 11537
2004-02-17 07:40:44 +00:00
a9363fda17
Disable this peephole for now. We can't keep track of the fact that the immediate is 8 bits,
...
but the memory reference is full sized.
llvm-svn: 11536
2004-02-17 07:36:32 +00:00
d1289d0fcd
Fix a bug in my previous refactoring change... arg!
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llvm-svn: 11535
2004-02-17 07:02:17 +00:00
6e540af8f7
The CBE is now in llc, not llvm-dis
...
llvm-svn: 11534
2004-02-17 06:40:51 +00:00
70d42f6765
The C backend is no longer in llvm-dis, it's in llc
...
llvm-svn: 11533
2004-02-17 06:40:06 +00:00
9093e9b2a1
The CBE is no longer in llvm-dis
...
llvm-svn: 11532
2004-02-17 06:39:48 +00:00
ca8f1c2716
Add an option to disable spill fusing in the X86 backend
...
llvm-svn: 11531
2004-02-17 06:30:34 +00:00
3abcdf3b90
Fix the mneumonics for the mov instructions to have the source and destination
...
order in the correct sense!! Arg!
llvm-svn: 11530
2004-02-17 06:28:19 +00:00
ebd90733b0
Fix the last crimes against nature that used the 'ir' ordering to use the
...
'ri' ordering instead... no it's not possible to store a register into an
immediate!
llvm-svn: 11529
2004-02-17 06:24:02 +00:00
9990476875
GRRR. Move instructions have swapped the order of the r/m operands.
...
llvm-svn: 11528
2004-02-17 06:20:20 +00:00
288e043e1b
Rename MOVi[mr] instructions to MOV[rm]i
...
llvm-svn: 11527
2004-02-17 06:16:44 +00:00
4c241855e6
Whoops, got my cases swapped.
...
llvm-svn: 11526
2004-02-17 06:02:15 +00:00
01dded2e69
Change to match the newer, simpler, interface
...
llvm-svn: 11525
2004-02-17 05:54:57 +00:00
1e70deff78
Simplify and document the new interface
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llvm-svn: 11524
2004-02-17 05:54:26 +00:00
ba30c776a6
Add support for folding memory operands into AND and IMUL's
...
llvm-svn: 11523
2004-02-17 05:46:06 +00:00
8d6eebf0d7
Scrunchify code, by adding helpers. No functionality changes.
...
llvm-svn: 11522
2004-02-17 05:35:13 +00:00
c9586411cf
Add mem forms of AND instructions
...
llvm-svn: 11521
2004-02-17 05:25:50 +00:00
4d5f42f58f
Add LiveIntervals::Interval::empty() member function.
...
llvm-svn: 11520
2004-02-17 05:14:37 +00:00
cde4ade314
Add API to check and fold memory operands into instructions.
...
llvm-svn: 11519
2004-02-17 04:33:18 +00:00
818bcec247
Rename the IMULri* instructions to IMULrri, as they are actually three address
...
instructions. Add forms of these instructions that read from memory
llvm-svn: 11518
2004-02-17 04:26:43 +00:00
ba9e3e2fb1
Once we have a way to fold spill code reloads into instructions, we have a way to use it. :)
...
llvm-svn: 11517
2004-02-17 04:08:37 +00:00
4f7c2d9e5e
Fix spilled interval update. It was too conservative.
...
llvm-svn: 11516
2004-02-17 04:04:20 +00:00
ddedac59fe
Refactor code a bit. No functionality changes, though the comment hints at things to come.
...
llvm-svn: 11515
2004-02-17 03:57:19 +00:00
ecc7d6e27a
Adjust to recent changes
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llvm-svn: 11514
2004-02-17 03:03:47 +00:00
946e46596f
Add two missing pieces from last checkin
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llvm-svn: 11513
2004-02-17 03:03:36 +00:00
c14686440f
Rearrange code to eliminate warnings
...
llvm-svn: 11512
2004-02-17 02:58:36 +00:00
a5ef4a5da7
Add peephole optimizations for ADD [MEM], IMM8 instructions.
...
llvm-svn: 11511
2004-02-16 23:50:18 +00:00
f6ce2e313a
Add two more variants of add. Update comments.
...
llvm-svn: 11510
2004-02-16 23:48:42 +00:00
6d66a493e6
Preemptive additions for the MallocBench tests.
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llvm-svn: 11507
2004-02-16 23:32:26 +00:00
0cb8855a1c
Only spit out warning for functions that take pointers, not for sin and the like
...
Add more special case handling for stdio functions. I feel dirty, how about you?
llvm-svn: 11506
2004-02-16 22:57:19 +00:00
04b60fe5ad
Move the folding of gep null, 0, 0, 0 to a place where it can be shared and
...
enjoyed by all, fixing a fixme. Add an assert
llvm-svn: 11505
2004-02-16 20:46:13 +00:00
4dd7a7245f
PreSelection isn't optional and so there's no way to turn it off.
...
llvm-svn: 11504
2004-02-16 19:45:26 +00:00
cedfcf5bca
memset and bcopy and now unified by the llvm.memset intrinsic
...
llvm-svn: 11503
2004-02-16 18:37:40 +00:00
544c9781db
Add some ADD instructions that take memory operands for Alkis
...
llvm-svn: 11502
2004-02-16 18:19:31 +00:00
62c832c68c
Adjusted the default pathname to the SPEC95 benchmarks. The new directory
...
has source code corrections and some input files pre-filtered for use
with the LLVM test suite.
llvm-svn: 11498
2004-02-16 14:55:18 +00:00
14f3fe81c6
Add LeakDetection to MachineInstr.
...
Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.
llvm-svn: 11497
2004-02-16 07:17:43 +00:00
e42732e75f
Implement test/Regression/Transforms/SimplifyCFG/UncondBranchToReturn.ll,
...
see the testcase for the reasoning.
llvm-svn: 11496
2004-02-16 06:35:48 +00:00
58d4db3f27
New testcase, details in the comments
...
llvm-svn: 11495
2004-02-16 06:35:19 +00:00
4db2d22bea
Fold PHI nodes of constants which are only used by a single cast. This implements
...
phi.ll:test4
llvm-svn: 11494
2004-02-16 05:07:08 +00:00
Alkis Evlogimenos