Commit Graph

431847 Commits

Author SHA1 Message Date
Jason Molenda 96d12187b3 Allow firmware binaries to be specified only by load address
Add support to Mach-O corefiles and to live gdb remote serial protocol
connections for the corefile/remote stub to provide a list of load
addresses of binaries that should be found & loaded by lldb, and nothing
else.  lldb will try to parse the binary out of memory, and if it can
find a UUID, try to find a binary & its debug information based on the
UUID, falling back to using the memory image if it must.

A bit of code unification from three parts of lldb that were loading
individual binaries already, so there is a shared method in
DynamicLoader to handle all of the variations they were doing.

Re-landing this with a uuid_is_null() implementation added to
Utility/UuidCompatibility.h for non-Darwin systems.

Differential Revision: https://reviews.llvm.org/D130813
rdar://94249937
rdar://94249384
2022-08-02 14:14:16 -07:00
Tom Stellard 560efad701 workflows: Release Workflow - Avoid selecting random reviewers when no phab review
If you pass a NULL reivew ID to the differential.revision.search API,
it returns all revisions and we were just taking the first one and
assuming it was associated with the commit in the PR.

We need to exit early if we can't find a Phabricator review associated
with a commit.
2022-08-02 14:07:22 -07:00
LLVM GN Syncbot 577840bc7a [gn build] Port 95a92995d4 2022-08-02 21:01:56 +00:00
Krzysztof Drewniak c2fc8d9b95 [mlir][GPU] Allow bare pointer memrefs when calling GPU kernels
In the ROCm runtime (and probably CUDA as well), all kernel arguments
are aligned. Therefore, enable using bare pointers for memref
arguments to kernels when these memrefs have static shape and a
trivial layout.

This is a substantial optimization to launching kernels that use
memrefs with known, static sizes, since it causes the kernel launch
packet to no longer include information already known to the kernel,
which can enable packing the kernel launch arguments into launch
packets instead of having to allocate an entire separate structure to
hold unneeded memref information.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D130716
2022-08-02 20:58:34 +00:00
Rashmi Mudduluru 95a92995d4 Adds the NSDateFormatter checker to clang-tidy
Differential Revision: https://reviews.llvm.org/D126097
2022-08-02 13:57:44 -07:00
Jason Molenda 803386da2f Revert "Allow firmware binaries to be specified only by load address"
This reverts commit d8879fba88.

Debian bot failure; I included <uuid/uuid.h> to get uuid_is_null() but
don't get it there.  Will memcmp or whatever & recommit.
2022-08-02 13:53:34 -07:00
Jason Molenda d8879fba88 Allow firmware binaries to be specified only by load address
Add support to Mach-O corefiles and to live gdb remote serial protocol
connections for the corefile/remote stub to provide a list of load
addresses of binaries that should be found & loaded by lldb, and nothing
else.  lldb will try to parse the binary out of memory, and if it can
find a UUID, try to find a binary & its debug information based on the
UUID, falling back to using the memory image if it must.

A bit of code unification from three parts of lldb that were loading
individual binaries already, so there is a shared method in
DynamicLoader to handle all of the variations they were doing.

Differential Revision: https://reviews.llvm.org/D130813
rdar://94249937
rdar://94249384
2022-08-02 13:49:30 -07:00
Austin Kerbow 40eec27618 [AMDGPU] Add llvm_unreachable to switch statement added in d7100b398. 2022-08-02 13:45:38 -07:00
Mircea Trofin 4146c1756d [nfc] Remove unused parameter in TailDuplicator::duplicateSimpleBB
Differential Revision: https://reviews.llvm.org/D131008
2022-08-02 13:39:34 -07:00
Ben Langmuir 54110b8aa0 Fix use-after-free in clang-apply-replacements
Accidentally introduced a dangling StringRef in b4c6dc2e66.

Differential Revision: https://reviews.llvm.org/D131017
2022-08-02 13:34:20 -07:00
Austin Kerbow d7100b398b [AMDGPU] Add GCNMaxILPSchedStrategy
Creates a new scheduling strategy that attempts to maximize ILP for a single
wave.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D130869
2022-08-02 13:21:24 -07:00
Louis Dionne ce6aff8d13 [libc++] Update documentation on testing libc++ 2022-08-02 16:16:02 -04:00
Slava Gurevich 0a569274cb [LLDB][NFC] Fix LLDB_WATCH_TYPE_IS_VALID macro
LLDB_WATCH_TYPE_IS_VALID would always return true when validating watchpoint type
by using bitwise-or instead of bitwise-and to apply validation flags.

Differential Revision: https://reviews.llvm.org/D130972
2022-08-02 13:05:29 -07:00
Aart Bik ce3d0e87ac [mlir][sparse] enable SDDMM-flavored fusion
This rewriting was no longer functional after recent migration to one shot
bufferization. However, this revision makes it work again, with a CHECK test
to ensure fusion happens. Note that functionality is tested by several
integration tests.

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D130996
2022-08-02 12:40:04 -07:00
Xiang Li 20f7f9b709 [NFC][DirectX backend] Fix crash when emit_obj for DirectX backend.
When emit-obj from clang directly, DirectX backend will hit assert caused by not initialize passes for AsmPrinter.
The fix will initialize the passes by calling createPassConfig.
Also ignore global variable which not has section in DXILAsmPrinter::emitGlobalVariable to avoid hit llvm_unreachable in DXILTargetObjectFile::SelectSectionForGlobal.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130856
2022-08-02 12:09:07 -07:00
Casey Carter a1a30dc933 [libcxx][test] Test code should inspect `TEST_STD_VER`, not `_LIBCPP_STD_VER`. 2022-08-02 12:07:29 -07:00
Roy Jacobson 508c431ed9 [SemaCXX] Validate destructor is valid for dependent classes
We didn't check that a destructor's name matches the directly enclosing class if the class was dependent.
I enabled the check we already had for non-dependent types, which seems to work. Added appropriate tests.

Fixes GitHub issue #56772

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D130936
2022-08-02 21:50:54 +03:00
Yuanfang Chen 92c1bc6158 [CodeGen][inlineasm] assume the flag output of inline asm is boolean value
GCC inline asm document says that
"... the general rule is that the output variable must be a scalar
integer, and the value is boolean."

Commit e5c37958f9 lowers flag output of
inline asm on X86 with setcc, hence it is guaranteed that the flag
is of boolean value. Clang does not support ARM inline asm flag output
yet so nothing need to be worried about ARM.

See "Flag Output" section at
https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#OutputOperands

Fixes https://github.com/llvm/llvm-project/issues/56568

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D129954
2022-08-02 11:49:01 -07:00
Aart Bik 9921ef73c8 [mlir][sparse] remove singleton dimension level type (for now)
Although we have plans to support this, and many other, dimension level type(s), currently the tag is not supported. It will be easy to add this back once support is added.

NOTE: based on discussion in https://discourse.llvm.org/t/overcoming-sparsification-limitation-on-level-types/62585

https://github.com/llvm/llvm-project/issues/51658

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D131002
2022-08-02 11:48:49 -07:00
Mark de Wever f712775daf [libc++][format] Exposes basic-format-string
This paper was accepted during the last plenary and is intended to be
backported to LLVM 15. When backporting the release notes in the branch
should be updated too.

Note the feature-test macro isn't updated since this will change; three
papers have updated the same macro in the same plenary.

Implements:
- P2508R1 Exposing std::basic-format-string

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D130643
2022-08-02 20:33:17 +02:00
Sriraman Tallam 3e43d0cde7 This patch fixes these errors while building BOLT.
Compiling llvm/llvm-project/bolt/include/bolt/Passes/RegReAssign.h failed:
...: error: invalid application of 'sizeof' to an incomplete type 'llvm::bolt::BinaryFunctionCallGraph'

static_assert(sizeof(_Tp) >= 0, "cannot delete an incomplete type");
error: type 'llvm::bolt::BinaryBasicBlock *' cannot be used prior to '::' because it has no members

using NodeRef = typename GraphType::UnknownGraphTypeError;
BinaryDomTree.h:31:14: error: no template named 'DomTreeGraphTraitsBase'

: public DomTreeGraphTraitsBase<bolt::BinaryDomTreeNode,

Differential Revision: https://reviews.llvm.org/D130402
2022-08-02 11:23:37 -07:00
Michele Scuttari 29fbe60009 [MLIR] Rename the generic LLVM allocation and deallocation functions
The generic allocation and deallocation instructions, which are optionally used during the MemRef -> LLVM conversion, should have a name that is specifically bound to their origin, that is the conversion pass itself.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D130588
2022-08-02 18:23:14 +00:00
Adrian Vogelsgesang ceebf91744 [libc++][doc] Update spaceship status page
* `operator<=>` for `iota_view::iterator` was enabled in 8320017b79
    * Removed P2405R0 which was not accepted and seems inactive
      (https://github.com/cplusplus/papers/issues/1075)
    * Added the previously missing `operator==` for `filesystem::space_info`
      to the tracking list.
    * Updated the "Assignee" for `string_view`, `string` as Mark de Wever
      mentioned he is working on them in Discord
    * Updated the status of the items for which I sent review requests
      yesterday.

Reviewed By: #libc, Mordante

Differential Revision: https://reviews.llvm.org/D130855
2022-08-02 20:11:03 +02:00
Arthur Eubanks 43aa4ac70b [StandardInstrumentations] Assign names to basic blocks without names
Fixes code in OrderedChangedData<T>::report which assumes that a string will only appear once in Before/After.

Reviewed By: jamieschmeiser

Differential Revision: https://reviews.llvm.org/D130587
2022-08-02 11:04:01 -07:00
Arthur Eubanks eb5aeee02f [test] Update BoundsChecking/simple.ll
Use opaque pointers and update_test_checks.py

Precommit a test
2022-08-02 10:49:38 -07:00
Kai Nacke b38375378d [GIsel] Add missing libcall for G_MUL to LegalizerHelper
The LegalizerHelper misses the code to lower G_MUL to a library call,
which this change adds.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D130987
2022-08-02 13:35:25 -04:00
Kai Nacke d3c4609855 [GIsel] Add missing space between type and name in GICombinerHelperArg
When using AdditionalArguments in a GICombinerHelper, the generator
does not put a space between the type and the name.

E.g.

let AdditionalArguments = [GICombinerHelperArg<"bool", "IsSomething">];

ends up as

boolIsSomething) const;

in the generated file. This change adds a space between the type and the name.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D130823
2022-08-02 13:35:25 -04:00
Vladislav Dzhidzhoev 71aecbb75c [AArch64] Treat x18 as callee-saved in functions with Windows calling convention on Darwin
rGcf97e0ec42b8 makes $x18 to be treated as callee-saved in functions with
Windows calling convention on non-Windows OSes.

Here we mark $x18 as callee-saved for functions with Windows calling
convention on Darwin, as well as on other non-Windows platforms, in
order to prevent some miscompilations (like miscompilation of
win64cc-darwin-backup-x18.ll).

Since getCalleeSavedRegs doesn't return x18 in list of callee-saved
registers, assignCalleeSavedSpillSlots and determineCalleeSaves
consider different sets of registers as callee-saved. It causes an
error:
```
Assertion failed: ((!HasCalleeSavedStackSize || getCalleeSavedStackSize() == Size) && "Invalid size calculated for callee saves"), function getCalleeSavedStackSize, file
AArch64MachineFunctionInfo.h, line 292.
```

Differential Revision: https://reviews.llvm.org/D130676
2022-08-02 20:33:42 +03:00
Zakk Chen bb99d4b11d [RISCV][Clang] Support policy functions for Vector Mask Instructions.
We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126749
2022-08-02 17:27:57 +00:00
Zakk Chen dffdca85ec [RISCV][Clang] Support policy functions for Vector Reduction
Instructions.

We will switch all UndefValue to PoisonValue in follow up patches.

Thanks for Kito to help on verification with their interanl testsuite.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126748
2022-08-02 17:27:56 +00:00
Zakk Chen 9caf2cc05c [RISCV][Clang] Support policy functions for Vector Comparison
Instructions.

We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126746
2022-08-02 17:27:56 +00:00
Zakk Chen 7eddeb9e99 [RISCV][Clang] Support policy functions for vmerge, vfmerge and
vcompress.

We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126745
2022-08-02 17:27:55 +00:00
Zakk Chen b1b22b4a85 [RISCV][Clang] Support policy functions for vneg, vnot, vncvt, vwcvt,
vwcvtu, vfabs and vfneg.

We will switch all UndefValue to PoisonValue in follow up patches.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D126744
2022-08-02 17:27:55 +00:00
Fangrui Song d884eb2bce [test] Remove -fsanitize-coverage-whitelist= 2022-08-02 10:25:44 -07:00
Andrey Tretyakov 8468e67495 [SPIRV] Add tests to improve test coverage
Differential Revision: https://reviews.llvm.org/D130597
2022-08-02 20:22:40 +03:00
Vladislav Dzhidzhoev f6d9f00031 [DebugInfo] Test commit: update irrelevant comments
Differential Revision: https://reviews.llvm.org/D130998
2022-08-02 20:21:24 +03:00
Slava Gurevich d735307aa2 [LLDB][Reliability] Remove dead code.
Remove redundant code that can never execute due to preceeding logic checks in the code.

Differential Revision: https://reviews.llvm.org/D130929
2022-08-02 10:09:45 -07:00
Guozhi Wei 85a6dd50ad [MIPS] Expose the ZERO register as a constant physical register
The ZERO register should be exposed as a constant physical register through the interface TargetRegisterInfo::isConstantPhysReg.

Differential Revision: https://reviews.llvm.org/D130932
2022-08-02 17:04:52 +00:00
Mark de Wever da38bcfd52 [libc++][format] Improves generated files.
This improves the formatting of the generated files. That allows it to
remove the clang-format step in D129668.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D130911
2022-08-02 18:56:02 +02:00
Mark de Wever 679169b7dd [libc++][format] Enables feature-test macro.
The macro is only enabled when the Clang is used with
-fexperimental-library.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D130792
2022-08-02 18:43:27 +02:00
Craig Topper ae6877836e [RISCV] Add scheduler classes to PseudoVMV*R_V.
I think these pseudos will exist when the post-RA scheduler runs
so they should have sched classes.

Reviewed By: monkchiang

Differential Revision: https://reviews.llvm.org/D130945
2022-08-02 09:38:32 -07:00
Craig Topper 2e5c516a3d [RISCV] Add scheduler class to PseudoReadVLENB.
Reviewed By: monkchiang

Differential Revision: https://reviews.llvm.org/D130938
2022-08-02 09:38:32 -07:00
Alexander Timofeev a321d95b59 [AMDGPU] avoid blind converting to VALU REG_SEQUENCE and PHIs
In the 2e29b0138c we introduce a specific solving algorithm
that analyzes the VGPR to SGPR copies use chains and either lowers
the copy to v_readfirstlane_b32 or converts the whole chain to VALU forms.
Same time we still have the code that blindly converts to VALU REG_SEQUENCE and PHIs
in case they produce SGPR but have VGPRs input operands. In case the REG_SEQUENCE and PHIs
are in the VGPR to SGPR copy use chain, and this chain was considered long enough to convert
copy to v_readfistlane_b32, further lowering them to VALU leads to several kinds of issues.
At first, we have v_readfistlane_b32 which is completely useless because most parts of its use chain
were moved to VALU forms. Second, we may encounter subtle bugs related to the EXEC-dependent CF
because of the weird mixing of SALU and VALU instructions.
This change removes the code that moves REG_SEQUENCE and PHIs to VALU. Instead, we use the fact
that both REG_SEQUENCE and PHIs have copy semantics. That is, if they define SGPR but have VGPR inputs,
we insert VGPR to SGPR copies to make them pure SGPR. Then, the new copies are processed by the common
VGPR to SGPR lowering algorithm.
This is Part 2 in the series of commits aiming at the massive refactoring of the SIFixSGPRCopies pass.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D130367
2022-08-02 18:37:57 +02:00
Jay Foad e301e071ba [AMDGPU] Remove IR SpeculativeExecution pass from codegen pipeline
This pass seems to have very little effect because all it does is hoist
some instructions, but it is followed later in the codegen pipeline by
the IR CodeSinking pass which does the opposite.

Differential Revision: https://reviews.llvm.org/D130258
2022-08-02 17:35:20 +01:00
John Regehr 71d1bd1457 llvm-reduce: reorder passes to run the ones first that delete function bodies; this makes reductions go faster 2022-08-02 10:32:49 -06:00
Jay Foad c24d68fff1 [AMDGPU] Take advantage of VOP3 literals in convertToThreeAddress
This improves a corner case where v_fmac can be converted to v_fma on
GFX10+ even if it has a literal operand.

Differential Revision: https://reviews.llvm.org/D130992
2022-08-02 17:27:11 +01:00
Alok Kumar Sharma 5ec6ea3dfd [clang][OpenMP][DebugInfo] Mark OpenMP generated functions as artificial
The Clang compiler generates internal functions for OpenMP. Current
patch marks these functions as artificial.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D111521
2022-08-02 21:24:46 +05:30
Philip Reames 0b47615fcf [LV] Recognize store of invariant value to invariant address as uniform
This extends the handling of uniform memory operations to handle the case where a store is storing a loop invariant value. Unlike the general case of a store to an invariant address where we must use the last active lane, in this case we can use any lane since all lanes must produce the same result.

For context, the basic structure of the existing code and how the change fits in:
* First, we select a widening strategy. (The result is irrelevant for this patch.)
* Then we determine if a computation is uniform within all lanes of VF. (Note this is the uniform-per-part definition, not LAI's uniform across all unrolled iterations definition.)
* If it is, we overrule the widening strategy, and unconditionally scalarize.
* VPReplicationRecipe - which is what actually does the scalarization - knows how to handle unform-per-part values including for scalable vectors. However, we do need to know that the expression is safe to execute without predication - e.g. the uniform mem op was unconditional in the original loop. (This part was split off and already landed.)

An obvious question is why not simply implement the generic case? The answer is that I'm going to, but doing so without a canonicalization towards uniform causes regressions due to bad interaction with scalarization/uniformity of values feeding the uniform mem-op. This patch is needed to avoid those regressions.

Differential Revision: https://reviews.llvm.org/D130364
2022-08-02 08:09:49 -07:00
Peixin Qiao 48b6f5c708 [flang] Add some semantic checks for derived type with BIND attribute
This supports checks in C1801-C1805 for derived type with BIND attribute.
The other compilers such as 'gfortran' and 'ifort' do not report error
for C1802 and C1805, so emit warnings for them.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D130438
2022-08-02 23:07:02 +08:00
Peixin Qiao 1f9212d8d5 [flang] Support extention intrinsic ABORT
The semantic checks and runtime have been supported. This supports the
lowering of intrinsic ABORT.

`gfortran` prints a backtrace before abort, unless `-fno-backtrace` is
given. This is good to use. The intrinsic BACKTRACE is not supported
yet, so add TODO in the runtime.

This extention is needed in SPEC2017 521.wrf_r in
https://github.com/llvm/llvm-project/issues/55955.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D130439
2022-08-02 23:02:12 +08:00