Commit Graph

351652 Commits

Author SHA1 Message Date
Dan Liew fccea7f372 [NFC] Introduce a `LateInitialize()` method to `SymbolizerTool` that is called during the LateInitialize stage of the sanitizer runtimes.
Summary:
This is implemented by adding a `Symbolizer::LateInitializeTools()`
method that iterates over the registered tools and calls the
`LateInitialize()` method on them.

`Symbolizer::LateInitializeTools()` is now called from the various
`Symbolizer::LateInitialize()` implementations.

The default implementation of `SymbolizerTool::LateInitialize()`
does nothing so this change should be NFC.

This change allows `SymbolizerTool` implementations to perform
any initialization that they need to perform at the
LateInitialize stage of a sanitizer runtime init.

rdar://problem/58789439

Reviewers: kubamracek, yln, vitalybuka, cryptoad, phosek, rnk

Subscribers: #sanitizers, llvm-commits

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D78178
2020-04-16 17:25:58 -07:00
Wouter van Oortmerssen 3eaeebec95 [WebAssembly] Fix WasmEmitter link error. 2020-04-16 17:23:18 -07:00
Pratyai Mazumder a1526cd62b [NFC, tsan] Update tsan tests expectation
Summary:
These tests pass with clang, but fail if gcc was used.
gcc build creates similar but not the same stacks.

Reviewers: vitalybuka

Reviewed By: vitalybuka

Subscribers: dvyukov, llvm-commits, #sanitizers

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D78114
2020-04-16 17:19:52 -07:00
Wouter van Oortmerssen 7bf4248521 [WebAssembly] fixed target index strings in DebugInfo test 2020-04-16 17:11:14 -07:00
Wouter van Oortmerssen 48139ebc3a [WebAssembly] Add int32 DW_OP_WASM_location variant
This to allow us to add reloctable global indices as a symbol.
Also adds R_WASM_GLOBAL_INDEX_I32 relocation type to support it.

See discussion in https://github.com/WebAssembly/debugging/issues/12
2020-04-16 16:32:17 -07:00
Craig Topper 798b262c3c [CallSite removal][IPO] Change implementation of AbstractCallSite to store a CallBase* instead of CallSite. NFCI.
CallSite will likely be removed soon, but AbstractCallSite serves a different purpose and won't be going away.

This patch switches it to internally store a CallBase* instead of a
CallSite. The only interface changes are the removal of the getCallSite
method and getCallBackUses now takes a CallBase&. These methods had only
a few callers that were easy enough to update without needing a
compatibility shim.

In the future once the other CallSites are gone, the CallSite.h
header should be renamed to AbstractCallSite.h

Differential Revision: https://reviews.llvm.org/D78322
2020-04-16 16:24:45 -07:00
Lang Hames 386f1c114d [Object] Remove conditional layout of bitfields in MachO::relocation_info.
This removes the conditional layout of relocation_info bitfields that was
introduced in 3ccd677bf (svn r358839). The platform relocation_info
struct (defined in usr/include/mach-o/reloc.h) does not define the layout of
this struct differently on big-endian platforms and we want to keep the LLVM
and platform definitions in sync.

To fix the bug that 3ccd677bf addressed this patch modifies JITLink to construct
its relocation_info structs from the raw relocation words using shift and mask
operations.
2020-04-16 16:17:36 -07:00
Richard Smith 9a709dd2bb llvm-addr2line: assume addresses on the command line are hexadecimal rather than attempting to guess the base based on the form of the number.
Summary:
This matches the behavior of GNU addr2line. We previously treated
hexadecimal addresses as binary if they started with 0b, otherwise as
octal if they started with 0, otherwise as decimal.

This only affects llvm-addr2line; the behavior of llvm-symbolize is
unaffected.

Reviewers: ikudrin, rupprecht, jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73306
2020-04-16 16:16:21 -07:00
Julian Lettner 80022ae2b5 [UBSan] Fix vptr checks on arm64e
Fix UBSan's vptr checks in the presence of arm64e pointer signing.

Radar-Id: rdar://61786404

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D78230
2020-04-16 16:09:05 -07:00
Sam McCall 63725df1d6 [clangd] Remove unused and underused helpers. NFC 2020-04-17 01:08:32 +02:00
Sam McCall b0c4dfb3b1 [clangd] Print PID on windows too 2020-04-17 01:00:42 +02:00
Stephen Neuendorffer 26805f0b64 [MLIR][cmake] Use DEPENDS instead of add_dependencies()
add_llvm_library() sometimes needs access to the dependencies in order to
generate new targets.  Using DEPENDS allows this.

Differential Revision: https://reviews.llvm.org/D78321
2020-04-16 15:53:13 -07:00
Eric Fiselier af2968e37f [clang] Fix invalid comparator in tablegen
Summary: The current version of the comparator does not introduce a strict weak ordering.

Reviewers: fowles, bkramer, sdesmalen

Reviewed By: sdesmalen

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78323
2020-04-16 18:38:32 -04:00
Davide Italiano ce7790044f [DWARF] Rename a function and comment it for clarity.
Pointed out by Adrian.
2020-04-16 15:37:09 -07:00
Jonas Devlieghere d10386e177 [lldb/Utility] Provide a stringify_append overload for function pointers.
Converting a function pointer to an object pointer is illegal as nothing
requires it to be in the same address space. Add an overload for
function pointers so we don't convert do this illegal conversion, and
simply print out "function pointer".
2020-04-16 15:35:51 -07:00
Jason Molenda 7fa342bd2a Remove attach-failed-due-to-SIP checks which were not working
The SIP debugserver was calling in attach_failed_due_to_sip
haven't worked for a while; remove them.  To check this
properly we'd need debugsever to call out to codesign(1) to
inspect the entitlements, or the equivalant API,
and I'm not interested in adding that at this point.  SIP
is has been the default on macOS for a couple of releases
and it's expected behavior now.

<rdar://problem/59198052>
2020-04-16 15:22:14 -07:00
Nicolas Vasilache 40d139c620 [mlir][Linalg] NFC - Split out EDSCs that require a Folder
Summary: This is an NFC cleanup in preparation for end-to-end named Linalg ops.

Differential Revision: https://reviews.llvm.org/D78331
2020-04-16 18:06:05 -04:00
Bob Haarman cc5c58889e [WPD] Avoid noalias assumptions in unique return value optimization
Summary:
Changes the type of the @__typeid_.*_unique_member imports we generate
for unique return value optimization from i8 to [0 x i8]. This
prevents assuming that these imports do not alias, such as when
two unique return values occur in the same vtable.

Fixes PR45393.

Reviewers: tejohnson, pcc

Reviewed By: pcc

Subscribers: aganea, hiraditya, rnk, george.burgess.iv, dblaikie, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77421
2020-04-16 14:49:51 -07:00
Stephen Neuendorffer 314f00a034 [MLIR][cmake] Remove redundant add_dependencies()
Libraries declared as target_link_libraries() do not also need
to be declared as dependencies using add_dependencies().

Differential Revision: https://reviews.llvm.org/D78320
2020-04-16 14:41:54 -07:00
Florian Hahn c2171457e2 [SCCP] Add widening test case. 2020-04-16 22:39:52 +01:00
Benjamin Kramer ccc43e337c Expose ATOMIC in the clang python bindings
Following 38ca7b11db
2020-04-16 23:35:55 +02:00
Alex Zinenko f072942fe2 [mlir] ODS: support operations with resizable operand lists
MLIR supports operations with resizable operand lists, but this property must
be indicated during the construction of such operations. It can be done
programmatically by calling a function on OperationState. Introduce an
ODS-internal trait `ResizableOperandList` to indicate such operations are use
it when generating the bodies of various `build` functions as well as the
`parse` function when the declarative assembly format is used.

Differential Revision: https://reviews.llvm.org/D78292
2020-04-16 23:30:34 +02:00
Louis Dionne 68587af9ad [libc++] Move handling of convenience substitutions outside of config.py
These substitutions are strongly tied to the operation of the test
format, so it makes sense to have them defined by the test format
instead of the Lit configuration. They should be defined regardless
of which configuration is in use.
2020-04-16 17:30:09 -04:00
Sanjay Patel b29fca30fa [x86] auto-generate complete test checks; NFC 2020-04-16 17:16:51 -04:00
David Green 94052da929 [ARM] MVE postinc tests. NFC 2020-04-16 22:05:28 +01:00
Jonas Devlieghere 9f6a308457 [lldb/Utility] Fix a bug in stringify_append for printing addresses.
The recent change in the API macros revealed that we were not printing
the pointer address for a bunch of methods, but rather the address of
the pointer. It's something I had already noticed while looking at some
reproducer traces, but hadn't made it to the top of my list yet. This
fixes the issue by providing a more specific overload.
2020-04-16 14:03:55 -07:00
Daniel S Fava 3b222ef246 tsan: fixes to ThreadClock::releaseStoreAcquire and tests
Fixes:
1. Setting the number of entries in a thread's clock to max between
   the thread and the SyncClock the thread is acquiring from
2. Setting last_acquire_

Unit- and stress-test for releaseStoreAcquire added to
tests/unit/tsan_clock_test.cpp
2020-04-16 22:53:26 +02:00
Stephen Neuendorffer f061295732 [MLIR] Complete refactoring of Affine dialect into sub-libraries.
There were some unused CMakeFiles for Affine/IR and Affine/EDSC.
This change builds separate MLIRAffineOps and MLIRAffineEDSC libraries
using those CMakeFiles.  This combination replaces the old MLIRAffine
library.

Differential Revision: https://reviews.llvm.org/D78317
2020-04-16 13:41:17 -07:00
Davide Italiano 1fae85a853 [DWARF] Add instructions to regenerate this test, if needed. 2020-04-16 13:31:32 -07:00
Davide Italiano 8cac6d1875 [Shell] Remove incorrectly cargo-culted UNSUPPORTED.
Let's see if this sticks on the bots.
2020-04-16 13:22:46 -07:00
David Green 8e8c3c3408 [ARM] Mir test for machine sinking multiple def instructions. NFC 2020-04-16 20:58:14 +01:00
Chris Lattner 39c9c12b76 [clang-tools-extra] reimplement PreprocessorTracker in terms of StringSet.
Summary:
PreprocessorTracker is the last user of the old StringPool class, which
isn't super loved and isn't a great improvement over a plan StringSet.
Once this goes in we can remove StringPool entirely.

This is as discussed on cfe-dev.

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78273
2020-04-16 12:57:43 -07:00
Dan Albert 75c4408653 Reland: Don't expose unavailable cstdio functions.
Marked unsupported for C++03 and C++11 since this test uses alias
declarations, and at least one C++03 bot was failing with
-Wc++11-extensions.

Change-Id: I8c3a579edd7eb83e0bc74e85d116b68f22400161
2020-04-16 12:51:08 -07:00
Joel E. Denny ce685455e4 [FileCheck] Fix --dump-input annotation sort per input line
Without this patch, `--dump-input` annotations on a single input line
are sorted by the associated directive's check-file line.  That seemed
fine because that's often identical to the order in which FileCheck
looks for matches for those directives.

The first problem is that an `--implicit-check-not` pattern has no
check-file line.  The logical equivalent is sorting in command-line
order, but that's not implemented.

The second problem is that, unlike a directive, an
`--implicit-check-not` pattern applies at many points, between many
different pairs of directives.  However, sorting in command-line order
gathers all its associated diagnostics together at one point in an
input line's list of annotations.

In general, it seems to be easier to understand FileCheck's logic when
annotations on a single input line are sorted in the order FileCheck
produced the associated diagnostics, so this patch makes that change.
As documented in the patch, the annotation sort order is also
especially relevant to `CHECK-LABEL`, `CHECK-NOT`, and `CHECK-DAG`, so
this patch updates or extends tests to check the sort makes sense for
them.  (However, the sort for `CHECK-DAG` annotations should not
actually be altered by this patch.)

Reviewed By: thopre

Differential Revision: https://reviews.llvm.org/D77607
2020-04-16 15:39:35 -04:00
Joel E. Denny b5a24610fa [FileCheck] Fix --dump-input implicit pattern location
Currently, `--dump-input` implies that all `--implicit-check-not`
patterns appear on line 1 by printing annotations like:

```
       1: foo bar baz
not:1         !~~     error: no match expected
```

This patch changes that to:

```
          1: foo bar baz
not:imp1         !~~     error: no match expected
```

`imp1` indicates the first `--implicit-check-not` pattern.

Reviewed By: thopre

Differential Revision: https://reviews.llvm.org/D77605
2020-04-16 15:39:35 -04:00
bd1976llvm 86478d3de9 [MC][ELF] Put explicit section name symbols into entry size compatible sections
Ensure that symbols explicitly* assigned a section name are placed into
a section with a compatible entry size.

This is done by creating multiple sections with the same name** if
incompatible symbols are explicitly given the name of an incompatible
section, whilst:

  - Avoiding using uniqued sections where possible (for readability and
    to maximize compatibly with assemblers).

  - Creating as few SHF_MERGE sections as possible (for efficiency).

Given that each symbol is assigned to a section in a single pass, we
must decide which section each symbol is assigned to without seeing the
properties of all symbols. A stable and easy to understand assignment is
desirable. The following rules facilitate this: The "generic" section
for a given section name will be mergeable if the name is a mergeable
"default" section name (such as .debug_str), a mergeable "implicit"
section name (such as .rodata.str2.2), or MC has already created a
mergeable "generic" section for the given section name (e.g. in response
to a section directive in inline assembly). Otherwise, the "generic"
section for a given name is non-mergeable; and, non-mergeable symbols
are assigned to the "generic" section, while mergeable symbols are
assigned to uniqued sections.

Terminology:
"default" sections are those always created by MC initially, e.g. .text
or .debug_str.

"implicit" sections are those created normally by MC in response to the
symbols that it encounters, i.e. in the absence of an explicit section
name assignment on the symbol, e.g. a function foo might be placed into
a .text.foo section.

"generic" sections are those that are referred to when a unique section
ID is not supplied, e.g. if there are multiple unique .bob sections then
".quad .bob" will reference the generic .bob section. Typically, the
generic section is just the first section of a given name to be created.
Default sections are always generic.

* Typically, section names might be explicitly assigned in source code
using a language extension e.g. a section attribute: _attribute_
((section ("section-name"))) -
https://clang.llvm.org/docs/AttributeReference.html

** I refer to such sections as unique/uniqued sections. In assembly the
", unique," assembly syntax is used to express such sections.

Fixes https://bugs.llvm.org/show_bug.cgi?id=43457.

See https://reviews.llvm.org/D68101 for previous discussions leading to
this patch.

Some minor fixes were required to LLVM's tests, for tests had been using
the old behavior - which allowed for explicitly assigning globals with
incompatible entry sizes to a section.

This fix relies on the ",unique ," assembly feature. This feature is not
available until bintuils version 2.35
(https://sourceware.org/bugzilla/show_bug.cgi?id=25380). If the
integrated assembler is not being used then we avoid using this feature
for compatibility and instead try to place mergeable symbols into
non-mergeable sections or issue an error otherwise.

Differential Revision: https://reviews.llvm.org/D72194
2020-04-16 19:12:49 +00:00
Amy Huang 2b8c6acc39 Reland "[codeview] Reference types in type parent scopes"
Summary:
Original description (https://reviews.llvm/org/D69924)
Without this change, when a nested tag type of any kind (enum, class,
struct, union) is used as a variable type, it is emitted without
emitting the parent type. In CodeView, parent types point to their inner
types, and inner types do not point back to their parents. We already
walk over all of the parent scopes to build the fully qualified name.
This change simply requests their type indices as we go along to enusre
they are all emitted.

Now, while walking over the parent scopes, add the types to
DeferredCompleteTypes, since they might already be in the process of
being emitted.

Fixes PR43905

Reviewers: rnk, amccarth

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78249
2020-04-16 12:08:52 -07:00
Louis Dionne 548d501082 [libc++] NFC: Reindent impossible to read conditional in __config 2020-04-16 15:02:03 -04:00
Jaydeep Chauhan 561cb14e74 [LLVM] Remove wrong DBG_VALUE instruction with one operand in AArch64 test case
Summary:
AArch64 test case llvm/test/CodeGen/AArch64/branch-target-enforcement.mir is checking for invalid  DBG_VALUE instruction with one operand(`DBG_VALUE $lr`). And this DBG_VALUE instruction is echoed from test case it self only.

Correct format of DBG_VALUE is given in below link:
https://llvm.org/docs/SourceLevelDebugging.html#variable-locations-in-instruction-selection-and-mir

Reviewers: dsanders, eli.friedman, jmorse, vsk

Reviewed By: dsanders

Subscribers: kristof.beyls, danielkiss, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78309
2020-04-16 11:58:07 -07:00
George Burgess IV 94908088a8 [CodeGen] fix inline builtin-related breakage from D78162
In cases where we have multiple decls of an inline builtin, we may need
to go hunting for the one with a definition when setting function
attributes.

An additional test-case was provided on
https://github.com/ClangBuiltLinux/linux/issues/979
2020-04-16 11:54:10 -07:00
Cameron McInally 1223255c2d [AArch64][SVE] Add DestructiveBinaryImm SQSHLU patterns.
Add DestructiveBinaryImm SQSHLU patterns and tests. These patterns allow the SQSHLU instruction to match with a MOVPRFX.

Differential Revision: https://reviews.llvm.org/D76728
2020-04-16 13:48:08 -05:00
Craig Topper 84f007f7ef [CallSite removal][CodeGen] Drop some unneeded includes of CallSite.h. NFC
The uses of CallSite were removed in previous patches.
2020-04-16 11:05:35 -07:00
Craig Topper 9c7d917701 [CallSite removal][CodeGen] Remove CallSite use from BasicTTIImpl.h. NFC
While there convert iterator loops to range-based.

Differential Revision: https://reviews.llvm.org/D78275
2020-04-16 10:56:43 -07:00
LLVM GN Syncbot 6aac98f4dd [gn build] Port d9085f65db 2020-04-16 17:47:41 +00:00
Stefan Pintilie 18b6050324 [PowerPC][Future] Initial support for PC Relative addressing for global values
This patch adds PC Relative support for global values that are known at link
time. If a global value requires access through the global offset table (GOT)
it is not covered in this patch.

Differential Revision: https://reviews.llvm.org/D75280
2020-04-16 12:45:22 -05:00
Daniel Sanders d9085f65db [globalisel] Add lost debug locations verifier
Summary:
This verifier tries to ensure that DebugLoc's don't just disappear as
we transform the MIR. It observes the instructions created, erased, and
changed and at checkpoints chosen by the client algorithm verifies the
locations affected by those changes.

In particular, it verifies that:
* Every DebugLoc for an erased/changing instruction is still present on
  at least one new/changed instruction
* Failing that, that there is a line-0 location in the new/changed
  instructions. It's not possible to confirm which locations were merged so
  it conservatively assumes all unaccounted for locations are accounted
  for by any line-0 location to avoid false positives.
If that fails, it prints the lost locations in the debug output along with
the instructions that should have accounted for them.

In theory, this is usable by the legalizer, combiner, selector and any other
pass that performs incremental changes to the MIR. However, it has so far
only really been tested on the legalizer (not including the artifact
combiner) where it has caught lots of lost locations, particularly in Custom
legalizations. There's only one example here as my initial testing was on an
out-of-tree target and I haven't done a pass over the in-tree targets yet.

Depends on D77575, D77446

Reviewers: bogner, aprantl, vsk

Subscribers: jvesely, nhaehnle, mgorny, rovka, hiraditya, volkan, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77576
2020-04-16 10:43:35 -07:00
Daniel Sanders 7c6ca18fff [globalisel] Allow backends to report an issue without triggering fallback. NFC
Summary:
This will allow us to fix the issue where the lost locations
verifier causes CodeGen changes on lost locations because it
falls back on DAGISel

Reviewers: qcolombet, bogner, aprantl, vsk, paquette

Subscribers: rovka, hiraditya, volkan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D78261
2020-04-16 10:43:35 -07:00
Fangrui Song bf60953faf [MC][X86] Allow SHT_PROGBITS for .eh_frame on x86-64
GNU as emits SHT_PROGBITS .eh_frame by default for .cfi_* directives.
We follow x86-64 psABI and use SHT_X86_64_UNWIND for .eh_frame

Don't error for SHT_PROGBITS .eh_frame on x86-64.
This keeps compatibility with `.section .eh_frame,"a",@progbits` in existing assembly files.

See https://groups.google.com/d/msg/x86-64-abi/7sr4E6THl3g/zUU2UPHOAQAJ
for more discussions.

Reviewed By: joerg

Differential Revision: https://reviews.llvm.org/D76151
2020-04-16 10:42:52 -07:00
Stanislav Mekhanoshin 2e94a64b57 [AMDGPU] Define 16 bit SGPR subregs
These are needed as a counterpart for VGPR subregs even though
there are no scalar instructions which can operate 16 bit values.
When we are materializing a constant that is done into an SGPR
and that SGPR may/will be copied into a 16 bit VGPR subreg. Such
copy is illegal. There are also similar problems if a source
operand of a 16 bit VALU instruction is an SGPR. In addition
we need to get a register with a lo16 subregister of an SGPR
RC during selection and this fails as well.

All of that makes me believe we need these subregisters as a
syntactic glue.

Differential Revision: https://reviews.llvm.org/D78250
2020-04-16 10:31:39 -07:00
Jonas Devlieghere 3a6b60fa62 [lldb/Docs] Add some more info about the test suite structure
Expand on the structure of the LLDB test suite. So far this information
has been mostly "tribal knowledge". By writing it down I hope to make it
easier to understand our test suite for anyone that's new to the
project.
2020-04-16 10:17:59 -07:00