Commit Graph

181888 Commits

Author SHA1 Message Date
Matt Arsenault 965de3050f Fix comment and unnecessary check for FP build_vectors.
This was copy-paste from the integer version, but
FP build_vectors don't truncate.

llvm-svn: 216928
2014-09-02 18:33:51 +00:00
David Blaikie 78fdec5898 unique_ptrify LTOCodeGenerator::NativeObjectFile
llvm-svn: 216927
2014-09-02 18:21:06 +00:00
David Blaikie 86b9464e01 Fix for LLVM API change to SpecialCaseList::create
llvm-svn: 216926
2014-09-02 18:13:58 +00:00
David Blaikie 15913f46b2 unique_ptrify the result of SpecialCaseList::create
llvm-svn: 216925
2014-09-02 18:13:54 +00:00
Hans Wennborg e565d049ab MCSchedule.h: fix VS2012 build after r216919
llvm-svn: 216924
2014-09-02 18:00:00 +00:00
Jan Vesely ef513d392b Implement generic mad_sat
v2: Fix trailing whitespace
    Fix signed long overflow
    improve comment

v3: fix typo

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Tom Stellard <tom@stellard.net>
llvm-svn: 216923
2014-09-02 17:55:02 +00:00
Jan Vesely 62496142d5 configure: Add rpath to prepare-builtins util
v2: use space instead of '=' to make Mac happy

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Jeroen Ketema <j.ketema@imperial.ac.uk>
llvm-svn: 216922
2014-09-02 17:54:59 +00:00
David Blaikie f55e31a986 unique_ptrify FileOutputBuffer::FileOutputBuffer
llvm-svn: 216921
2014-09-02 17:49:23 +00:00
Alexey Samsonov d37bab6197 Fix left shifts of negative values in MipsDisassembler.
This bug was reported by UBSan.

llvm-svn: 216920
2014-09-02 17:49:16 +00:00
Pete Cooper 1175945710 Change MCSchedModel to be a struct of statically initialized data.
This removes static initializers from the backends which generate this data, and also makes this struct match the other Tablegen generated structs in behaviour

Reviewed by Andy Trick and Chandler C

llvm-svn: 216919
2014-09-02 17:43:54 +00:00
David Blaikie 505e1b829f unique_ptrify PBQPBuilder::build
llvm-svn: 216918
2014-09-02 17:42:01 +00:00
Alexey Samsonov 9ca4870b49 Fix signed integer overflow in PPCInstPrinter.
This bug was reported by UBSan.

llvm-svn: 216917
2014-09-02 17:38:34 +00:00
David Blaikie 14f7301392 Correct unique_ptr passing in MCObjectDisassembler::setFallbackRegion
Rather than passing by lvalue reference, pass by value to ensure that
the caller provides an rvalue (and use move assignment, rather than
release+reset, to assign to the member variable)

llvm-svn: 216916
2014-09-02 17:29:51 +00:00
Alexey Samsonov 1b0713ce09 Fix left shifts by too large exponents in MCParser
(which happened only on error recovery path).

This bug was reported by UBSan.

llvm-svn: 216915
2014-09-02 17:25:29 +00:00
Andrea Di Biagio b9de900788 Revert: [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.
This reverts revision 216913; the new test added at revision 216913
caused regression failures on a couple of buildbots.

llvm-svn: 216914
2014-09-02 17:22:49 +00:00
Andrea Di Biagio 7676fe1878 [APFloat] Fixed a bug in method 'fusedMultiplyAdd'.
When folding a fused multiply-add builtin call, make sure that we propagate the
correct result in the case where the addend is zero, and the two other operands
are finite non-zero.

Example:
  define double @test() {
    %1 = call double @llvm.fma.f64(double 7.0, double 8.0, double 0.0)
    ret double %1
  }

Before this patch, the instruction simplifier wrongly folded the builtin call
in function @test to constant 'double 7.0'.
With this patch, method 'fusedMultiplyAdd' correctly evaluates the multiply and
propagates the expected result (i.e. 56.0).

Added test fold-builtin-fma.ll with the reproducible from PR20832 plus extra
test cases to verify the behavior of method 'fusedMultiplyAdd' in the presence
of NaN/Inf operands.

This fixes PR20832.

Differential Revision: http://reviews.llvm.org/D5152

llvm-svn: 216913
2014-09-02 16:44:56 +00:00
JF Bastien 12cc99eb13 Add missing override on ARMAsmBackend's dtor.
Test Plan: ninja check && ninja clang-test

Subscribers: aemerson

Differential Revision: http://reviews.llvm.org/D5075

llvm-svn: 216912
2014-09-02 16:26:55 +00:00
David Majnemer 49428105aa LICM: Don't crash when an instruction is used by an unreachable BB
Summary:
BBs might contain non-LCSSA'd values after the LCSSA pass is run if they
are unreachable from the entry block.

Normally, the users of the instruction would be PHIs but the unreachable
BBs have normal users; rewrite their uses to be undef values.

An alternative fix could involve fixing this at LCSSA but that would
require this invariant to hold after subsequent transforms.  If a BB
created an unreachable block, they would be in violation of this.

This fixes PR19798.

Differential Revision: http://reviews.llvm.org/D5146

llvm-svn: 216911
2014-09-02 16:22:00 +00:00
Alexey Samsonov 729b12ede3 Fix left shifts of negative integers in AArch64 InstPrinter/Disassembler
Summary:
Left shift of negative integer is an undefined behavior, and
is reported by UBSan. It's ok for imm values to be negative, so we can
just replace left shifts with multiplications.

Test Plan: check-llvm test suite

Reviewers: t.p.northover

Reviewed By: t.p.northover

Subscribers: aemerson, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D5132

llvm-svn: 216910
2014-09-02 16:19:41 +00:00
Marshall Clow bbb3a7f51c Fix PR#20834 - 'is_trivially_destructible yeilds wrong answer for arrays of unknown bound' Thanks to K-ballo for the bug report. Update a few of the other tests while we're here, and fix a typo in a test name.
llvm-svn: 216909
2014-09-02 16:19:38 +00:00
Hal Finkel e19006ea22 Enable splitting indexing from loads with TargetConstants
When I recommitted r208640 (in r216898) I added an exclusion for TargetConstant
offsets, as there is no guarantee that a backend can handle them on generic
ADDs (even if it generates them during address-mode matching) -- and,
specifically, applying this transformation directly with TargetConstants caused
a self-hosting failure on PPC64. Ignoring all TargetConstants, however, is less
than ideal. Instead, for non-opaque constants, we can convert them into regular
constants for use with the generated ADD (or SUB).

llvm-svn: 216908
2014-09-02 16:05:23 +00:00
Todd Fiala c5c4e3a35b Linux ARM64: add ProcessMonitor-related RegisterContext support.
See http://reviews.llvm.org/D5089 for more details.

Change by Paul Osmialowski.

llvm-svn: 216907
2014-09-02 14:50:01 +00:00
Dmitry Vyukov 26411d6929 tsan: more precise handling of atexit callbacks
Fixes issue https://code.google.com/p/thread-sanitizer/issues/detail?id=74

llvm-svn: 216906
2014-09-02 14:22:31 +00:00
Rafael Espindola 4dd3677b5f Replace -use-init-array with -use-ctors.
We have been using .init-array for most systems for quiet some time,
but tools like llc are still defaulting to .ctors because the old
option was never changed.

This patch makes llc default to .init-array and changes the option to
be -use-ctors.

Clang is not affected by this. It has its own fancier logic.

llvm-svn: 216905
2014-09-02 13:54:53 +00:00
Dmitry Vyukov 8bbb17dcc3 tsan: disable getpwent interceptors
There interceptors do not seem to be strictly necessary for tsan.
But we see cases where the interceptors consume 70% of execution time.
Memory blocks passed to fgetgrent_r are "written to" by tsan several times.
First, there is some recursion (getgrnam_r calls fgetgrent_r), and each
function "writes to" the buffer. Then, the same memory is "written to"
twice, first as buf and then as pwbufp (both of them refer to the same addresses).

llvm-svn: 216904
2014-09-02 12:51:11 +00:00
Dmitry Vyukov 1841219abd tsan: restructure signal handling to allow recursive handling
Fixes issue
https://code.google.com/p/thread-sanitizer/issues/detail?id=71

llvm-svn: 216903
2014-09-02 12:27:45 +00:00
Aaron Ballman 8ca53885fa Silencing an MSVC C4334 warning ('<<' : result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?)). NFC.
llvm-svn: 216902
2014-09-02 12:19:02 +00:00
Benjamin Kramer 3500845f07 Remove unused AST matcher.
llvm-svn: 216901
2014-09-02 09:46:43 +00:00
Dmitry Vyukov dc1caa7cb8 tsan: address comments in r214912
See http://reviews.llvm.org/D4794

llvm-svn: 216900
2014-09-02 09:34:34 +00:00
David Xu 052b9d9282 Merge Extend and Shift into a UBFX
llvm-svn: 216899
2014-09-02 09:33:56 +00:00
Hal Finkel 51e6fa2201 Revert "Revert '[DAGCombiner] Split up an indexed load if only the base pointer value is live'"
I reverted r208640 in r209747 because r208640 broke self-hosting on PPC64. The
underlying cause of the failure is that pre-inc loads with increments
represented by ISD::TargetConstants were being transformed into ISD:::ADDs with
ISD::TargetConstant operands. PPC doesn't have a pattern for those, and so they
were selected as invalid r+r adds.

This recommits r208640, rebased and with an exclusion for ISD::TargetConstant
increments. This behavior seems correct, although in the future we might want
to ask the target to split out the indexing that uses ISD::TargetConstants.

Unfortunately, I don't yet have small test case where the relevant invalid
'add' instruction is not itself dead (and thus eliminated by
DeadMachineInstructionElim -- sometimes bugpoint is too good at removing things)

Original commit message (by Adam Nemet):

Right now the load may not get DCE'd because of the side-effect of updating
the base pointer.

This can happen if we lower a read-modify-write of an illegal larger type
(e.g. i48) such that the modification only affects one of the subparts (the
lower i32 part but not the higher i16 part).  See the testcase.

In order to spot the dead load we need to revisit it when SimplifyDemandedBits
decided that the value of the load is masked off.  This is the
CommitTargetLoweringOpt piece.

I checked compile time with ARM64 by sending SPEC bitcode files through llc.
No measurable change.

Fixes <rdar://problem/16031651>

llvm-svn: 216898
2014-09-02 06:24:04 +00:00
Hal Finkel 51b3fd1e28 [PowerPC] Guard against illegal selection of add for TargetConstant operands
r208640 was reverted because it caused a self-hosting failure on ppc64. The
underlying cause was the formation of ISD::ADD nodes with ISD::TargetConstant
operands. Because we have no patterns for 'add' taking 'timm' nodes, these are
selected as r+r add instructions (which is a miscompile). Guard against this
kind of behavior in the future by making the backend crash should this occur
(instead of silently generating invalid output).

llvm-svn: 216897
2014-09-02 06:23:54 +00:00
Saleem Abdulrasool d1a4ed6a7c CodeGen: indicate Windows unwind data format
The structures for Windows unwinding are shared across multiple platforms.
Indicate the encoding to be used for the particular target.  Use this to switch
the unwind emitter instantiated by the AsmPrinter.

llvm-svn: 216895
2014-09-01 23:48:39 +00:00
Saleem Abdulrasool 0fba7b5856 CodeGen: split out the Win64Exception emitter
Move the Windows unwind information emitter into a separate header.  This is not
related to DWARF based emission.  NFC.

llvm-svn: 216894
2014-09-01 23:48:34 +00:00
Saleem Abdulrasool d458091907 MC: remove unnecessary enumeration prefix
This is an enum class, and will be appropriately prefixed, making the encoding
type prefix redundant.  No change to any uses as the use of this was not yet
introduced.

llvm-svn: 216893
2014-09-01 23:48:29 +00:00
Rafael Espindola fa8d024210 Test cleanup: move CHECK close to code.
llvm-svn: 216892
2014-09-01 22:29:32 +00:00
David Majnemer d4cffcf073 SROA: Don't insert instructions before a PHI
SROA may decide that it needs to insert a bitcast and would set it's
insertion point before a PHI.  This will create an invalid module
right quick.

Instead, choose the first insertion point in the basic block that holds
our PHI.

This fixes PR20822.

Differential Revision: http://reviews.llvm.org/D5141

llvm-svn: 216891
2014-09-01 21:20:14 +00:00
David Majnemer d2df50196f Revert "Revert two GEP-related InstCombine commits"
This reverts commit r216698 which reverted r216523 and r216598.

We would attempt to perform the transformation even if the match()
failed because, as a side effect, it would set V.  This would trick us
into believing that we correctly found a place to correctly apply the
transform.

An additional test case was added to getelementptr.ll so that we might
not regress in the future.

llvm-svn: 216890
2014-09-01 21:10:02 +00:00
Sanjay Patel 601492a3e3 Use an integer constant for FABS / FNEG (x86).
This change will ease refactoring LowerFABS() and LowerFNEG() 
since they have a lot of overlap.

Remove the creation of a floating point constant from an integer
because it's going to be used for a bitwise integer op anyway.

No change to codegen expected, but the verbose comment string
for asm output may change from float values to hex (integer),
depending on whether the constant already exists or not.

Differential Revision: http://reviews.llvm.org/D5052

llvm-svn: 216889
2014-09-01 19:01:47 +00:00
David Majnemer 9676a2bc47 Frontend: Reindent Opts.CoverageFile
No functional change intended.

llvm-svn: 216888
2014-09-01 18:50:05 +00:00
David Majnemer ca32f9342b MS ABI: Reindent MicrosoftCXXABI::GetVirtualBaseClassOffset
No functional change intended.

llvm-svn: 216887
2014-09-01 18:50:02 +00:00
Sanjay Patel 5ad239e15a Add a convenience method to copy wrapping, exact, and fast-math flags (NFC).
The loop vectorizer preserves wrapping, exact, and fast-math properties of scalar instructions.
This patch adds a convenience method to make that operation easier because we need to do this
in the loop vectorizer, SLP vectorizer, and possibly other places.

Although this is a 'no functional change' patch, I've added a testcase to verify that the exact
flag is preserved by the loop vectorizer. The wrapping and fast-math flags are already checked
in existing testcases.

Differential Revision: http://reviews.llvm.org/D5138

llvm-svn: 216886
2014-09-01 18:44:57 +00:00
Alexander Potapenko 3ae9193371 [libsanitizer] Fix the Android build.
llvm-svn: 216885
2014-09-01 15:38:16 +00:00
Evgeniy Stepanov 21202ba8dd [asan] Update asan_device_setup to support Android L Preview.
llvm-svn: 216884
2014-09-01 15:37:50 +00:00
Jingyue Wu 263bab01f8 Fix a typo in comments in r216862, NFC
PR20766 -> PR20776. Thanks Roman Divacky for the catch!

llvm-svn: 216883
2014-09-01 14:55:04 +00:00
Alexander Potapenko a909e493f1 [libsanitizer] Make sanitizer_unwind_posix.cc a libcdep source file.
Guard the source with #if SANITIZER_POSIX to fix compilation on Windows.
use it only in 

llvm-svn: 216882
2014-09-01 13:07:50 +00:00
Tilmann Scheller 659dfb4dc8 [ARM] Add Thumb-2 code size optimization regression test for EOR.
llvm-svn: 216881
2014-09-01 12:59:34 +00:00
Tilmann Scheller 2fc1adcaff ARM] Add Thumb-2 code size optimization regression test for BIC.
llvm-svn: 216880
2014-09-01 12:53:29 +00:00
Yuri Gorshenin c107d147dc [asan-assembly-instrumentation] Prologue and epilogue are moved out from InstrumentMemOperand().
Reviewers: eugenis

Subscribers: llvm-commits

Differential revision: http://reviews.llvm.org/D4923

llvm-svn: 216879
2014-09-01 12:51:00 +00:00
Dmitry Vyukov 34fb3799a3 tsan: fix false positive related to signal handlers
Users expect synchronization between sigaction and arrival
of the signal. See the test for details.

llvm-svn: 216878
2014-09-01 12:46:42 +00:00