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14155 Commits

Author SHA1 Message Date
Jim Grosbach 958feffa11 Thumb2 parsing and encoding for EOR. 
llvm-svn: 139199
 2011-09-06 22:44:50 +00:00
Jim Grosbach ed9399995a Thumb2 parsing and encoding for DSB. 
llvm-svn: 139194
 2011-09-06 22:19:40 +00:00
Jim Grosbach e95f46384e Thumb2 parsing and encoding for DMB. 
llvm-svn: 139193
 2011-09-06 22:14:58 +00:00
Nick Lewycky 474c455060 Disable these tests harder. They're XFAIL'd, but that means they still run, and 
these tests all infinitely recurse, bringing my system down into swapping hell.

llvm-svn: 139192
 2011-09-06 22:08:18 +00:00
Jim Grosbach c048b905b4 Thumb2 parsing and encoding for DBG. 
llvm-svn: 139191
 2011-09-06 22:06:40 +00:00
Jim Grosbach 565e2f5752 Thumb2 parsing and encoding for CMN and CMP. 
llvm-svn: 139188
 2011-09-06 21:44:58 +00:00
Nick Lewycky e0aa54bb98 This transform only handles two-operand AddRec's. Prevent it from trying to 
handle anything more complex. Fixes PR10383 again!

llvm-svn: 139186
 2011-09-06 21:42:18 +00:00
Jim Grosbach 70532e289f Thumb2 parsing and encoding for CLZ. 
llvm-svn: 139177
 2011-09-06 20:44:17 +00:00
Jim Grosbach 803898f119 Thumb2 parsing and encoding for CLREX. 
llvm-svn: 139172
 2011-09-06 20:27:04 +00:00
Owen Anderson b041e866b0 Port more encoding tests over to Thumb2 decoding tests. 
llvm-svn: 139171
 2011-09-06 20:26:34 +00:00
Jim Grosbach 6952281037 Thumb2 parsing and encoding for CDP/CDP2. 
llvm-svn: 139168
 2011-09-06 20:12:23 +00:00
Evan Cheng 0b758ed6ba Fix fall outs from my recent change on how carry bit is modeled during isel. 
Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well.
Also fix isel hook to correctly set the optional operand.
rdar://10073745

llvm-svn: 139157
 2011-09-06 18:52:20 +00:00
Owen Anderson 58704ee442 Try again at r138809 (make DSE more aggressive in removing dead stores at the end of a function), now with less deleting stores before memcpy's. 
llvm-svn: 139150
 2011-09-06 18:14:09 +00:00
Jakob Stoklund Olesen 50ef7611aa Atomic pseudos don't use (as in read) CPSR. They clobber it. 
llvm-svn: 139148
 2011-09-06 17:40:35 +00:00
Duncan Sands a098436b32 Split the init.trampoline intrinsic, which currently combines GCC's 
init.trampoline and adjust.trampoline intrinsics, into two intrinsics
like in GCC.  While having one combined intrinsic is tempting, it is
not natural because typically the trampoline initialization needs to
be done in one function, and the result of adjust trampoline is needed
in a different (nested) function.  To get around this llvm-gcc hacks the
nested function lowering code to insert an additional parent variable
holding the adjust.trampoline result that can be accessed from the child
function.  Dragonegg doesn't have the luxury of tweaking GCC code, so it
stored the result of adjust.trampoline in the memory GCC set aside for
the trampoline itself (this is always available in the child function),
and set up some new memory (using an alloca) to hold the trampoline.
Unfortunately this breaks Go which allocates trampoline memory on the
heap and wants to use it even after the parent has exited (!).  Rather
than doing even more hacks to get Go working, it seemed best to just use
two intrinsics like in GCC.  Patch mostly by Sanjoy Das.

llvm-svn: 139140
 2011-09-06 13:37:06 +00:00
Nick Lewycky 658bdb5133 The logic inside getMulExpr to simplify {a,+,b}*{c,+,d} was wrong, which was 
visible given a=b=c=d=1, on iteration #1 (the second iteration). Replace it with
correct math. Fixes PR10383!

llvm-svn: 139133
 2011-09-06 05:05:14 +00:00
Nick Lewycky b1438c763a Revert r139126 due to selfhost failures reported by buildbots. 
llvm-svn: 139130
 2011-09-06 02:43:13 +00:00
Nick Lewycky c4c43fbb07 Teach SCEV to report a max backedge count in one interesting case in 
HowFarToZero; the case for a canonical loop.

llvm-svn: 139126
 2011-09-05 23:25:16 +00:00
Benjamin Kramer 4b79c21ef2 InstSimplify: Don't try to replace an extractvalue/insertvalue pair with the original value if types don't match. 
Fixes clang selfhost.

llvm-svn: 139120
 2011-09-05 18:16:19 +00:00
Duncan Sands 29192d042e Delete trivial landing pads that just continue unwinding the caught 
exception.

llvm-svn: 139117
 2011-09-05 12:57:57 +00:00
Duncan Sands fd26a954a8 Add some simple insertvalue simplifications, for the purpose of cleaning 
up do-nothing exception handling code produced by dragonegg.

llvm-svn: 139113
 2011-09-05 06:52:48 +00:00
Dan Gohman 5423017526 Revert r129875, XFAILing this test for arm, since the fix was reverted. 
llvm-svn: 139058
 2011-09-03 00:14:24 +00:00
Jakob Stoklund Olesen 1f72dd40c7 Pseudo CMOV instructions don't clobber EFLAGS. 
The explanation about a 0 argument being materialized as xor is no
longer valid.  Rematerialization will check if EFLAGS is live before
clobbering it.

The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.

This causes one less testb instruction to be generated in the cmov.ll
test case.

llvm-svn: 139057
 2011-09-02 23:52:55 +00:00
Jim Grosbach f347d1d772 Thumb2 parsing and encoding for CBZ/CBNZ. 
llvm-svn: 139054
 2011-09-02 23:46:10 +00:00
Jim Grosbach 34842ceb97 Thumb2 parsing and encoding for BXJ. 
llvm-svn: 139053
 2011-09-02 23:43:09 +00:00
Jim Grosbach 9e55023ca7 Thumb2 parsing and encoding for BIC. 
llvm-svn: 139052
 2011-09-02 23:37:54 +00:00
Jim Grosbach 93e3fd29b2 Thumb2 parsing and encoding for BFI. 
llvm-svn: 139051
 2011-09-02 23:28:46 +00:00
Jim Grosbach be31448d99 Thumb2 parsing and encoding for BFC. 
llvm-svn: 139050
 2011-09-02 23:25:46 +00:00
Jim Grosbach a0d34d3b5e Thumb2 parsing and encoding of B instruction. 
Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

llvm-svn: 139049
 2011-09-02 23:22:08 +00:00
Bill Wendling 4aa2573748 Try to eliminate the use of the 'unwind' instruction. 
llvm-svn: 139046
 2011-09-02 22:41:11 +00:00
Eli Friedman f3dd6da7a8 Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel. 
llvm-svn: 139044
 2011-09-02 22:33:24 +00:00
Jim Grosbach a216debb37 Thumb2 parsing and encoding for ASR. 
For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

llvm-svn: 139040
 2011-09-02 21:28:54 +00:00
Bill Wendling 912668d998 Better fix for this testcase. Update it to the new EH scheme entirely. 
llvm-svn: 139039
 2011-09-02 21:27:08 +00:00
Bill Wendling 17706bcffb Update for new EH stuff. (I'm not sure if this is 100% correct.) 
llvm-svn: 139038
 2011-09-02 21:24:17 +00:00
Andrew Trick 310a448cfe Test case update for unroll-scev. 
llvm-svn: 139037
 2011-09-02 21:21:03 +00:00
Kevin Enderby 5b03f72292 Change X86 disassembly to print immediates values as signed by default. Special 
case those instructions that the immediate is not sign-extend.  radr://8795217

llvm-svn: 139028
 2011-09-02 20:01:23 +00:00
Jim Grosbach 370e923434 Thumb2 parsing and encoding for AND (register). 
llvm-svn: 139021
 2011-09-02 18:41:35 +00:00
Jim Grosbach 2761155203 Thumb2 parsing and encoding for ADD (register). 
llvm-svn: 139017
 2011-09-02 18:14:46 +00:00
Duncan Sands 5c04c62765 Darwin wants ctors/dtors to be ordered the other way round to linux. 
llvm-svn: 139015
 2011-09-02 18:07:19 +00:00
Kevin Enderby 54e09b4799 Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. 
llvm-svn: 139014
 2011-09-02 18:03:03 +00:00
Jim Grosbach b861b2b475 Tests for Thumb2 AND (immediate) instruction. 
llvm-svn: 139013
 2011-09-02 17:44:27 +00:00
Jakub Staszak 63a3a0e010 Extra CHECK-NOT to make sure that GVN transform works properly. 
llvm-svn: 139012
 2011-09-02 17:40:39 +00:00
Andrew Trick 4a31ba3bae -unroll-scev flag removal 
llvm-svn: 139010
 2011-09-02 17:36:14 +00:00
Jim Grosbach c302f5cce7 Add FIXME. Thumb2 ADR encoding choice is non-trivial. 
llvm-svn: 139008
 2011-09-02 17:21:59 +00:00
Jakub Staszak 057d423e4b ConstantVector returns arbitrary value for the wrong index. 
This fixes PR10813.

llvm-svn: 139006
 2011-09-02 15:43:43 +00:00
Jakub Staszak 7470fb01d0 Compare type size instead of type _store_ size to make sure that BitCastInst 
will be valid. This fixes PR10820.

llvm-svn: 139005
 2011-09-02 14:57:37 +00:00
Kalle Raiskila f5769c1070 Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction. 
llvm-svn: 139004
 2011-09-02 10:05:01 +00:00
Craig Topper 94ce535647 Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. 
llvm-svn: 138997
 2011-09-02 04:17:54 +00:00
Bill Wendling 723cec7a5f Update to new EH scheme. 
llvm-svn: 138989
 2011-09-02 01:25:11 +00:00
Dan Gohman 3767be9aee Revert r131152, r129796, r129761. This code is currently considered 
to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.

llvm-svn: 138977
 2011-09-01 23:07:08 +00:00