Commit Graph

183707 Commits

Author SHA1 Message Date
Martin Storsjo 100957153a [test] Fix tests when run on windows after SVN r369426. NFC.
When running tests on windows, invoking "llc -march=<arch>" will
implicitly use windows as the target os, making these tests misbehave
after this change.

Fix the issue by using more specific -mtriple values instead of plain
-march in these tests.

This should hopefully fix buildbot failures like
http://lab.llvm.org:8011/builders/clang-x64-windows-msvc/builds/9816.

llvm-svn: 369443
2019-08-20 20:58:02 +00:00
Wenlei He 5adace352d [AutoFDO] Make call targets order deterministic for sample profile
Summary:
StringMap is used for storing call target to frequency map for AutoFDO. However the iterating order of StringMap is non-deterministic, which leads to non-determinism in AutoFDO profile output. Now new API getSortedCallTargets and SortCallTargets are added for deterministic ordering and output.

Roundtrip test for text profile and binary profile is added.

Reviewers: wmi, davidxl, danielcdh

Subscribers: hiraditya, mgrang, llvm-commits, twoh

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66191

llvm-svn: 369440
2019-08-20 20:52:00 +00:00
Sanjay Patel 48e81e8e10 [InstCombine] add tests for mismatched cast ops for icmp; NFC
Motivating case is shown in PR42700:
https://bugs.llvm.org/show_bug.cgi?id=42700

llvm-svn: 369439
2019-08-20 20:51:50 +00:00
Jinsong Ji 6f833c6fe1 [llvm-extract] Update the help message for group extraction feature
Summary:
https://reviews.llvm.org/D60973 exposed the group extraction feature of
the BlockExtractor to llvm-extract.
However, the help message was not updated, so users might not be able to
know how to use this feature without looking into history/commits.

This patch just update the help message to show how to use this group
extraction feature.

Reviewers: qcolombet, volkan

Reviewed By: qcolombet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66438

llvm-svn: 369438
2019-08-20 20:45:16 +00:00
Craig Topper 3a2b08e6c9 [X86] Add a DAG combine to transform (i8 (bitcast (v8i1 (extract_subvector (v16i1 X), 0)))) -> (i8 (trunc (i16 (bitcast (v16i1 X))))) on KNL target
Without AVX512DQ we don't have KMOVB so we can't really copy 8-bits of a k-register to a GPR. We have to copy 16 bits instead. We do this even if the DAG copy is from v8i1->v16i1. If we detect the (i8 (bitcast (v8i1 (extract_subvector (v16i1 X), 0)))) we should rewrite the types to match the copy we do support. By doing this, we can help known bits to propagate without losing the upper 8 bits of the input to the extract_subvector. This allows some zero extends to be removed since we have an isel pattern to use kmovw for (zero_extend (i16 (bitcast (v16i1 X))).

Differential Revision: https://reviews.llvm.org/D66489

llvm-svn: 369434
2019-08-20 20:20:04 +00:00
Craig Topper 250951abf5 [X86] Add isel patterns for (i64 (zext (i8 (bitcast (v16i1 X))))) to use a KMOVW and a SUBREG_TO_REG. Similar for i8 and anyextend.
We already had patterns for extending to i32 to take advantage of
the impliciting zeroing of the upper bits of a 32-bit GPR that is
done by KMOVW/KMOVB. But the extend might be all the way to i64,
in which case the existing patterns would fail and we'd get a
KMOVW/B followed by a MOVZX. By adding patterns for i64 we can
use the fact that KMOVW/B zero the upper bits of the 32-bit GPR
and the normal property that 32-bit GPR writes implicitly zero the
upper 32-bits of the full 64-bit GPR.

The anyextend patterns are slightly different since we don't care
about the upper zeros. For the i8->i64 I think this avoids selecting
the anyextend as a MOVZX to prevent a partial register issue that
doesn't exist. For i16->i64 I think we would have just emitted an
insert_subreg on top of the extract_subreg that the vXi16->i16
bitcast pattern emits. The register coalescer or peephole pass
should combine those, but this saves that work and makes i8/16
consistent.

llvm-svn: 369431
2019-08-20 19:43:48 +00:00
Martin Storsjo 514f3a122d [TargetMachine] Don't try to create COFFSTUB references on windows on non-COFF
This avoids spurious relocation types for windows/elf targets.

Differential Revision: https://reviews.llvm.org/D66401

llvm-svn: 369426
2019-08-20 18:58:05 +00:00
Sam Clegg cf2b8722d4 [WebAssembly][lld] Fix crash when applying relocations to debug sections
Debug sections are special in that they can contain relocations against
symbols that are not present in the final output (i.e. not live).
However it is also possible to have R_WASM_TABLE_INDEX relocations
against symbols that don't have a table index assigned (since they are
not address taken by actual code.

Fixes: https://github.com/emscripten-core/emscripten/issues/9023

Differential Revision: https://reviews.llvm.org/D66435

llvm-svn: 369423
2019-08-20 18:39:24 +00:00
Sanjay Patel 292b1087f4 [InstCombine] add helper function for icmp+zext/sext; NFC
llvm-svn: 369421
2019-08-20 18:15:17 +00:00
Simon Pilgrim 3b9a27b690 Fix typo in comment. NFCI.
llvm-svn: 369419
2019-08-20 17:54:37 +00:00
Matt Arsenault 4b7fc85c0b Revert "AMDGPU: Fix iterator error when lowering SI_END_CF"
This reverts r367500 and r369203. This is causing various test
failures.

llvm-svn: 369417
2019-08-20 17:45:25 +00:00
Andrea Di Biagio 2e897a94f5 [X86][BtVer2] Use ReadAfterLd entries for the register operands of CMPXCHG.
This is a follow-up of r369365.

llvm-svn: 369412
2019-08-20 17:05:56 +00:00
Sanjay Patel 2e68e4d60e [InstCombine] make fold for icmp with sext more efficient; NFC
We were creating 2 instructions and relying on a subsequent fold
to invert a not(icmp). Create the final icmp directly instead.

llvm-svn: 369411
2019-08-20 17:03:22 +00:00
Craig Topper 22ac9f396f [X86] Use isNullConstant instead of getConstantOperandVal == 0. NFC
llvm-svn: 369410
2019-08-20 16:55:12 +00:00
Thomas Raoux 53ab6bef98 [CodeGen] Add EarlyIfConvert test missed in previous commit
llvm-svn: 369405
2019-08-20 16:34:47 +00:00
Sam Tebbs dcfc2d40d3 [ARM] Select vaddva
This patch adds vaddva selection.

Differential revision: https://reviews.llvm.org/D66410

llvm-svn: 369404
2019-08-20 16:33:34 +00:00
Aditya Nandakumar 08bd080872 [GlobalISel] Handle multiple registers in dbg.value intrinsic
https://reviews.llvm.org/D66077

The value passed into dbg.value may relate to multiple registers,
each of which need a DBG_VALUE.

This fix calls MIRBuilder.buildDirectDbgValue for each register.

Without this, IR passed in from flang-compiler/flang may fail an
assertion in getOrCreateVReg.

Patch by : peterwaller-arm.

llvm-svn: 369403
2019-08-20 16:28:37 +00:00
Nico Weber 184bc069c6 gn build: Merge r369298
llvm-svn: 369401
2019-08-20 16:19:50 +00:00
Jan Kratochvil ed602ef480 Regex: Add isValid() with no parameter
There will be some performance (only a little) improvement for LLDB's
RegularExpression::Execute.

Differential Revision: https://reviews.llvm.org/D66463

llvm-svn: 369396
2019-08-20 16:05:23 +00:00
Thomas Raoux be699bf389 [CodeGen] Add a pass to do block predication on SSA machine IR.
For targets requiring aggressive scheduling and/or software pipeline we need to
    apply predication before preRA scheduling. This adds a pass re-using the early
    if-cvt infrastructure but generating predicated instructions instead of
    speculatively executing instructions. It allows doing if conversion on blocks
    containing instructions with side-effects. The pass re-use the target hook from
    postRA if-conversion to let the target decide on the heuristic to apply.

    Differential Revision: https://reviews.llvm.org/D66190

llvm-svn: 369395
2019-08-20 15:54:59 +00:00
Fangrui Song 494a4d1680 [llvm-objcopy][test] Add a test to show that argv[0] is included in error/warning messages
test/llvm-objcopy/ELF/error-format.test is similar to test/llvm-readobj/error-format.test added in D66425.

Reviewed By: grimar, jhenderson

Differential Revision: https://reviews.llvm.org/D66476

llvm-svn: 369392
2019-08-20 15:34:07 +00:00
Fangrui Song ebd50291e8 [llvm-objcopy] Append '\n' to warning messages
Currently the warning message of `llvm-strip %t.o %t.o` does not include
the trailing newline. Fix this by appending a '\n'.

This is the only warning llvm-objcopy and llvm-strip can issue.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D66475

llvm-svn: 369391
2019-08-20 15:00:07 +00:00
Sanjay Patel a90ee0eeb6 [InstCombine] improve readability for icmp with cast folds; NFC
1. Update function name and stale code comments.
2. Use variable names that are less ambiguous.
3. Move operand checks into the function as early exits.

llvm-svn: 369390
2019-08-20 14:56:44 +00:00
Jinsong Ji cda334ba54 [BlockExtractor] Avoid assert with wrong line format
Summary:
When the line format is wrong, we may end up accessing out of bound
memory. eg: the test with invalide line will cause assert.
Assertion `idx < size()' failed

The fix is to report fatal when we found mismatched line format.

Reviewers: qcolombet, volkan

Reviewed By: qcolombet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66444

llvm-svn: 369389
2019-08-20 14:46:02 +00:00
Andrea Di Biagio 16111d3795 [X86][BtVer2] Fix latency and throughput of atomic INC/DEC/NEG/NOT.
Latency and throughput of LOCK INC/DEC/NEG/NOT is always 19cy.
Number of uOPs is still 1.

Differential Revision: https://reviews.llvm.org/D66469

llvm-svn: 369388
2019-08-20 14:31:27 +00:00
Sanjay Patel f99d254aae [InstCombine] simplify min/max of min/max with same operands (PR35607)
This is the original integer variant requested in:
https://bugs.llvm.org/show_bug.cgi?id=35607

As noted in the TODO and several similar TODOs around this block,
we could do this in instsimplify, but then it would cost more
because we would be trying to match min/max via ValueTracking
in 2 different places.

There are 4 commuted variants for each of smin/smax/umin/umax
that are not matched here. There are also icmp predicate variants
that are not included in the affected test file because they are
already handled by instsimplify by folding the final icmp to
true/false.

https://rise4fun.com/Alive/3KVc

  Name: smax(smax, smin)
  %c1 = icmp slt i32 %x, %y
  %c2 = icmp slt i32 %y, %x
  %min = select i1 %c1, i32 %x, i32 %y
  %max = select i1 %c2, i32 %x, i32 %y
  %c3 = icmp sgt i32 %max, %min
  %r = select i1 %c3, i32 %max, i32 %min
  =>
  %r = %max

  Name: smin(smax, smin)
  %c1 = icmp slt i32 %x, %y
  %c2 = icmp slt i32 %y, %x
  %min = select i1 %c1, i32 %x, i32 %y
  %max = select i1 %c2, i32 %x, i32 %y
  %c3 = icmp sgt i32 %max, %min
  %r = select i1 %c3, i32 %min, i32 %max
  =>
  %r = %min

  Name: umax(umax, umin)
  %c1 = icmp ult i32 %x, %y
  %c2 = icmp ult i32 %y, %x
  %min = select i1 %c1, i32 %x, i32 %y
  %max = select i1 %c2, i32 %x, i32 %y
  %c3 = icmp ult i32 %min, %max
  %r = select i1 %c3, i32 %max, i32 %min
  =>
  %r = %max

  Name: umin(umax, umin)
  %c1 = icmp ult i32 %x, %y
  %c2 = icmp ult i32 %y, %x
  %min = select i1 %c1, i32 %x, i32 %y
  %max = select i1 %c2, i32 %x, i32 %y
  %c3 = icmp ult i32 %min, %max
  %r = select i1 %c3, i32 %min, i32 %max
  =>
  %r = %min

llvm-svn: 369386
2019-08-20 13:39:17 +00:00
Simon Pilgrim cec028fc14 [X86][FMA] Add FMA 'negated expression' combine tests for D63141
llvm-svn: 369384
2019-08-20 13:25:55 +00:00
Jan Kratochvil 50fdaaf5b8 Regex: +regex string lifetime comment
Differential Revision: https://reviews.llvm.org/D66464

llvm-svn: 369383
2019-08-20 13:25:19 +00:00
George Rimar b232d5649d [llvm-objdump] - Remove one of `report_error` functions and improve the error reporting.
One of the report_error functions was taking object::Archive::Child as an
argument. It feels excessive, this patch removes it and introduce a helper
function instead. Also I fixed a "TODO" in this patch what improved the message printed.

Differential revision: https://reviews.llvm.org/D66468

llvm-svn: 369382
2019-08-20 13:19:16 +00:00
Igor Kudrin 59d5abaa71 [DWARF] Fix reading 64-bit DWARF type units.
The type_offset field is 8 bytes long in DWARF64. The patch extends
TypeOffset to uint64_t and fixes its reading. The patch also fixes
checking of TypeOffset bounds as it was inaccurate in DWARF64 case.

Differential Revision: https://reviews.llvm.org/D66465

llvm-svn: 369378
2019-08-20 12:52:32 +00:00
Fangrui Song f133702800 [llvm-readobj] Prepend argv[0] to error/warning messages
Summary:
Currently, we report:

    error: ...

Prepend argv[0] (tool name):

    llvm-readobj: error: ...

This is consistent with most GNU binutils/clang/lld, and gives a bit
more context in a long build log.

Reviewed By: grimar, jhenderson, rupprecht

Differential Revision: https://reviews.llvm.org/D66425

llvm-svn: 369377
2019-08-20 12:49:15 +00:00
Sanjay Patel eb2211b352 [InstCombine] add tests for min/max with min/max of same operands; NFC
llvm-svn: 369376
2019-08-20 12:49:03 +00:00
Alex Bradbury 7cb3cd34e8 [RISCV] Implement getExprForFDESymbol to ensure RISCV_32_PCREL is used for the FDE location
Follow binutils in using RISCV_32_PCREL for the FDE initial location. As
explained in the relevant binutils commit
<a6cbf936e3>,
the ADD/SUB pair of relocations is problematic in the presence of linker
relaxation.

This patch has the same end goal as D64715 but includes test changes and
avoids adding a new global VariantKind to MCExpr.h (preferring
RISCVMCExpr VKs like the rest of the RISC-V backend).

Differential Revision: https://reviews.llvm.org/D66419

llvm-svn: 369375
2019-08-20 12:32:31 +00:00
Pavel Labath 51d7398f63 Recommit "MemoryBuffer: Add a missing error-check to getOpenFileImpl"
This recommits r368977, which was reverted in r369027 due to test
failures in lldb. The cause of this was different behavior of
readNativeFileSlice on windows and unix. These have been addressed in
r369269.

The original commit message was:
In case the function was called with a desired read size *and* the file
was not an "mmap()" candidate, the function was falling back to a
"pread()", but it was failing to check the result of that system call.
This meant that the function would return "success" even though the read
operation failed, and it returned a buffer full of uninitialized memory.

Reviewers: rnk, dblaikie

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66224

llvm-svn: 369370
2019-08-20 12:08:52 +00:00
Simon Pilgrim ed72e0ecf8 [CMake] Update C4324 MSVC warning comment to explain its still broken at VS2019
As promised, I've updated the comment for the C4324 MSVC warning that was re-disabled at rL367409 / rG8f823e63e3edf87ab029ba32b68f3eb5d2f392b5 to put it in terms of currently supported VS versions

llvm-svn: 369368
2019-08-20 11:20:05 +00:00
Simon Pilgrim 6a3dc3e15c [MCA][X86] Add tests for LOCK variants of standard X86 arithmetic ops
D66424 adds the base support for LOCK so we should be able to add special case support for all these cases in future patches

llvm-svn: 369367
2019-08-20 11:13:20 +00:00
Simon Pilgrim 5a28f0ae6e Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
llvm-svn: 369366
2019-08-20 10:25:57 +00:00
Andrea Di Biagio b1bdd97a26 [X86][Btver2] Fix latency and throughput of CMPXCHG instructions.
On Jaguar, CMPXCHG has a latency of 11cy, and a maximum throughput of 0.33 IPC.
Throughput is superiorly limited to 0.33 because of the implicit in/out
dependency on register EAX. In the case of repeated non-atomic CMPXCHG with the
same memory location, store-to-load forwarding occurs and values for sequent
loads are quickly forwarded from the store buffer.

Interestingly, the functionality in LLVM that computes the reciprocal throughput
doesn't seem to know about RMW instructions. That functionality only looks at
the "consumed resource cycles" for the throughput computation. It should be
fixed/improved by a future patch. In particular, for RMW instructions, that
logic should also take into account for the write latency of in/out register
operands.

An atomic CMPXCHG has a latency of ~17cy. Throughput is also limited to
~17cy/inst due to cache locking, which prevents other memory uOPs to start
executing before the "lock releasing" store uOP.

CMPXCHG8rr and CMPXCHG8rm are treated specially because they decode to one less
macro opcode. Their latency tend to be the same as the other RR/RM variants. RR
variants are relatively fast 3cy (but still microcoded - 5 macro opcodes).

CMPXCHG8B is 11cy and unfortunately doesn't seem to benefit from store-to-load
forwarding. That means, throughput is clearly limited by the in/out dependency
on GPR registers. The uOP composition is sadly unknown (due to the lack of PMCs
for the Integer pipes). I have reused the same mix of consumed resource from the
other CMPXCHG instructions for CMPXCHG8B too.
LOCK CMPXCHG8B is instead 18cycles.

CMPXCHG16B is 32cycles. Up to 38cycles when the LOCK prefix is specified. Due to
the in/out dependencies, throughput is limited to 1 instruction every 32 (or 38)
cycles dependeing on whether the LOCK prefix is specified or not.
I wouldn't be surprised if the microcode for CMPXCHG16B is similar to 2x
microcode from CMPXCHG8B. So, I have speculatively set the JALU01 consumption to
2x the resource cycles used for CMPXCHG8B.

The two new hasLockPrefix() functions are used by the btver2 scheduling model
check if a MCInst/MachineInst has a LOCK prefix. Calls to hasLockPrefix() have
been encoded in predicates of variant scheduling classes that describe lat/thr
of CMPXCHG.

Differential Revision: https://reviews.llvm.org/D66424

llvm-svn: 369365
2019-08-20 10:23:55 +00:00
Seiya Nuta b8dcc19389 [yaml2obj/obj2yaml][MachO] Fix a test failure in big endian hosts
These section contents are dummy data (0xdeadbeef) and it's endianess
does not matter.

- http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/37265

llvm-svn: 369360
2019-08-20 09:58:31 +00:00
Igor Kudrin e64af75745 [DWARF] Fix DWARFUnit::getDebugInfoSize() for 64-bit DWARF.
The calculation there was correct only for DWARF32.

Differential Revision: https://reviews.llvm.org/D66421

llvm-svn: 369356
2019-08-20 09:50:44 +00:00
Seiya Nuta 522377494b [yaml2obj/obj2yaml][MachO] Allow setting custom section data
Reviewers: alexshap, jhenderson, rupprecht

Reviewed By: alexshap, jhenderson

Subscribers: abrachet, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65799

llvm-svn: 369348
2019-08-20 08:49:07 +00:00
Seiya Nuta 36848ff8df [llvm-objcopy][MachO] Fix method names. NFC.
Reviewers: alexshap, rupprecht, jhenderson

Reviewed By: alexshap, rupprecht

Subscribers: jakehehrlich, abrachet, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65540

llvm-svn: 369346
2019-08-20 08:36:47 +00:00
George Rimar ebc8fd3c0c [test/Object] - Move/rewrite 2 more test cases.
This patch makes a change for test/Object tests responsible
for relocations.

* 2 tests were moved to llvm-readobj/llvm-objdump folders:
Object/elf-reloc-no-sym.test -> tools/llvm-readobj/elf-reloc-no-sym.test
Object/objdump-reloc-shared.test -> tools/llvm-objdump/relocations-in-nonreloc.test

* A prerecompiled binary was removed and these tests were refactored.

Differential revision: https://reviews.llvm.org/D66291

llvm-svn: 369342
2019-08-20 08:23:57 +00:00
Fangrui Song 2682340cdf [MC] Delete an overload of MCExpr::evaluateKnownAbsolute and its associated hack
The hack dated back to 2010 (r121076) and was documented by r122144:

  // FIXME: The use if InSet = Addrs is a hack. Setting InSet causes us
  // absolutize differences across sections and that is what the MachO writer
  // uses Addrs for.

llvm-svn: 369337
2019-08-20 07:42:04 +00:00
Fangrui Song f182617352 [Attributor] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after r369331
llvm-svn: 369334
2019-08-20 07:21:43 +00:00
Craig Topper 1ada137854 [X86] Add back the -x86-experimental-vector-widening-legalization comand line flag and all associated code, but leave it enabled by default
Google is reporting performance issues with the new default behavior
and have asked for a way to switch back to the old behavior while we
investigate and make fixes.

I've restored all of the code that had since been removed and added
additional checks of the command flag onto code paths that are
not otherwise guarded by a check of getTypeAction.

I've also modified the cost model tables to hopefully get us back
to the previous costs.

Hopefully we won't need to support this for very long since we
have no test coverage of the old behavior so we can very easily
break it.

llvm-svn: 369332
2019-08-20 06:58:00 +00:00
Johannes Doerfert 12cbbab9d9 [Attributor] Create abstract attributes on-demand
Before, we create the set of abstract attributes initially and then
dealt with the fact hat a lookup could fail, e.g., return a nullptr.
This patch will ensure we always return a valid object from a lookup,
allowing us not only to remove the nullptr checks but also to grow the
set of abstract attributes "in-flight" on-demand.

One can now start from those that have the best chance of improving
performance without the need to specify all they might depend on.

While this introduces some boilerplate, the usage of attributes is much
easier and cleaner now.

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66276

llvm-svn: 369331
2019-08-20 06:15:50 +00:00
Johannes Doerfert 169af994bc [Attributor][NFC] Cleanup statistics code
llvm-svn: 369330
2019-08-20 06:09:56 +00:00
Johannes Doerfert cfcca1a5b1 [Attributor] Use structured deduction for AADereferenceable
Summary:
This is analogous to D66128 but for AADereferenceable. We have the logic
concentrated in the floating value updateImpl and we use the combiner
helper classes for arguments and return values.

The regressions will go away with "on-demand" attribute creation.
Improvements are already visible in the existing tests.

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66272

llvm-svn: 369329
2019-08-20 06:08:35 +00:00
Johannes Doerfert b9b8791fed [Attributor] Use structured deduction for AANonNull
Summary:
What D66126 did for AAAlign, this patch does for AANonNull. Agian, the
logic becomes more concise and localized. Again, returned poiners are
not annotated properly but that will not be an issue if this lands with
the "on-demand" generation of attributes. First improvements due to the
genericValueTraversal are already visible.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66128

llvm-svn: 369328
2019-08-20 06:02:39 +00:00
Johannes Doerfert 028b2aa56a [Attributor] Fix the "clamp" operator
The clamp operator should not take the known of the given state as the
known is potentially based on assumed information. This also adds TODOs
to guide improvements.

llvm-svn: 369327
2019-08-20 05:57:01 +00:00
Thomas Raoux a08e139d50 [NFC] Test commit, fix some comment spelling.
llvm-svn: 369326
2019-08-20 05:21:27 +00:00
Karl-Johan Karlsson 40da6be2bd [AsmPrinter] Remove const qualifier from EmitBasicBlockStart.
Overriders may want to modify state in it. AMDGPU wants
to, but has to make its members mutable in order to do so.

Besides, EmitBasicBlockEnd is not const, so why should
Start be?

Patch by Bevin Hansson.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D66341

llvm-svn: 369325
2019-08-20 05:13:57 +00:00
Fangrui Song ce21c3e12c MCAsmMacro: add `#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)` to some dump() declarations
llvm-svn: 369324
2019-08-20 04:14:43 +00:00
Fangrui Song e828ce1b88 [WebAssembly][MC] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after r369317
llvm-svn: 369318
2019-08-20 02:02:57 +00:00
Sam Clegg ecc5e8084f [WebAssembly][MC] Simplify WasmObjectWriter::recordRelocation. NFC.
WebAssembly doesn't support PC relative relocation or relocation
expressions that can't be reduced to single symbol.

The only support for we have for fixups involving two symbols are when
both symbols are defined and withing the same section.  In this case
evaluateFixup will already have evaluated to the expression before
calling recordRelocation.

llvm-svn: 369317
2019-08-20 00:33:50 +00:00
Dinar Temirbulatov 081c57989e [SLP][NFC] Avoid repetitive calls to getSameOpcode()
We can avoid repetitive calls getSameOpcode() for already known tree elements by keeping MainOp and AltOp in TreeEntry.

Differential Revision: https://reviews.llvm.org/D64700

llvm-svn: 369315
2019-08-20 00:22:04 +00:00
Hubert Tong 71974b5175 [cmake] Link in LLVMPasses due to dependency by LLVMOrcJIT; NFC
Summary:
rL367756 (f5c40cb) increases the dependency of LLVMOrcJIT on LLVMPasses.
In particular, symbols defined in LLVMPasses that are referenced by the
destructor of `PassBuilder` are now referenced by LLVMOrcJIT through
`Speculation.cpp.o`.

We believe that referencing symbols defined in LLVMPasses in the
destructor of `PassBuilder` is valid, and that adding to the set of such
symbols is legitimate. To support such cases, this patch adds LLVMPasses
to the set of libraries being linked when linking in LLVMOrcJIT causes
such symbols from LLVMPasses to be referenced.

Reviewers: Whitney, anhtuyen, pree-jackie

Reviewed By: pree-jackie

Subscribers: mgorny, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66441

llvm-svn: 369310
2019-08-19 23:12:48 +00:00
Joel E. Denny 971a9f7eea [lit] Check for accidental external command calls
This patch extends lit's test suite to check that lit's internal shell
doesn't accidentally execute internal commands as external commands.
It does so by putting fake failing versions of those commands in
`PATH` while the entire lit test suite is running.  Without the fixes
in D65697 but with its tests, this approach catches accidental
external `env` calls.

Reviewed By: probinson

Differential Revision: https://reviews.llvm.org/D66293

llvm-svn: 369309
2019-08-19 22:59:37 +00:00
Anton Afanasyev 3f3a2573c3 [Support][Time profiler] Make FE codegen blocks to be inside frontend blocks
Summary:
Add `Frontend` time trace entry to `HandleTranslationUnit()` function.
Add test to check all codegen blocks are inside frontend blocks.
Also, change `--time-trace-granularity` option a bit to make sure very small
time blocks are outputed to json-file when using `--time-trace-granularity=0`.

This fixes http://llvm.org/pr41969

Reviewers: russell.gallop, lebedev.ri, thakis

Reviewed By: russell.gallop

Subscribers: vsapsai, aras-p, lebedev.ri, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D63325

llvm-svn: 369308
2019-08-19 22:58:26 +00:00
Matthias Gehre 5b3275e56f [ORC] fix use-after-free detected by -Wreturn-stack-address
Summary:
llvm/lib/ExecutionEngine/Orc/Layer.cpp:53:12: warning: returning address of local temporary object [-Wreturn-stack-address]

In
```
StringRef IRMaterializationUnit::getName() const {
[...]
     return TSM.withModuleDo(
        [](const Module &M) { return M.getModuleIdentifier(); });
```
`getModuleIdentifier()` returns a `const std::string &`, but the implicit return type
of the lambda is `std::string` by value, and thus the returned `StringRef` refers
to a temporary `std::string`.

Detect by annotating `llvm::StringRef` with `[[gsl::Pointer]]`.

Reviewers: lhames, sgraenitz

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66440

llvm-svn: 369306
2019-08-19 21:59:44 +00:00
Johannes Doerfert 8b962f2814 [CaptureTracker] Let subclasses provide dereferenceability information
Summary:
CaptureTracker subclasses might have better dereferenceability
information which allows null pointer checks to be no-capturing.
The first user will be D59922.

Reviewers: sanjoy, hfinkel, aykevl, sstefan1, uenoku, xbolva00

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66371

llvm-svn: 369305
2019-08-19 21:56:38 +00:00
Johannes Doerfert de7674ce76 Recommit "[Attributor] Fix: Do not partially resolve returned calls."
This reverts commit b1752f670f.

Fixed the issue with a different commit, reapply this one as it was,
afaik, not broken.

llvm-svn: 369303
2019-08-19 21:35:31 +00:00
Seiya Nuta 12bd490427 Recommit "[llvm-objcopy][MachO] Implement a layout algorithm for executables"
Summary: The layout algorithm for relocatable objects and for executable are somewhat different. This patch implements the latter one based on the algorithm in LLD (MachOFileLayout).

Reviewers: alexshap, rupprecht, jhenderson

Reviewed By: alexshap

Subscribers: jakehehrlich, abrachet, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65539

llvm-svn: 369301
2019-08-19 21:12:02 +00:00
Evgeniy Stepanov 55ccd16354 Refactor isPointerOffset (NFC).
Summary:
Simplify the API using Optional<> and address comments in
         https://reviews.llvm.org/D66165

Reviewers: vitalybuka

Subscribers: hiraditya, llvm-commits, ostannard, pcc

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66317

llvm-svn: 369300
2019-08-19 21:08:04 +00:00
Vyacheslav Zakharin f7229ac7d8 Fixed placement of llvm.global_dtors on Windows.
Differential revision: https://reviews.llvm.org/D66373

llvm-svn: 369299
2019-08-19 21:07:03 +00:00
Seiya Nuta 552bcb854c Recommit "[llvm-objcopy][MachO] Support load commands used in executables/shared libraries"
Summary:
This patch implements copying some load commands that appear in executables/shared libraries such as the indirect symbol table.

I don't add tests intentionally because this patch is incomplete: we need a layout algorithm for executables/shared libraries. I'll submit it as a separate patch with tests.

Reviewers: alexshap, rupprecht, jhenderson, compnerd

Reviewed By: alexshap

Subscribers: abrachet, mgorny, mgrang, MaskRay, mtrent, jakehehrlich, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63395

llvm-svn: 369298
2019-08-19 21:05:31 +00:00
Evgeniy Stepanov 50affbe47f MemTag: stack initializer merging.
Summary:
MTE provides instructions to update memory tags and data at the same
time. This change makes use of those to generate more compact code for
stack variable tagging + initialization.

We collect memory store and memset instructions following an alloca or a
lifetime.start call, and replace them with the corresponding MTE
intrinsics. Since the intrinsics work on 16-byte aligned chunks, the
stored values are combined as necessary.

Reviewers: pcc, vitalybuka, ostannard

Subscribers: srhines, javed.absar, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66167

llvm-svn: 369297
2019-08-19 20:47:09 +00:00
Benjamin Kramer 928071ae4e [Support] Replace sys::Mutex with their standard equivalents.
Only use a recursive mutex if it can be locked recursively.

llvm-svn: 369295
2019-08-19 19:49:57 +00:00
Johannes Doerfert 056f1b5cc7 Re-apply fixed "[Attributor] Fix: Make sure we set the changed flag"
This reverts commit cedd0d9a6e.

Re-apply the original commit but make sure the variables are initialized
(even if they are not used) so UBSan is not complaining.

llvm-svn: 369294
2019-08-19 19:14:10 +00:00
Sam Clegg 19bf637eb1 [WebAssembly][MC] Allow empty assembly functions
Differential Revision: https://reviews.llvm.org/D66434

llvm-svn: 369292
2019-08-19 19:04:54 +00:00
Alina Sbirlea 1a3fdaf6a6 [MemorySSA] Rename uses when inserting memory uses.
Summary:
When inserting uses from outside the MemorySSA creation, we don't
normally need to rename uses, based on the assumption that there will be
no inserted Phis (if  Def existed that required a Phi, that Phi already
exists). However, when dealing with unreachable blocks, MemorySSA will
optimize away Phis whose incoming blocks are unreachable, and these Phis end
up being re-added when inserting a Use.
There are two potential solutions here:
1. Analyze the inserted Phis and clean them up if they are unneeded
(current method for cleaning up trivial phis does not cover this)
2. Leave the Phi in place and rename uses, the same way as whe inserting
defs.
This patch use approach 2.

Resolves first test in PR42940.

Reviewers: george.burgess.iv

Subscribers: Prazek, sanjoy.google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66033

llvm-svn: 369291
2019-08-19 18:57:40 +00:00
Andrea Di Biagio bf989187c3 [X86] Move scheduling tests for CMPXCHG to the corresponding resources-x86_64.s files. NFC
In D66424 it has been requested to move all the new tests added by r369278 into
resources-x86_64.s. That is because only the 8b/16 ops should be tested by
resources-cmpxchg.s. This partially reverts r369278.

llvm-svn: 369288
2019-08-19 18:20:30 +00:00
Craig Topper a0d92c7262 [X86] Teach lowerV4I32Shuffle to only use broadcasts if the mask has more than one undef element. Prioritize shifts over broadcast in lowerV8I16Shuffle.
The motivating case are the changes in vector-reduce-add.ll where
we were doing extra work in the scalar domain instead of shuffling.
There may be some one use check that needs to be looked into there,
but this patch sidesteps the issue by avoiding broadcasts that
aren't really broadcasting.

Differential Revision: https://reviews.llvm.org/D66071

llvm-svn: 369287
2019-08-19 18:15:50 +00:00
Craig Topper 93c2787193 [CGP] Remove ModifiedDT from the makeBitReverse loop
I don't think anything in this loop modifies the control flow and we don't restart any iteration after setting the flag.

This code was added in http://reviews.llvm.org/D16893 but looking at the test case added there the code that caused the dominator tree to change was merging blocks with their predecessor not the bitreverse optimization.

Differential Revision: https://reviews.llvm.org/D66366

llvm-svn: 369283
2019-08-19 18:02:24 +00:00
Andrea Di Biagio ecbaba672e [X86] Added extensive scheduling model tests for all the CMPXCHG variants. NFC
Addresses a review comment in D66424

llvm-svn: 369279
2019-08-19 17:07:26 +00:00
Stefan Stipanovic 8682281063 [Attributor] -attributor-verify has false positives. Temporarily remove
it, until resolved.

llvm-svn: 369277
2019-08-19 16:39:32 +00:00
Pavel Labath 08c77b97c0 Filesystem/Windows: fix inconsistency in readNativeFileSlice API
Summary:
The windows version implementation of readNativeFileSlice, was trying to
match the POSIX behavior of not treating EOF as an error, but it was
only handling the case of reading from a pipe. Attempting to read past
the end of a regular file returns a slightly different error code, which
needs to be handled too. This patch adds ERROR_HANDLE_EOF to the list of
error codes to be treated as an end of file, and adds some unit tests
for the API.

This issue was found while attempting to land D66224, which caused a bunch of
lldb tests to start failing on windows.

Reviewers: rnk, aganea

Subscribers: kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66344

llvm-svn: 369269
2019-08-19 15:40:49 +00:00
Roman Lebedev edfaee0811 [TargetLowering] x s% C == 0 fold: vector divisor with INT_MIN handling
Summary:
The general fold is only valid for positive divisors.
Which effectively means, it is invalid for `INT_MIN` divisors,
and we currently bailout if we see them.

But that is too strict, we can just fix-up the results.
For that, let's do a second computation 'in parallel':
```
Name: srem -> and
Pre: isPowerOf2(C)
%o = srem i8 %X, C
%r = icmp eq %o, 0
  =>
%n = and i8 %X, C-1
%r = icmp eq %n, 0
```
https://rise4fun.com/Alive/Sup

And then just blend results: if the divisor was `INT_MIN`,
pick the value we got via bit-test,
else pick the value from general fold.

There's interesting observation - `ISD::ROTR` is set to
`LegalizeAction::Expand` before AVX512, so we should not
treat `INT_MIN` divisor as even; and as it can be seen
while `@test_srem_odd_even_one` improves on all run-lines,
`@test_srem_odd_even_INT_MIN` only improves for AVX512.

Reviewers: RKSimon, craig.topper, spatel

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66300

llvm-svn: 369268
2019-08-19 15:01:42 +00:00
Serge Guelton a023d6b7de [nfc] Silent gcc warning
llvm-svn: 369266
2019-08-19 14:40:33 +00:00
George Rimar 42336682b2 [llvm-objdump] - Restore lost comment.
It was removed by mistake in r369263 (D66417).

llvm-svn: 369265
2019-08-19 14:35:08 +00:00
Amaury Sechet 8130154115 Automatically generate AVX512 test cases. NFC
llvm-svn: 369264
2019-08-19 14:34:08 +00:00
George Rimar 9d5e8a476f [Object/COFF.h] - Stop returning std::error_code in a few methods. NFCI.
There are 4 methods that return std::error_code now,
though they do not have to because they are always succeed.
I refactored them.

This allows to simplify the code in tools a bit.

llvm-svn: 369263
2019-08-19 14:32:23 +00:00
Jinsong Ji 0776da5236 [PeepholeOptimizer] Don't assume bitcast def always has input
Summary:
If we have a MI marked with bitcast bits, but without input operands,
PeepholeOptimizer might crash with assert.

eg:
If we apply the changes in PPCInstrVSX.td as in this patch:

[(set v4i32:$XT, (bitconvert (v16i8 immAllOnesV)))]>;

We will get assert in PeepholeOptimizer.

```
llvm-lit llvm-project/llvm/test/CodeGen/PowerPC/build-vector-tests.ll -v

llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h:417: const
llvm::MachineOperand &llvm::MachineInstr::getOperand(unsigned int)
const: Assertion `i < getNumOperands() && "getOperand() out of range!"'
failed.
```

The fix is to abort if we found out of bound access.

Reviewers: qcolombet, MatzeB, hfinkel, arsenm

Reviewed By: qcolombet

Subscribers: wdng, arsenm, steven.zhang, wuzish, nemanjai, hiraditya, kbarton, MaskRay, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65542

llvm-svn: 369261
2019-08-19 14:19:04 +00:00
Alex Bradbury 1c1f8f215d [RISCV] Don't force absolute FK_Data_X fixups to relocs
The current behavior of shouldForceRelocation forces relocations for the
majority of fixups when relaxation is enabled. This makes sense for
fixups which incorporate symbols but is unnecessary for simple data
fixups where the fixup target is already resolved to an absolute value.

Differential Revision: https://reviews.llvm.org/D63404
Patch by Edward Jones.

llvm-svn: 369257
2019-08-19 13:23:02 +00:00
David Stenberg 88df53e6ea [DebugInfo] Allow bundled calls in the MIR's call site info
Summary:
Extend the MIR parser and writer so that the call site information can
refer to calls that are bundled.

Reviewers: aprantl, asowda, NikolaPrica, djtodoro, ivanbaev, vsk

Reviewed By: aprantl

Subscribers: arsenm, hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D66145

llvm-svn: 369256
2019-08-19 12:41:22 +00:00
Sanjay Patel 0f9b5f86f1 [SLP] add test that requires shuffle of scalars; NFC
llvm-svn: 369255
2019-08-19 12:41:09 +00:00
Fangrui Song 6520ba3e94 [llvm-readobj] unwrapOrError: remove unnecessary llvm_unreachable after r369194
llvm-svn: 369254
2019-08-19 12:18:18 +00:00
Sanjay Patel b38bac3699 [SLP] reduce duplicated code; NFC
llvm-svn: 369250
2019-08-19 11:39:56 +00:00
Fangrui Song d9a071c54b [MC] Simplify ELFObjectWriter::recordRelocation. NFC
llvm-svn: 369248
2019-08-19 10:05:59 +00:00
Jeremy Morse 176bbd5cde [DebugInfo] Make postra sinking of DBG_VALUEs subregister-safe
Currently the machine instruction sinker identifies DBG_VALUE insts that
also need to sink by comparing register numbers. Unfortunately this isn't
safe, because (after register allocation) a DBG_VALUE may read a register
that aliases what's being sunk. To fix this, identify the DBG_VALUEs that
need to sink by recording & examining their register units. Register units
gives us the following guarantee:

  "Two registers overlap if and only if they have a common register unit"
  [MCRegisterInfo.h]

Thus we can always identify aliasing DBG_VALUEs if the set of register
units read by the DBG_VALUE, and the register units of the instruction
being sunk, intersect. (MachineSink already uses classes like
"LiveRegUnits" for determining sinking validity anyway).

The test added checks for super and subregister DBG_VALUE reads of a sunk
copy being sunk as well.

Differential Revision: https://reviews.llvm.org/D58191

llvm-svn: 369247
2019-08-19 09:53:07 +00:00
Sam Tebbs f312c1ecf4 [ARM] Add support for MVE vaddv
This patch adds vecreduce_add and the relevant instruction selection for
vaddv.

Differential revision: https://reviews.llvm.org/D66085

llvm-svn: 369245
2019-08-19 09:38:28 +00:00
David Green 2bfc13fde1 [ARM] MVE sext costs
This adds some sext costs for MVE, taken from the length of assembly sequences
that we currently generate.

Differential Revision: https://reviews.llvm.org/D66010

llvm-svn: 369244
2019-08-19 09:13:22 +00:00
Jeremy Morse b58ba8aae7 [DebugInfo] Test for variable range un-coalescing
LiveDebugVariables can coalesce ranges of variable locations across
multiple basic blocks. However when it recreates DBG_VALUE instructions,
it has to recreate one DBG_VALUE per block, otherwise it doesn't
represent the pre-regalloc layout and variable assignments can go missing.

This feature works -- however while mucking around with LiveDebugVariables,
I commented the relevant code it out and no tests failed. Thus, here's a
test that checks LiveDebugVariables preserves DBG_VALUEs across block
boundaries.

Differential Revision: https://reviews.llvm.org/D66347

llvm-svn: 369243
2019-08-19 09:02:18 +00:00
David L. Jones cedd0d9a6e Revert [Attributor] Fix: Make sure we set the changed flag
This reverts r369159 (git commit cbaf1fdea2)

r369160 caused a test to fail under UBSAN. See thread on llvm-commits.

llvm-svn: 369241
2019-08-19 08:00:08 +00:00
Fangrui Song b127771f7d [MC] Delete unnecessary diagnostic: "No relocation available to represent this relative expression"
Replace

- error: No relocation available to represent this relative expression

with

+ error: symbol 'undef' can not be undefined in a subtraction expression

or

+ error: Cannot represent a difference across sections

Keep !IsPcRel as an assertion after the two diagnostic checks are done.

llvm-svn: 369239
2019-08-19 07:59:35 +00:00
David L. Jones b1752f670f Revert [Attributor] Fix: Do not partially resolve returned calls.
This reverts r369160 (git commit f72d9b1c97)

r369160 caused some tests to fail under UBSAN. See thread on llvm-commits.

llvm-svn: 369236
2019-08-19 07:16:24 +00:00
Seiya Nuta 1e335611ad Revert r369230 and r369231
Looks these commits break CI builds:

- http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-gn/builds/4159

This commit reverts r369230 and r369231 (git coommit: 4a198a7 and dee9546).

llvm-svn: 369234
2019-08-19 06:45:48 +00:00
Fangrui Song 38426c114f [MC] Don't emit .symver redirected symbols to the symbol table
GNU as keeps the original symbol in the symbol table for defined @ and
@@, but suppresses it in other cases (@@@ or undefined). The original
symbol is usually undesired:
In a shared object, the original symbol can be localized with a version
script, but it is hard to remove/localize in an archive:

1) a post-processing step removes the undesired original symbol
2) consumers (executable) of the archive are built with the
   version script

Moreover, it can cause linker issues like binutils PR/18703 if the
original symbol name and the base name of the versioned symbol is the
same (both ld.bfd and gold have some code to work around defined @ and
@@). In lld, if it sees f and f@v1:

  --version-script =(printf 'v1 {};') => f and f@v1
  --version-script =(printf 'v1 { f; };') => f@v1 and f@@v1

It can be argued that @@@ added on 2000-11-13 corrected the @ and @@ mistake.

This patch catches some more multiple version errors (defined @ and @@),
and consistently suppress the original symbol. This addresses all the
problems listed above.

If the user wants other aliases to the versioned symbol, they can copy
the original symbol to other symbol names with .set directive, e.g.

    .symver f, f@v1  # emit f@v1 but not f into .symtab
    .set f_impl, f   # emit f_impl into .symtab

llvm-svn: 369233
2019-08-19 06:17:30 +00:00
Craig Topper ebb7ddc633 [X86] Teach lower1BitShuffle to match right shifts with upper zero elements on types that don't natively support KSHIFT.
We can support these by widening to a supported type,
then shifting all the way to the left and then
back to the right to ensure that we shift in zeroes.

llvm-svn: 369232
2019-08-19 05:45:39 +00:00