5 Commits

Author	SHA1	Message	Date
Tom Stellard	79243d9664	R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table ... llvm-svn: 218776	2014-10-01 17:15:17 +00:00
Matt Arsenault	72b31eee0b	R600/SI: Change formatting of printed registers. ... Print the range of registers used with a single letter prefix. This better matches what the shader compiler produces and is overall less obnoxious than concatenating all of the subregister names together. Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1, it will print s[0:1] and so on. There doesn't appear to be a straightforward way to get the actual register info in the InstPrinter, so this parses the generated name to print with the new syntax. The required test changes are pretty nasty, and register matching regexes are now worse. Since there isn't a way to add to a variable in FileCheck, some of the tests now don't check the exact number of registers used, but I don't think that will be a real problem. llvm-svn: 194443	2013-11-12 02:35:51 +00:00
Tom Stellard	70f13dba15	R600/SI: Use -verify-machineinstrs for most tests ... We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 192366	2013-10-10 17:11:46 +00:00
Manman Ren	adf4cc171e	TBAA: update tbaa format from scalar format to struct-path aware format. ... llvm-svn: 191690	2013-09-30 18:17:55 +00:00
Tom Stellard	8e5da41374	R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 ... Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG instructions should make it easier for the register allocator to coalasce unnecessary copies. v2: - Use an SGPR register class if all the operands of BUILD_VECTOR are SGPRs. llvm-svn: 188427	2013-08-14 23:24:32 +00:00