79243d9664
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table
...
llvm-svn: 218776
2014-10-01 17:15:17 +00:00
155bbb7713
R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant
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This saves us from having to copy a 64-bit 0 value into VGPRs for
BUFFER_* instruction which only have a 12-bit immediate offset.
llvm-svn: 215399
2014-08-11 22:18:17 +00:00
93ba12f163
R600/SI: Clear lds bit on MUBUF instructions used for private stores
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This bit was left uninitialized, which was causing some random failures
of piglit tests.
NOTE: This is a candidate for the 3.5 branch.
llvm-svn: 215396
2014-08-11 22:18:09 +00:00
229d5e669b
R600/SI: Update MUBUF assembly string to match AMD proprietary compiler
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llvm-svn: 214866
2014-08-05 14:48:12 +00:00
b37f797678
R600/SI: Avoid generating REGISTER_LOAD instructions.
...
SI doesn't use REGISTER_LOAD anymore, but it was still hitting this code
path for 8-bit and 16-bit private loads.
llvm-svn: 214865
2014-08-05 14:40:52 +00:00
4973a13680
Revert "R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp"
...
This reverts commit r214566.
I did not mean to commit this yet.
llvm-svn: 214572
2014-08-01 21:55:50 +00:00
c16f73d7c5
R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp
...
SI doesn't use REGISTER_LOAD anymore, but it was still hitting this code
path for 8-bit and 16-bit private loads.
llvm-svn: 214566
2014-08-01 21:50:47 +00:00
b02094e115
R600/SI: Use scratch memory for large private arrays
...
llvm-svn: 213551
2014-07-21 15:45:01 +00:00
d0b6f3e173
R600: Run private-memory test with and without alloca promote
...
The unpromoted path still needs to be tested since we can't
always promote to using LDS.
llvm-svn: 212894
2014-07-13 02:18:06 +00:00
642d2e78b3
R600: Don't crash on unhandled instruction in promote alloca
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llvm-svn: 211906
2014-06-27 16:52:49 +00:00
6995dd90c0
R600: Add some testcases for promote alloca pass.
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More complicated GEPs are skipped. Add some tests to
actually stress this skipping.
llvm-svn: 211859
2014-06-27 03:55:55 +00:00
880a80ad07
R600: Use LDS and vectors for private memory
...
llvm-svn: 211110
2014-06-17 16:53:14 +00:00
06028dd7be
R600/SI: Fix verifier error with pseudo store instructions.
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Use i32 instead of specifying SReg_32. When this is
the pseudo INDIRECT_BASE_ADDR, this would give a bogus
verifier error.
llvm-svn: 207770
2014-05-01 16:37:52 +00:00
4d7d38333b
R600/SI: Print more immediates in hex format
...
Print in decimal for inline immediates, and hex otherwise. Use hex
always for offsets in addressing offsets.
This approximately matches what the shader compiler does.
llvm-svn: 206335
2014-04-15 22:32:49 +00:00
fbe435de63
R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
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This instructions writes to an 32-bit SGPR. This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.
This fixes verifier errors on several of the indirect addressing piglit
tests.
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204055
2014-03-17 17:03:51 +00:00
476437cbbc
R600: MOVA is vector only
...
llvm-svn: 199827
2014-01-22 19:24:24 +00:00
598f3945c0
R600: Take alignment into account when calculating the stack offset
...
llvm-svn: 199826
2014-01-22 19:24:23 +00:00
27982b1d4a
R600: Begin private memory at the second GPR.
...
This way private memory does not over-write work group information
stored in GPRs 0 and 1.
llvm-svn: 199824
2014-01-22 19:24:19 +00:00
e93736057f
R600/SI: Add support for i8 and i16 private loads/stores
...
llvm-svn: 199823
2014-01-22 19:24:14 +00:00
c10563d14e
Fix broken CHECK lines.
...
llvm-svn: 199016
2014-01-11 21:06:00 +00:00
81d871dee3
R600/SI: Add support for private address space load/store
...
Private address space is emulated using the register file with
MOVRELS and MOVRELD instructions.
llvm-svn: 194626
2013-11-13 23:36:50 +00:00
Tom Stellard