llvm-project

Commit Graph

Author	SHA1	Message	Date
Daniel Sanders	fa961d76f0	[mips] Prevent %lo relocation being used on MSA loads and stores. Summary: Parts of the compiler still believed MSA load/stores have a 16-bit offset when it is actually 10-bit. Corrected this, and fixed a closely related issue this uncovered where load/stores with 10-bit and 12-bit offsets (MSA and microMIPS respectively) could not load/store using offsets from the stack/frame pointer. They accepted frameindex+offset, but not frameindex by itself. Reviewers: jacksprat, matheusalmeida Reviewed By: jacksprat Differential Revision: http://llvm-reviews.chandlerc.com/D2888 llvm-svn: 202717	2014-03-03 14:31:21 +00:00
Daniel Sanders	a1840d2f88	Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too Reviewers: dsanders Reviewed By: dsanders CC: llvm-commits, nadav Differential Revision: http://llvm-reviews.chandlerc.com/D1958 llvm-svn: 194393	2013-11-11 17:23:41 +00:00

Author

SHA1

Message

Date

Daniel Sanders

fa961d76f0

[mips] Prevent %lo relocation being used on MSA loads and stores.

Summary:
Parts of the compiler still believed MSA load/stores have a 16-bit offset when
it is actually 10-bit. Corrected this, and fixed a closely related issue this
uncovered where load/stores with 10-bit and 12-bit offsets (MSA and microMIPS
respectively) could not load/store using offsets from the stack/frame pointer.
They accepted frameindex+offset, but not frameindex by itself.

Reviewers: jacksprat, matheusalmeida

Reviewed By: jacksprat

Differential Revision: http://llvm-reviews.chandlerc.com/D2888

llvm-svn: 202717

2014-03-03 14:31:21 +00:00

Daniel Sanders

a1840d2f88

Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too

Reviewers: dsanders

Reviewed By: dsanders

CC: llvm-commits, nadav

Differential Revision: http://llvm-reviews.chandlerc.com/D1958

llvm-svn: 194393

2013-11-11 17:23:41 +00:00

2 Commits