Commit Graph

222768 Commits

Author SHA1 Message Date
Rafael Espindola f1d598c2f6 Try to fix the build in some bots.
llvm-svn: 260736
2016-02-12 21:17:10 +00:00
Sean Callanan 8c62daf250 IRInterpreter now recognizes expressions with constants it doesn't handle.
If an instruction has a constant that IRInterpreter doesn't know how to deal
with (say, an array constant, because we can't materialize it to APInt) then we
used to ignore that and only fail during expression execution.  This is annoying
because if IRInterpreter had just returned false from CanInterpret(), the JIT
would have been used.

Now the IRInterpreter checks constants as part of CanInterpret(), so this should
hopefully no longer be an issue.

llvm-svn: 260735
2016-02-12 21:16:58 +00:00
Sean Callanan b281480203 Centralized symbol lookup in IRExecutionUnit, and fixed the code model.
I'm preparing to remove symbol lookup from IRForTarget, where it constitutes a
dreadful hack working around no-longer-existing JIT bugs.  Thanks to our 
contributors, IRForTarget has a lot of smarts that IRExecutionUnit doesn't have,
so I've cleaned them up a bit and moved them over to IRExecutionUnit.

Also for historical reasons, IRExecutionUnit used the "Small" code model on non-
ELF platforms (namely, OS X).  That's no longer necessary, and we can use the
same code model as everyone else on OS X.  I've fixed that.

llvm-svn: 260734
2016-02-12 21:11:25 +00:00
Andrew Kaylor d1188ddd33 [WinEH] Prevent EH state numbering from skipping nested cleanup pads that never return
Differential Revision: http://reviews.llvm.org/D17208

llvm-svn: 260733
2016-02-12 21:10:16 +00:00
Chad Rosier 81362a8599 [LIR] Allow merging of memsets in negatively strided loops.
Last part of PR25166.

llvm-svn: 260732
2016-02-12 21:03:23 +00:00
Justin Lebar 6086c6a387 Fix typo in comment.
llvm-svn: 260731
2016-02-12 21:01:37 +00:00
Justin Lebar db63949e8d [SimplifyCFG] Don't fold conditional branches that contain calls to convergent functions.
Summary:
Performing this optimization duplicates the call to the convergent
function and adds new control-flow dependencies, which is a no-no.

Reviewers: jingyue

Subscribers: broune, hfinkel, tra, resistor, joker.eph, arsenm, llvm-commits, mzolotukhin

Differential Revision: http://reviews.llvm.org/D17128

llvm-svn: 260730
2016-02-12 21:01:36 +00:00
Justin Lebar df04d2a1f1 [LoopRotate] Don't perform loop rotation if the loop header calls a convergent function.
Summary:
Calls to convergent functions can be duplicated, but only if the
duplicates are not control-flow dependent on any additional values.
Loop rotation doesn't meet the bar.

Reviewers: jingyue

Subscribers: mzolotukhin, llvm-commits, arsenm, joker.eph, resistor, tra, hfinkel, broune

Differential Revision: http://reviews.llvm.org/D17127

llvm-svn: 260729
2016-02-12 21:01:33 +00:00
Justin Lebar 144c5a6c15 Add convergent property to CodeMetrics.
Summary: No functional changes.

Reviewers: jingyue, arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17126

llvm-svn: 260728
2016-02-12 21:01:31 +00:00
Justin Lebar 531b24b53a Initialize CodeMetrics' member variables inline with definitions.
Summary: No functional changes.

Reviewers: jingyue

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17125

llvm-svn: 260727
2016-02-12 20:59:20 +00:00
Rafael Espindola 9f77ef0c08 Add initial LTO support.
llvm-svn: 260726
2016-02-12 20:54:57 +00:00
Krzysztof Parzyszek feb65a3f8b [Hexagon] Recognize more instructions in isLoadFromStackSlot/isStoreToStackSlot
llvm-svn: 260725
2016-02-12 20:54:15 +00:00
Rui Ueyama e9c5806593 ELF: Remove use of MapVector from LinkerScript.
We don't have to use a MapVector here. Instead, just std::vector suffices.

llvm-svn: 260724
2016-02-12 20:41:43 +00:00
Quentin Colombet 232f447782 Get rid of some GLOBAL_ISEL ifdefs that should be harmless for code size.
More to come, but those were easy.

llvm-svn: 260723
2016-02-12 20:41:24 +00:00
David Majnemer 01674939b2 Remove unused variable
llvm-svn: 260722
2016-02-12 20:33:51 +00:00
Siva Chandra 29d9bea93f Adjust for Python-3.
Summary:
This does not yet give us a clean testsuite run but it does help with:
1. Actually building on linux
2. Run the testsuite with over 70% tests passing on linux.

Reviewers: tfiala, labath, zturner

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D17182

llvm-svn: 260721
2016-02-12 20:30:47 +00:00
Benjamin Kramer 56d13e8937 Remove LLVMGetTargetMachineData leftovers.
llvm-svn: 260720
2016-02-12 20:26:46 +00:00
Artem Belevich 7f522b7876 Added missing '__'.
llvm-svn: 260719
2016-02-12 20:26:43 +00:00
Alexey Samsonov eb649bcfb9 [LSan] Print more helpful error message if LSan crashes during leak detection.
llvm-svn: 260717
2016-02-12 20:20:51 +00:00
Sean Callanan 7b3ef05a37 Objective-C++ is a kind of C++.
llvm-svn: 260715
2016-02-12 19:47:57 +00:00
Argyrios Kyrtzidis 67d55fac12 [ADT] Revert the llvm/ADT/OptionSet.h header and unit test.
llvm-svn: 260714
2016-02-12 19:47:35 +00:00
Sean Callanan 92734d1b2b Make Target::CalculateProcess() return a sensible result.
The Calculate* functions in general should not derive any information that isn't
implicit, but for Target the process pointer is a member so it's fine to return
it for CalculateProcess().

llvm-svn: 260713
2016-02-12 19:45:31 +00:00
Samuel Benzaquen 51e1523d70 [clang-tidy] Add check performance-faster-string-find
Summary:
Add check performance-faster-string-find.
It replaces single character string literals to character literals in calls to string::find and friends.

Reviewers: alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D16152

llvm-svn: 260712
2016-02-12 19:28:14 +00:00
Philip Reames 96fccc2d09 [GVN] Common code for local and non-local load availability [NFCI]
The attached patch removes all of the block local code for performing X-load forwarding by reusing the code used in the non-local case.

The motivation here is to remove duplication and in the process increase our test coverage of some fairly tricky code. I have some upcoming changes I'll be proposing in this area and wanted to have the code cleaned up a bit first.

Note: The review for this mostly happened in email which didn't make it to phabricator on the 258882 commit thread.

Differential Revision: http://reviews.llvm.org/D16608

llvm-svn: 260711
2016-02-12 19:24:57 +00:00
Hubert Tong 1478701115 test/Headers/float.c: fix theoretical edge values
For *_MANT_DIG, *_MAX_EXP and *_MIN_EXP, the C Standard does not list
the least requirements directly. This patch adjusts the test values with
refined ones.

Patch by Jorge Teixeira!

llvm-svn: 260710
2016-02-12 19:24:36 +00:00
David Majnemer 0763970988 [AST] Fix typos in RecordLayoutBuilder
No functional change is intended.

llvm-svn: 260709
2016-02-12 19:21:02 +00:00
Chris Bieneman 1e8d80e79c [CMake] Pass stage1 tools through to stage2 when building with LTO
This was originally a hacky if(APPLE) block. Now that we have an option for enabling LTO, it is better to properly gate this.

llvm-svn: 260707
2016-02-12 19:06:12 +00:00
Chad Rosier 4acff96646 [LIR] Partially revert r252926(NFC), which introduced a very subtle change.
In short, before r252926 we were comparing an unsigned (StoreSize) against an a
APInt (Stride), which is fine and well.  After we were zero extending the Stride
and then converting to an unsigned, which is not the same thing.  Obviously,
Stides can also be negative.  This commit just restores the original behavior.

AFAICT, it's not possible to write a test case to expose the issue because
the code already has checks to make sure the StoreSize can't overflow an
unsigned (which prevents the Stride from overflowing an unsigned as well).

llvm-svn: 260706
2016-02-12 19:05:27 +00:00
Philip Reames 2b9100dfbd [LVI] Exploit nsw/nuw when computing constant ranges
As the title says. Modelled after similar code in SCEV.

This is useful when analysing induction variables in loops which have been canonicalized by other passes. I wrote the tests as non-loops specifically to avoid the generality introduced in http://reviews.llvm.org/D17174. While that can handle many induction variables without *needing* to exploit nsw, there's no reason not to use it if we've already proven it.

Differential Revision: http://reviews.llvm.org/D17177

llvm-svn: 260705
2016-02-12 19:05:16 +00:00
Hans Wennborg f6892eda24 [CMake] don't build libLTO when LLVM_ENABLE_PIC is OFF
When cmake is run with -DLLVM_ENABLE_PIC=OFF, build fails while
linking shared library libLTO.so, because its dependencies are built
with -fno-PIC. More details here: https://llvm.org/bugs/show_bug.cgi?id=26484.
This diff reverts r252652 (git 9fd4377ddb83aee3c049dc8757e7771edbb8ee71),
which removed check NOT LLVM_ENABLE_PIC before disabling build for libLTO.so.

Patch by Igor Sugak!

Differential Revision: http://reviews.llvm.org/D17049

llvm-svn: 260703
2016-02-12 19:02:39 +00:00
Mehdi Amini 40b369cf5a GlobalISel is always built since r260566, reflect it in LLVMBuild.txt
Other component could not depends on an optional library in llvm-config

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260701
2016-02-12 18:43:14 +00:00
Mehdi Amini 907313a9cf llvm-config: replace assertions with a helpful error message
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260700
2016-02-12 18:43:10 +00:00
Sean Callanan abece15858 Renamed TestRdar12991846 to the more descriptive TestUnicodeLiterals.
Test cases should not be named after PR or Radar numbers.  It's fine to
annotate them with these numbers in comments, however.

llvm-svn: 260699
2016-02-12 18:42:00 +00:00
Krzysztof Parzyszek fd02aad8fd [Hexagon] Add utility functions to detect sign- and zero-extending loads
llvm-svn: 260698
2016-02-12 18:37:23 +00:00
Artem Belevich 186091094a [CUDA] Tweak attribute-based overload resolution to match nvcc behavior.
This is an artefact of split-mode CUDA compilation that we need to
mimic. HD functions are sometimes allowed to call H or D functions. Due
to split compilation mode device-side compilation will not see host-only
function and thus they will not be considered at all. For clang both H
and D variants will become function overloads visible to
compiler. Normally target attribute is considered only if C++ rules can
not determine which function is better. However in this case we need to
ignore functions that would not be present during current compilation
phase before we apply normal overload resolution rules.

Changes:
* introduced another level of call preference to better describe
  possible call combinations.
* removed WrongSide functions from consideration if the set contains
  SameSide function.
* disabled H->D, D->H and G->H calls. These combinations are
  not allowed by CUDA and we were reluctantly allowing them to work
  around device-side calls to math functions in std namespace.
  We no longer need it after r258880.

Differential Revision: http://reviews.llvm.org/D16870

llvm-svn: 260697
2016-02-12 18:29:18 +00:00
Krzysztof Parzyszek 996ad1fa00 [Hexagon] Replace expansion of spill pseudo-instructions in frame lowering
Rewrite the code to handle all pseudo-instructions in a single pass.

This temporarily reverts spill slot optimization that used general-
purpose registers to hold values of spilled predicate registers.

llvm-svn: 260696
2016-02-12 18:19:53 +00:00
David Majnemer 0f0abc7bc2 [InstCombine] Don't aggressively replace xor with icmp
For some cases, InstCombine replaces the sequence of xor/sub instruction
followed by cmp instruction into a single cmp instruction.

However, this replacement may result suboptimal result especially when
the xor/sub has more than one use, as discussed in
bug 26465 (https://llvm.org/bugs/show_bug.cgi?id=26465).

This patch make the replacement happen only when xor/sub has only one
use.

Differential Revision: http://reviews.llvm.org/D16915

Patch by Taewook Oh!

llvm-svn: 260695
2016-02-12 18:12:38 +00:00
Tom Stellard 46937ca4e7 [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler
Historically, AMD internal sp3 assembler has flat_store* addr, data
format. To match existing code and to enable reuse, change LLVM
definitions to match.  Also update MC and CodeGen tests.

Differential Revision: http://reviews.llvm.org/D16927

Patch by: Nikolay Haustov

llvm-svn: 260694
2016-02-12 17:57:54 +00:00
Changpeng Fang e07f1aa8fa AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass.
Summary:
  It is possible that the loop condition can be a boolean constant (infinite loop,
for example). So we sould handle constant condition in annotating a loop. This
patch adds this functionality to support annotating constant condition.

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D15093

llvm-svn: 260692
2016-02-12 17:11:04 +00:00
Krzysztof Parzyszek 7ce3dbcb57 [Hexagon] Remove HexagonExpandPredSpillCode pass
This code is dead. The expansion is now done in HexagonFrameLowering.

llvm-svn: 260691
2016-02-12 17:09:58 +00:00
Krzysztof Parzyszek 7d5b4db7f9 [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
We can generate the actual instructions from the intrinsics without the
need for pseudo-instructions. Also, since the intrinsics have a side-
effect in a form of a store, attempt to optimize away loads from the
store location.

llvm-svn: 260690
2016-02-12 17:01:51 +00:00
Geoff Berry c25d3bd238 [AArch64] Reduce number of callee-save save/restores.
Summary:
Before this change, callee-save registers would be rounded up to even
pairs of GPRs and FPRs.  This change eliminates these extra padding
load/stores, though it does keep the stack allocation the same size
unless both the GPR and FPR sets have an odd size, in which case one
full pair stack slot (16 bytes) is saved.

This optimization cannot currently be done for MachO targets since they
rely on a fast-path .debug_frame equivalent that can only encode
callee-save registers as pairs.

Reviewers: t.p.northover, rengolin, mcrosier, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17000

llvm-svn: 260689
2016-02-12 16:31:41 +00:00
Krzysztof Parzyszek bdb04d9032 [Hexagon] Handle out-of-range offsets in eliminateFrameIndex
Create a virtual register that will hold the actual address and use it
with the offset of 0 in the place of the original FI.

llvm-svn: 260688
2016-02-12 16:27:23 +00:00
Chad Rosier cd2be7f084 [AArch64] Add support for Qualcomm Kryo CPU.
Machine model description by Dave Estes <cestes@codeaurora.org>.

llvm-svn: 260686
2016-02-12 15:51:51 +00:00
Rafael Espindola 852860e920 make needsPlt a pure predicate.
llvm-svn: 260685
2016-02-12 15:47:37 +00:00
Rafael Espindola cbc31d699b Delete the deprecated LLVMLinkModules.
llvm-svn: 260683
2016-02-12 15:28:45 +00:00
Jun Bum Lim 397eb7b0b3 [AArch64] Merge two adjacent str WZR into str XZR
Summary:
This change merges adjacent 32 bit zero stores into a 64 bit zero store.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
becomes
  str xzr, [x0]

Therefore, four adjacent 32 bit zero stores will be a single stp.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
  str wzr, [x0, #8]
  str wzr, [x0, #12]
becomes
  stp xzr, xzr, [x0]

Reviewers: mcrosier, jmolloy, gberry, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16933

llvm-svn: 260682
2016-02-12 15:25:39 +00:00
Aaron Ballman f034a8c7d7 Reapply r260096.
Expand the simplify boolean expression check to handle implicit conversion of integral types to bool and improve the handling of implicit conversion of member pointers to bool.

Implicit conversion of member pointers are replaced with explicit comparisons to nullptr.

Implicit conversions of integral types are replaced with explicit comparisons to 0.

Patch by Richard Thomson.

llvm-svn: 260681
2016-02-12 15:09:05 +00:00
Krzysztof Parzyszek 8e57697cfd [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260680
2016-02-12 14:48:34 +00:00
Daniel Sanders 2f1025d68a Re-commit r260230 with a fix for clang-cmake-aarch64-42vma.
There is now a default name_suffix ('default') which should appease the buildbot
and reveal why this builder lacks a suffix.

llvm-svn: 260679
2016-02-12 14:48:19 +00:00