Jakob Stoklund Olesen
d5e38383e0
Use TRI::printReg instead of AbstractRegisterDescription when printing
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LiveIntervalUnions.
llvm-svn: 121781
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen
2dd1ee5fd5
Add TargetRegisterInfo::printReg() to pretty-print registers.
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llvm-svn: 121780
2010-12-14 18:53:39 +00:00
Jim Grosbach
41955ff958
ARM Fixups relative to thumb functions need to have the low bit of the value
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set for interworking to work properly. rdar://8755956
llvm-svn: 121778
2010-12-14 18:46:57 +00:00
Jakob Stoklund Olesen
e7ee72087e
Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
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llvm-svn: 121774
2010-12-14 17:47:36 +00:00
Daniel Dunbar
a9b9300bb8
MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.
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llvm-svn: 121772
2010-12-14 17:37:16 +00:00
Jim Grosbach
e34793e960
Trailing whitespace
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llvm-svn: 121769
2010-12-14 16:25:15 +00:00
Bill Wendling
6dd0c07622
Use the integer scheduling intrinsic for integer loads and stores.
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llvm-svn: 121765
2010-12-14 12:33:05 +00:00
Chris Lattner
7499b452c1
- Insert new instructions before DomBlock's terminator,
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which is simpler than finding a place to insert in BB.
- Don't perform the 'if condition hoisting' xform on certain
i1 PHIs, as it interferes with switch formation.
This re-fixes "example 7", without breaking the world hopefully.
llvm-svn: 121764
2010-12-14 08:46:09 +00:00
Chris Lattner
335f0e4ad4
fix two significant issues with FoldTwoEntryPHINode:
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first, it can kick in on blocks whose conditions have been
folded to a constant, even though one of the edges will be
trivially folded.
second, it doesn't clean up the "if diamond" that it just
eliminated away. This is a problem because other simplifycfg
xforms kick in depending on the order of block visitation,
causing pointless work.
llvm-svn: 121762
2010-12-14 08:01:53 +00:00
Chris Lattner
dc20a7d38c
remove the instsimplify logic I added in r121754. It is apparently
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breaking the selfhost builds, though I can't fathom how.
llvm-svn: 121761
2010-12-14 07:53:03 +00:00
Chris Lattner
9ac168d0ab
clean up logic, convert std::set to SmallPtrSet, handle the case
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when all 2-entry phis are simplified away.
llvm-svn: 121760
2010-12-14 07:41:39 +00:00
Chris Lattner
9fd838d31b
tidy up a bit, move DEBUG down to when we commit to doing the transform so we
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don't print it unless the xform happens.
llvm-svn: 121758
2010-12-14 07:23:10 +00:00
Chris Lattner
b42d293faa
use SimplifyInstruction instead of reimplementing part of it.
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llvm-svn: 121757
2010-12-14 07:20:29 +00:00
Chris Lattner
fb73de482c
simplify GetIfCondition by using getSinglePredecessor.
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llvm-svn: 121756
2010-12-14 07:15:21 +00:00
Chris Lattner
0f4d67bd88
use AddPredecessorToBlock in 3 places instead of a manual loop.
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llvm-svn: 121755
2010-12-14 07:09:42 +00:00
Chris Lattner
a07cc6f4fd
make FoldTwoEntryPHINode use instsimplify a bit, make
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GetIfCondition faster by avoiding pred_iterator. No
really interesting change.
llvm-svn: 121754
2010-12-14 07:00:00 +00:00
Chris Lattner
afd2a8cfbb
remove the dead (and terrible) llvm::RemoveSuccessor function.
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llvm-svn: 121753
2010-12-14 06:51:55 +00:00
Chris Lattner
d7beca3782
improve DEBUG's a bit, switch to eraseFromParent() to simplify
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code a bit, switch from constant folding to instsimplify.
llvm-svn: 121751
2010-12-14 06:17:25 +00:00
Chris Lattner
f130661688
fix yet anohter broken line
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llvm-svn: 121750
2010-12-14 06:09:07 +00:00
Chris Lattner
5a9d59d918
reapply my recent change that disables a piece of the switch formation
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work, but fixes 400.perlbmk.
llvm-svn: 121749
2010-12-14 05:57:30 +00:00
Bill Wendling
092a7bdf9f
The tLDR et al instructions were emitting either a reg/reg or reg/imm
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instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
llvm-svn: 121747
2010-12-14 03:36:38 +00:00
Evan Cheng
c177813755
bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663
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llvm-svn: 121746
2010-12-14 03:22:07 +00:00
Jason W Kim
1296055841
fix fixme case typo :-)
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llvm-svn: 121743
2010-12-14 01:42:38 +00:00
Jakob Stoklund Olesen
eba9095df2
Remove unused vector.
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llvm-svn: 121741
2010-12-14 00:58:47 +00:00
Jakob Stoklund Olesen
36eab1cee4
Add IntervalMap to the Programmer's Manual.
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llvm-svn: 121740
2010-12-14 00:55:51 +00:00
Jakob Stoklund Olesen
a97a954364
Remove debugging code.
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llvm-svn: 121738
2010-12-14 00:37:52 +00:00
Jakob Stoklund Olesen
903b6d3261
Try reassigning all virtual register interferences, not just those with lower
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spill weight. Filter out fixed registers instead.
Add support for reassigning an interference that was assigned to an alias.
llvm-svn: 121737
2010-12-14 00:37:49 +00:00
Jakob Stoklund Olesen
3d7b8066aa
Add stub for RAGreedy::trySplit.
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llvm-svn: 121736
2010-12-14 00:37:44 +00:00
Owen Anderson
6d375e5637
Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire
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process cleaner.
llvm-svn: 121735
2010-12-14 00:36:49 +00:00
Owen Anderson
3e5648896e
Fix recent buildbot breakage by pulling SimplifyCFG back to its state as of r121694, the most recent state
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where I'm confident there were no crashes or miscompilations. XFAIL the test added since then for now.
llvm-svn: 121733
2010-12-13 23:49:28 +00:00
Jason W Kim
0e909c5f9c
First cut of ARM/MC/ELF PIC relocations.
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Test has fixme, to move to .s -> .o test when AsmParser works better.
llvm-svn: 121732
2010-12-13 23:16:07 +00:00
Bob Wilson
651eaa02b8
Remove the rest of the *_sfp Neon instruction patterns.
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Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now. It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior. Since that isn't obviously wrong, I've just
changed the test file. This completes the work for Radar 8711675.
llvm-svn: 121730
2010-12-13 23:02:37 +00:00
Bob Wilson
aae0862172
Simplify N2VSPat, removing some unnecessary type arguments.
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llvm-svn: 121729
2010-12-13 23:02:31 +00:00
Chris Lattner
a6e5d5694a
temporarily disable part of my previous patch, which causes an iterator invalidation issue, causing a crash on some versions of perlbmk.
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llvm-svn: 121728
2010-12-13 23:02:19 +00:00
Dan Gohman
3cb55a1d23
Update a comment.
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llvm-svn: 121727
2010-12-13 22:53:18 +00:00
Owen Anderson
9a4d42855d
Revert r121721, which broke buildbots.
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llvm-svn: 121726
2010-12-13 22:51:08 +00:00
Dan Gohman
c4bf5cac9f
Reapply r121520, PartialAlias implementation for BasicAA, now that
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memdep is updated to handle it.
llvm-svn: 121725
2010-12-13 22:50:24 +00:00
Dan Gohman
ba5d0abe39
Update memdep to handle PartialAlias as MayAlias.
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llvm-svn: 121723
2010-12-13 22:47:57 +00:00
Owen Anderson
4efa445f3c
Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR,
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which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.
llvm-svn: 121721
2010-12-13 22:29:52 +00:00
Bob Wilson
9c00c014ab
Delete a line that I forgot to revert previously.
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llvm-svn: 121719
2010-12-13 22:05:55 +00:00
Bob Wilson
9b3546d877
Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns.
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Jakob Olesen suggested that we can avoid the need for separate pseudo
instructions here by using COPY_TO_REGCLASS in the patterns. The pattern
gets pretty ugly but it seems to work well. Partial fix for Radar 8711675.
llvm-svn: 121718
2010-12-13 21:58:05 +00:00
Bob Wilson
157fec42c9
Use pseudo instructions for 2-register Neon instructions for scalar FP.
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Partial fix for Radar 8711675.
llvm-svn: 121716
2010-12-13 21:05:52 +00:00
Bob Wilson
52f522720e
Remove unused instruction class arguments.
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llvm-svn: 121715
2010-12-13 21:05:44 +00:00
Evan Cheng
2e51bb4ff0
Generalize BFI isel lowering a bit.
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llvm-svn: 121714
2010-12-13 20:32:54 +00:00
Chris Lattner
2d434e594e
add some DEBUG's.
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llvm-svn: 121711
2010-12-13 19:55:30 +00:00
Owen Anderson
578074b2f3
In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or
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as a "long" direct branch. While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches. Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.
llvm-svn: 121710
2010-12-13 19:31:11 +00:00
Jim Grosbach
f588c516b7
Use 32-bit types for 32-bit values.
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llvm-svn: 121709
2010-12-13 19:25:46 +00:00
Jim Grosbach
3aeb867d74
Trailing whitespace.
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llvm-svn: 121708
2010-12-13 19:18:13 +00:00
Benjamin Kramer
1e155ab7e1
Fix sort predicate. qsort(3)'s predicate semantics differ from std::sort's. Fixes PR 8780.
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llvm-svn: 121705
2010-12-13 18:20:38 +00:00
Chris Lattner
8e21a02c19
rename test
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llvm-svn: 121697
2010-12-13 08:39:40 +00:00