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14 Commits

Author SHA1 Message Date
Evandro Menezes 405c90e6cc [AArch64] Adjust the scheduling model for Exynos M1. 
Further refine the model for branches.

llvm-svn: 280736
 2016-09-06 19:22:29 +00:00
Evandro Menezes 77e6b5d4e0 [AArch64] Adjust the scheduling model for Exynos M1. 
Further refine the model for stores.

llvm-svn: 280735
 2016-09-06 19:22:27 +00:00
Evandro Menezes 199cad4f17 [AArch64] Adjust the scheduling model for Exynos M1. 
Further refine the model for loads.

llvm-svn: 280734
 2016-09-06 19:22:19 +00:00
Evandro Menezes a8a25ca905 [AArch64] Adjust the scheduling model for Exynos M1. 
Further refine the model for loads.

llvm-svn: 279976
 2016-08-29 16:04:37 +00:00
Evandro Menezes 5a5b8dcd32 [AArch64] Adjust the scheduling model for Exynos M1. 
Refine the model for the FP division unit.

llvm-svn: 278846
 2016-08-16 20:35:01 +00:00
Evandro Menezes d03aff2e11 [AArch64] Adjust the scheduling model for Exynos M1. 
Refine the model for the integer division unit.

llvm-svn: 278845
 2016-08-16 20:34:58 +00:00
Evandro Menezes 3830479f41 [AArch64] Adjust the model for the vector by element FP multiplies on Exynos M1. (NFC) 
llvm-svn: 273708
 2016-06-24 18:58:54 +00:00
Evandro Menezes 62c70101c3 [AArch64] Model the cost of vector by element FP multiplies on Exynos M1. (NFC) 
llvm-svn: 273630
 2016-06-23 23:43:23 +00:00
Evandro Menezes 8057265cc2 [AArch64] Adjust the loop buffer size for Exynos M1 (NFC) 
llvm-svn: 273185
 2016-06-20 18:39:41 +00:00
Junmo Park 3c65acf87e Remove MinLatency in SchedMachineModel. NFC. 
Summary:
We don't use MinLatency any more since r184032.

Reviewers: atrick, hfinkel, mcrosier

Differential Revision: http://reviews.llvm.org/D19474

llvm-svn: 267502
 2016-04-26 00:37:46 +00:00
Evandro Menezes 551af44e31 [AArch64] Fuse AES{D,E}/AESMC for Exynos M1. (NFC) 
llvm-svn: 266144
 2016-04-12 22:42:36 +00:00
Evandro Menezes 669aaccb89 [AArch64] Minor reformatting (NFC). 
llvm-svn: 263054
 2016-03-09 19:56:38 +00:00
Matthias Braun a6cfb6f682 AArch64: Add missing schedinfo, check completeness for cyclone 
This adds some missing generic schedule info definitions, enables
completeness checking for cyclone and fixes a typo uncovered by that.

Differential Revision: http://reviews.llvm.org/D17748

llvm-svn: 262393
 2016-03-01 21:20:31 +00:00
Evandro Menezes d761ca2308 [AArch64] Add the scheduling model for Exynos-M1 
Summary:
Add the core scheduling model for the Samsung Exynos-M1 (ARMv8-A).


Reviewers: jmolloy, rengolin, christof, MinSeongKIM, t.p.northover

Subscribers: aemerson, rengolin, MatzeB

Differential Revision: http://reviews.llvm.org/D16644

llvm-svn: 259958
 2016-02-06 00:01:41 +00:00