Commit Graph

1223 Commits

Author SHA1 Message Date
Nemanja Ivanovic bb1ea2d613 Enable support for __float128 in Clang and enable it on pertinent platforms
This patch corresponds to reviews:
http://reviews.llvm.org/D15120
http://reviews.llvm.org/D19125

It adds support for the __float128 keyword, literals and target feature to
enable it. Based on the latter of the two aforementioned reviews, this feature
is enabled on Linux on i386/X86 as well as SystemZ.
This is also the second attempt in commiting this feature. The first attempt
did not enable it on required platforms which caused failures when compiling
type_traits with -std=gnu++11.

If you see failures with compiling this header on your platform after this
commit, it is likely that your platform needs to have this feature enabled.

llvm-svn: 268898
2016-05-09 08:52:33 +00:00
Chris Dewhurst 69fa1926db [Sparc] Implement __builtin_setjmp, __builtin_longjmp back-end.
This code implements builtin_setjmp and builtin_longjmp exception handling intrinsics for 32-bit Sparc back-ends.

The code started as a mash-up of the PowerPC and X86 versions, although there are sufficient differences to both that had to be made for Sparc handling.

Note: I have manual tests running. I'll work on a unit test and add that to the rest of this diff in the next day.

Also, this implementation is only for 32-bit Sparc. I haven't focussed on a 64-bit version, although I have left the code in a prepared state for implementing this, including detecting pointer size and comments indicating where I suspect there may be differences.

Differential Revision: http://reviews.llvm.org/D19798

llvm-svn: 268483
2016-05-04 09:33:30 +00:00
Justin Lebar 76945b2f44 [CUDA] Copy host builtin types to NVPTXTargetInfo.
Summary:
Host and device types must match, otherwise when we pass values back and
forth between the host and device, we will get the wrong result.

This patch makes NVPTXTargetInfo inherit most of its type information
from the host's target info.

Reviewers: rsmith

Subscribers: cfe-commits, jhen, tra

Differential Revision: http://reviews.llvm.org/D19346

llvm-svn: 268131
2016-04-29 23:05:19 +00:00
Chris Bieneman 46977b62aa [Clang][Darwin] Define __ARM_DWARF_EH__ for WatchABI
Summary: The Darwin armv7k ABI uses Dwarf EH, so we need to set the OS define correctly. Without this the gcc_personality fails to build.

Reviewers: t.p.northover

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D19693

llvm-svn: 268078
2016-04-29 17:53:00 +00:00
Tim Northover 28fc0e1fcd ARMv7k: define __ARM_PCS_VFP since we're hard-float.
It's a little debateable because we're not truly AAPCS, so I'm
certainly not going to define __ARM_PCS, but __ARM_PCS_VFP seems to be
really an "hard-float" define, which is a useful thing to have.

llvm-svn: 267880
2016-04-28 13:59:55 +00:00
Bryan Chan e3f1ed5805 [SystemZ] Support Swift calling convention
Summary:
Port rL265324 to SystemZ to allow using the 'swiftcall' attribute on that architecture.

Depends on D19414.

Reviewers: kbarton, rjmccall, uweigand

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19432

llvm-svn: 267879
2016-04-28 13:56:43 +00:00
Silviu Baranga 632fdc5919 PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4
Summary:
According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if
the hardware floating-point architecture supports fused floating-point
multiply-accumulate".

This changes clang's behaviour from emitting this macro for v7-A and v7-R
cores to only emitting it when the target has VFPv4 (and therefore support
for the floating point multiply-accumulate instruction).

Fixes PR27216

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D18963

llvm-svn: 267869
2016-04-28 11:29:08 +00:00
Krzysztof Parzyszek a58ff5117a [Hexagon] Define architecture version macros for hexagonv55
llvm-svn: 266989
2016-04-21 14:30:04 +00:00
Krzysztof Parzyszek 7f0756cc1f [Hexagon] Define macros __HVX__ and __HVXDBL__ when appropriate
llvm-svn: 266647
2016-04-18 18:38:11 +00:00
Weiming Zhao b061313c5e [ARM] predefines __ELF__ macro for arm-none-eabi
Summary: predefines __ELF__ macro for arm-none-eabi

Reviewers: silviu.baranga, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D19225

llvm-svn: 266625
2016-04-18 16:25:46 +00:00
Nemanja Ivanovic d7d45bf8ce Revert 266186 as it breaks anything that includes type_traits on some platforms
Since this patch provided support for the __float128 type but disabled it
on all platforms by default, some platforms can't compile type_traits with
-std=gnu++11 since there is a specialization with __float128.
This reverts the patch until D19125 is approved (i.e. we know which platforms
need this support enabled).

llvm-svn: 266460
2016-04-15 18:04:13 +00:00
Nemanja Ivanovic 50f29e06a1 Enable support for __float128 in Clang
This patch corresponds to review:
http://reviews.llvm.org/D15120

It adds support for the __float128 keyword, literals and a target feature to
enable it. This support is disabled by default on all targets and any target
that has support for this type is free to add it.

Based on feedback that I've received from target maintainers, this appears to
be the right thing for most targets. I have not heard from the maintainers of
X86 which I believe supports this type. I will subsequently investigate the
impact of enabling this on X86.

llvm-svn: 266186
2016-04-13 09:49:45 +00:00
Saleem Abdulrasool c066d9cf55 Basic: fix profiling with GNU EABI
The GNU profiling support indicates that the interface is `_mcount` rather than
`mcount`.  Conditionalise the behaviour according to the `-meabi gnu` flag.

Resolves PR27311

llvm-svn: 266039
2016-04-12 03:05:03 +00:00
Saleem Abdulrasool 2a0932fb45 Correct pg instrumentation for AArch64
It seems that there was a miscommunication between Renato and I, and the
original behaviour of AArch64 was to be preserved and not to mirror the new
behaviour.  Restore the original behaviour for AArch64.  Addresses post-commit
review comments from Renato Golin.

llvm-svn: 265899
2016-04-10 14:29:55 +00:00
Saleem Abdulrasool 9b5ba547f1 Add support for __gnu_mcount_nc as the pg interface
This adds support to optionally support using `__gnu_mcount_nc` as the mcount
interface rather than `mcount` for Linux and EABI.  The other targets do not
provide an implementation for `__gnu_mcount_nc`.  This can be activated via the
`-meabi gnu` flag.

Resolves PR23969.

llvm-svn: 265888
2016-04-10 03:19:47 +00:00
Saleem Abdulrasool e86dd022c6 Basic: thread TargetOptions into TargetInfo
This threads TargetOptions into the TargetInfo hierarchy.  This is a rework of
the original attempt to thread additional information into the TargetInfo to
make decisions based on additional ABI related options.

llvm-svn: 265878
2016-04-09 19:09:25 +00:00
Saleem Abdulrasool 10a4972a8d revert SVN r265702, r265640
Revert the two changes to thread CodeGenOptions into the TargetInfo allocation
and to fix the layering violation by moving CodeGenOptions into Basic.
Code Generation is arguably not particularly "basic".  This addresses Richard's
post-commit review comments.  This change purely does the mechanical revert and
will be followed up with an alternate approach to thread the desired information
into TargetInfo.

llvm-svn: 265806
2016-04-08 16:52:00 +00:00
Saleem Abdulrasool 94cfc603d1 Basic: move CodeGenOptions from Frontend
This is a mechanical move of CodeGenOptions from libFrontend to libBasic.  This
fixes the layering violation introduced earlier by threading CodeGenOptions into
TargetInfo.  It should also fix the modules based self-hosting builds.  NFC.

llvm-svn: 265702
2016-04-07 17:49:44 +00:00
Saleem Abdulrasool 724275ba5f Basic: thread CodeGenOptions into TargetInfo
This threads CodeGenOptions into the TargetInfo hierarchy.  This is motivated by
ARM which can change some target information based on the EABI selected
(-meabi).  Similar options exist for other platforms (e.g. MIPS) and thus is
generally useful.  NFC.

llvm-svn: 265640
2016-04-07 05:41:11 +00:00
Andrey Turetskiy fd259ff9c4 [X86] Introduction of -march=lakemont.
Differential Revision: http://reviews.llvm.org/D18651

llvm-svn: 265405
2016-04-05 15:04:26 +00:00
Akira Hatanaka 68ab7fe1c8 [CodeGenCXX] Fix ItaniumCXXABI::getAlignmentOfExnObject to return 8-byte
alignment on Darwin.

Itanium C++ ABI specifies that _Unwind_Exception should be double-word
aligned (16B). To conform to the ABI, libraries implementing exception
handling declare the struct with __attribute__((aligned)), which aligns
the unwindHeader field (and the end of __cxa_exception) to the default
target alignment (which is typically 16-bytes).

struct __cxa_exception {
  ...
  // struct is declared with __attribute__((aligned)).
  _Unwind_Exception unwindHeader;
};

Based on the assumption that _Unwind_Exception is declared with
__attribute__((aligned)), ItaniumCXXABI::getAlignmentOfExnObject returns
the target default alignment for __attribute__((aligned)). It turns out
that libc++abi, which is used on Darwin, doesn't declare the struct with
the attribute and therefore doesn't guarantee that unwindHeader is
aligned to the alignment specified by the ABI, which in some cases
causes the program to crash because of unaligned memory accesses.

This commit avoids crashes due to unaligned memory accesses by having
getAlignmentOfExnObject return an 8-byte alignment on Darwin. I've only
fixed the problem for Darwin, but we should also figure out whether other
platforms using libc++abi need similar fixes.

rdar://problem/25314277

Differential revision: http://reviews.llvm.org/D18479

llvm-svn: 264998
2016-03-31 06:36:07 +00:00
Matt Arsenault edc7c6b237 AMDGPU: Remove separate r600 double data layout
This is identical to the other r600 datalayout string.

llvm-svn: 264931
2016-03-30 21:32:37 +00:00
Jonas Paulsson 3ace74a414 [SystemZ] Specify required features for builtins.
BuiltinsSystemZ.def is extended to include the required processor
features per intrinsic.

New test test/CodeGen/builtins-systemz-error2.c that checks for
expected errors when instrinsics are used with a subtarget that does
not support the required feature (e.g. vector support).

Reviewed by Ulrich Weigand.

llvm-svn: 264873
2016-03-30 15:51:24 +00:00
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
2016-03-29 12:46:16 +00:00
Jacques Pienaar d964cc22d1 [lanai] Add Lanai backend to clang driver.
Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002

llvm-svn: 264655
2016-03-28 21:02:54 +00:00
Etienne Bergeron e8ae26fb34 Fix a missing comma between two string literals.
Summary:
The two literals are currently appended.

I'm not sure what was broken by this. Please double check carefully.

Silly bug found by an on-going checker for clang-tidy.

Reviewers: alexfh, arsenm, rnk

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18454

llvm-svn: 264315
2016-03-24 18:29:24 +00:00
Andrey Turetskiy 5f1cf5fa66 [X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980

llvm-svn: 264149
2016-03-23 11:15:10 +00:00
Roman Levenstein 35aa5cecf2 Add attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end
Till now, preserve_mostcc/preserve_allcc calling convention attributes were only
available at the LLVM IR level. This patch adds attributes for
preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end.

The code was mostly written by Juergen Ributzka.
I just added support for the AArch64 target and tests.

Differential Revision: http://reviews.llvm.org/D18025

llvm-svn: 263647
2016-03-16 18:00:46 +00:00
Douglas Katzman 6871afcfca Myriad: define __myriad2 macro automatically
llvm-svn: 263596
2016-03-15 22:34:02 +00:00
Joerg Sonnenberger d0be8dcbf8 Implement __builtin_eh_return_data_regno for SPARC and SPARC64.
llvm-svn: 262838
2016-03-07 17:19:15 +00:00
Simon Pilgrim 4aa36fd4e3 [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support XSAVE.

Differential Revision: http://reviews.llvm.org/D17682

llvm-svn: 262772
2016-03-05 14:35:44 +00:00
James Y Knight b214cbc785 Make TargetInfo store an actual DataLayout instead of a string.
Use it to calculate UserLabelPrefix, instead of specifying it (often
incorrectly).

Note that the *actual* user label prefix has always come from the
DataLayout, and is handled within LLVM. The main thing clang's
TargetInfo::UserLabelPrefix did was to set the #define value. Having
these be different from each-other is just silly.

Differential Revision: http://reviews.llvm.org/D17183

llvm-svn: 262737
2016-03-04 19:00:41 +00:00
Bhushan D. Attarde bacb988735 [MIPS] initFeatureMap() to handle empty string argument
SUMMARY:
    This patch sets CPU string to its default value when it is not supplied by caller.
    
    Reviewers: vkalintiris, dsanders
    Subscribers: mohit.bhakkad, sagar, jaydeep, cfe-commits
    Differential Revision: http://reviews.llvm.org/D16139

llvm-svn: 262691
2016-03-04 06:56:29 +00:00
Bradley Smith f4affc13c5 [ARM] Add Clang targeting for ARMv8-M Baseline/Mainline
llvm-svn: 262619
2016-03-03 13:52:22 +00:00
John McCall 477f2bb0d5 Semantic analysis for the swiftcall calling convention.
I've tried to keep the infrastructure behind parameter ABI
treatments fairly general.

llvm-svn: 262587
2016-03-03 06:39:32 +00:00
Tom Stellard 2c7cdd25ee AMDGPU: Add missing Volcanic Islands targets
Reviewers: arsenm

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D17645

llvm-svn: 262228
2016-02-29 15:08:56 +00:00
Craig Topper b4f83a00a9 [X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi.
llvm-svn: 262201
2016-02-29 06:51:38 +00:00
Craig Topper 840927e074 [X86] Enabling xsave should not enable AVX. I seem to have done this, but I don't know why.
llvm-svn: 262200
2016-02-29 06:51:34 +00:00
Matt Arsenault 5e020b2628 AMDGPU: Fix broken/confusing predefined macro
amdgcn should not be defining __R600__

llvm-svn: 262124
2016-02-27 09:06:26 +00:00
Matt Arsenault b015d623d6 AMDGPU: Fix inconsistent register name for flat_scratch
llvm-svn: 262123
2016-02-27 09:06:22 +00:00
Saleem Abdulrasool 16fcf0aa52 Basic: fix __USER_LABEL_PREFIX__ on Cygwin
Adjust the user label prefix for cygwin x86_64.

Resolves PR26744.

llvm-svn: 262030
2016-02-26 16:34:01 +00:00
Elena Demikhovsky a89df0cdab Added SKL and CNL processors and features to Clang
Differential Revision: http://reviews.llvm.org/D16756

llvm-svn: 261467
2016-02-21 07:41:23 +00:00
JF Bastien 750caef39c ARM: fix VFP asm constraints
Summary:
Rich Felker was sad that clang used 'w' and 'P' for VFP constraints when GCC documents them as 't' and 'w':
  https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html

This was added way back in 2008:
  http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20080421/005393.html

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D17349

llvm-svn: 261309
2016-02-19 06:54:45 +00:00
Krzysztof Parzyszek 8e57697cfd [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260680
2016-02-12 14:48:34 +00:00
Chad Rosier b0ce1952b7 [Driver] Add support for Qualcomm's Kryo CPU.
http://reviews.llvm.org/D17124

llvm-svn: 260555
2016-02-11 18:09:31 +00:00
Oliver Stannard 3086c04a93 [ARM] Add command-line options for ARMv8.2-A
This allows ARMv8.2-A to be targeted either by using "armv8.2a" in the
triple, or by using -march=armv8.2-a (or the alias -march=armv8.2a).

The FP16 extension can be enabled with the "+fp16" suffix to the -march
or -mcpu option. This is consistent with the AArch64 option, rather than
the usual ARM option of -mfpu. We have agreed with the team which will
be upstreaming this to GCC that we want to use this new option format
for new architecture extensions for both ARM and AArch64.

Most of the work for this was done by the TargetParser patch in llvm.

Differential Revision: http://reviews.llvm.org/D15040

llvm-svn: 260533
2016-02-11 16:05:52 +00:00
Andrey Turetskiy 8170bab10a Reapply the patch of r260376.
llvm-svn: 260379
2016-02-10 12:56:10 +00:00
Andrey Turetskiy db6655fd90 [X86] Fix stack alignment for MCU target (Clang part), by Anton Nadolskiy.
This patch fixes stack alignments for MCU (should be aligned to 4 bytes).

Differential Revision: http://reviews.llvm.org/D15647

llvm-svn: 260376
2016-02-10 11:58:46 +00:00
Ulrich Weigand b038a5268f [SystemZ] Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP macros
Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_[1248] macros on SystemZ.

This fixes a miscompile of GCC C++11 standard library headers
due to use of those macros in an ABI-changing manner.

See e.g. /usr/include/c++/4.8.5/ext/concurrence.h:

  // Compile time constant that indicates prefered locking policy in
  // the current configuration.
  static const _Lock_policy __default_lock_policy =
#ifdef __GTHREADS
#if (defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) \
     && defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4))
  _S_atomic;
#else
  _S_mutex;
#endif
#else
  _S_single;
#endif

A different choice of __default_lock_policy causes different
sizes of several of the C++11 data structures, which are then
incompatible when inlined in clang-compiled code with what the
(GCC-compiled) external library expects.

This in turn leads to various crashes when using std::thread
in code compiled with clang, as see e.g. via the ThreadPool
unit tests.  See PR 26473 for an example.

llvm-svn: 259931
2016-02-05 21:34:28 +00:00
Sunil Srivastava 0ce2f227e8 Do not honor explicit alignment attribute on fields for PS4.
This change reverts r257462 for PS4 triple.

Differential Revision: http://reviews.llvm.org/D16788

llvm-svn: 259916
2016-02-05 20:50:02 +00:00
Andrey Bokhanko 6e34c1dcf7 [x86] Correct setting of WIntType for MCU target
Differential Revision: http://reviews.llvm.org/D16626

llvm-svn: 259780
2016-02-04 11:54:45 +00:00
Saleem Abdulrasool adaaccc23b Basic: mark TLS as supported on Windows on ARM
LLVM can now lower TLS access as per the MS ABI on ARM.  This enables the
generation of TLS access for Windows on ARM.

llvm-svn: 259751
2016-02-04 05:05:23 +00:00
Marina Yatsina 41c45fa42d -inline-asm][X86] Add ability to use AVX512 in MS inline asm
Defined the new AVX512 registers in clang inline asm.
Fixed a bug in the MC subtarget info creation during the parsing of MS asm statement - now it receives the actual CPU and target features information.

Differential Revision: http://reviews.llvm.org/D16757

llvm-svn: 259639
2016-02-03 11:32:08 +00:00
Reid Kleckner f27e752fe8 Fix attribute((mode([word|unwind_word]))) for x32
Patch by H.J. Lu

```
typedef unsigned int gcc_word __attribute__((mode(word)));
```
and

```
typedef unsigned int gcc_unwind_word __attribute__((mode(unwind_word)));
```
define the largest unsigned integer types which can be stored in a
general purpose register, which may not be the pointer type.  For x32,
they aren't pointer nor unsigned long.  We should

1. Make getUnwindWordWidth and getRegisterWidth virtual,
2. Override them for x32, similar to hasInt128Type.
3. Use getRegisterWidth for __attribute__((mode(word)));

This fixes PR 24706.

Reviewers: rnk

Differential Revision: http://reviews.llvm.org/D16779

llvm-svn: 259383
2016-02-01 18:58:24 +00:00
Tim Northover d88ecb30a1 ARMv7k: select ABI based on v7k Arch rather than watchos OS.
Various bits we'd like to use the new ABI actually compile with "-arch armv7k
-miphoneos-version-min=9.0". Not ideal, but also not ridiculous given how
slices work.

llvm-svn: 258976
2016-01-27 19:32:40 +00:00
James Y Knight a3518ad0b7 Revert "Change of UserLabelPrefix default value from "_" to """
This reverts commit r258504.

This commit breaks (at least) sparc-rtems -- the OS (RTEMS) used to
override UserLabelPrefix to "", despite the arch (SPARC) having set it
to "_". Now, the OS doesn't override anymore, but the arch sets it to
"_", resulting in the wrong value. I expect this probably breaks other
OSes that overrode to "" before, as well. (Clearly we have some missing
test cases, here...)

llvm-svn: 258894
2016-01-27 01:04:51 +00:00
Andrey Bokhanko 6e4463fecc Change of UserLabelPrefix default value from "_" to ""
Differential Revision: http://reviews.llvm.org/D16295

llvm-svn: 258504
2016-01-22 15:24:34 +00:00
Andrey Bokhanko 4f8867fc63 Correct setting of UserLabelPrefix for MCU target.
Differential Revision: http://reviews.llvm.org/D16138

llvm-svn: 257756
2016-01-14 10:59:36 +00:00
Tim Northover a12d0a99b1 ARM: allow __thread on OS versions that have the required runtime support.
llvm-svn: 257041
2016-01-07 09:04:46 +00:00
Dan Gohman 0d75f2c538 [WebAssembly] Add -m:e to the target triple.
llvm-svn: 257021
2016-01-07 03:20:15 +00:00
MinSeong Kim 50d9c156dd [AArch64] Teaches clang about Samsung Exynos-M1
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A).

Differential Revision: http://reviews.llvm.org/D15664

llvm-svn: 256829
2016-01-05 12:53:24 +00:00
Asaf Badouh a9d1e18f48 [X86][PKU] add clang intrinsic for {RD|WR}PKRU
Differential Revision: http://reviews.llvm.org/D15837

llvm-svn: 256672
2015-12-31 14:14:07 +00:00
Benjamin Kramer b42d9a5f06 Replace llvm::utostr calls in Twine context with Twines. NFC.
llvm-svn: 256377
2015-12-24 10:07:37 +00:00
Daniel Sanders 5176f7ea6b [mips] Add _GCC_HAVE_SYNC_COMPARE_AND_SWAP macros.
This fixes the 'pure virtual function called' failure with ThreadPool in a
clang-built clang. This fixes the llvm-mips-linux builder.

llvm-svn: 256240
2015-12-22 12:59:30 +00:00
NAKAMURA Takumi 9ec6a826dd [Cygwin] Enable TLS as emutls.
It resolves clang selfhosting with std::once() for Cygwin.

FIXME: It may be EmulatedTLS-generic also for X86-Android.
FIXME: Pass EmulatedTLS to LLVM CodeGen from Clang with -femulated-tls.
llvm-svn: 256134
2015-12-21 02:37:23 +00:00
Krzysztof Parzyszek 1e6e3c60b4 [Hexagon] Update default paths and arguments
- Removed support for hexagonv3 and earlier.
- Added handling of hexagonv55 and hexagonv60.
- Added handling of target features (hvx, hvx-double).
- Updated paths to reflect current directory layout.

llvm-svn: 255502
2015-12-14 15:03:57 +00:00
Dan Gohman 4b971e4463 [WebAssembly] Remove an obsolete TODO comment.
llvm-svn: 254817
2015-12-05 01:36:31 +00:00
Christof Douma ba13ad58f7 Teaches clang about Cortex-A35.
Adds support for the new Cortex-A35 ARMv8-A core.

Differential Revision: http://reviews.llvm.org/D15142

llvm-svn: 254505
2015-12-02 12:03:42 +00:00
Alexandros Lamprineas 502592c1d4 ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract.

The following instructions are added to AArch32 instruction set:

- VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract
            Returning High Half

The following instructions are added to AArch64 instruction set:

- SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract
            Returning High Half

This patch adds intrinsic and ACLE macro support for these instructions,
as well as corresponding tests.

Differential Revision: http://reviews.llvm.org/D14982

llvm-svn: 254250
2015-11-29 10:43:59 +00:00
Alexey Bataev c99b04983b [X86] Support for C calling convention only for MCU target.
For MCU only C calling convention is allowed, all other calling conventions are not supported.
Differential Revision: http://reviews.llvm.org/D14864

llvm-svn: 254063
2015-11-25 09:24:26 +00:00
Tom Stellard d097e94abb AMDGPU: Add support for 's' and 'v' asm constraints
Summary: 's' is used to specify sgprs and 'v' is used to specify vgprs.

Reviewers: arsenm, echristo

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D14307

llvm-svn: 253610
2015-11-19 22:11:58 +00:00
Akira Hatanaka 8c26ea663d Produce a better diagnostic for global register variables.
Currently, when there is a global register variable in a program that
is bound to an invalid register, clang/llvm prints an error message that
is not very user-friendly.

This commit improves the diagnostic and moves the check that used to be
in the backend to Sema. In addition, it makes changes to error out if
the size of the register doesn't match the declared variable size.

e.g., volatile register int B asm ("rbp");

rdar://problem/23084219

Differential Revision: http://reviews.llvm.org/D13834

llvm-svn: 253405
2015-11-18 00:15:28 +00:00
Bradley Smith b350196d77 [ARM] Pass in the architecture to TargetParser to cope with API change
The TargetParser API to get the default FPU and default extensions has
changed so that it can fall back to the architecture in case of a
generic CPU.

llvm-svn: 253199
2015-11-16 11:16:36 +00:00
Artyom Skrobov ab2fab926f Cull non-standard variants of ARM architectures (NFC)
Summary: Clang-side update, corresponding to D14577

Reviewers: rengolin

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D14578

llvm-svn: 252904
2015-11-12 15:52:02 +00:00
Aaron Ballman a9a728513c Silencing a -Wreturn-type warning for control reaching the end of a non-void function.
llvm-svn: 252727
2015-11-11 13:42:02 +00:00
Dan Gohman 6db4640b80 [WebAssembly] Change long double to be quadruple-precision floating point.
llvm-svn: 252646
2015-11-10 21:01:46 +00:00
Joerg Sonnenberger 4ecfa623e5 Add the variant of __sparc_v9__ with five underscores, not just four.
llvm-svn: 252640
2015-11-10 19:28:17 +00:00
Joerg Sonnenberger ec353d3fc6 Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8
is not defined for 32bit mode, but __sparcv9 is. Pass down the correct
-target-cpu flags to the backend, so that instruction restrictions are
applied correctly. Pass down the correct -A flag when not using IAS.
The latter is limited to NetBSD targets in this commit.

llvm-svn: 252545
2015-11-09 23:39:45 +00:00
Andrey Bokhanko 94e1d5831b [x86] Additional small fix for MCU psABI support
This patch fixes one more thing in MCU psABI support: LongDoubleWidth should be set to 64.

Differential Revision: http://reviews.llvm.org/D14285

llvm-svn: 252156
2015-11-05 12:43:09 +00:00
Andrey Bokhanko 158b8b898c [x86] Front-end part of MCU psABI support
This patch implements two things in front-end for MCU psABI support:

1) "long double type is the same as double."
2) "New predefined C/C++ pre-processor symbols: iamcu and iamcu__.

Differential Revision: http://reviews.llvm.org/D14205

llvm-svn: 251786
2015-11-02 09:54:17 +00:00
Tim Northover 5627d3935a ARMv7k: implement ABI changes for watchOS from standard iOS.
llvm-svn: 251710
2015-10-30 16:30:45 +00:00
Tim Northover 756447a67c Watch and TV OS: wire up basic ABI choices
This sets the mostly expected Darwin default ABI options for these two
platforms. Active changes from these defaults for watchOS are in a later patch.

llvm-svn: 251708
2015-10-30 16:30:36 +00:00
Tim Northover 67465f80ec Preprocessor: define correct tvOS and watchOS version macros
llvm-svn: 251707
2015-10-30 16:30:30 +00:00
Reid Kleckner 11a17198e0 Fix the calling convention of Mingw64 long double values
GCC uses the x87DoubleExtended model for long doubles, and passes them
indirectly by address through function calls.

Also replace the existing mingw-long-double assembly emitting test with
an IR-level test.

llvm-svn: 251567
2015-10-28 22:29:52 +00:00
Rafael Espindola a9195877a5 Simplify boolean conditional return statements in lib/Basic.
Patch by Richard.

llvm-svn: 251214
2015-10-24 23:15:31 +00:00
Artyom Skrobov 05d85aee2e [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev
llvm-svn: 251124
2015-10-23 17:19:02 +00:00
John McCall 460ce58fa6 Define weak and __weak to mean ARC-style weak references, even in MRC.
Previously, __weak was silently accepted and ignored in MRC mode.
That makes this a potentially source-breaking change that we have to
roll out cautiously.  Accordingly, for the time being, actual support
for __weak references in MRC is experimental, and the compiler will
reject attempts to actually form such references.  The intent is to
eventually enable the feature by default in all non-GC modes.
(It is, of course, incompatible with ObjC GC's interpretation of
__weak.)

If you like, you can enable this feature with
  -Xclang -fobjc-weak
but like any -Xclang option, this option may be removed at any point,
e.g. if/when it is eventually enabled by default.

This patch also enables the use of the ARC __unsafe_unretained qualifier
in MRC.  Unlike __weak, this is being enabled immediately.  Since
variables are essentially __unsafe_unretained by default in MRC,
the only practical uses are (1) communication and (2) changing the
default behavior of by-value block capture.

As an implementation matter, this means that the ObjC ownership
qualifiers may appear in any ObjC language mode, and so this patch
removes a number of checks for getLangOpts().ObjCAutoRefCount
that were guarding the processing of these qualifiers.  I don't
expect this to be a significant drain on performance; it may even
be faster to just check for these qualifiers directly on a type
(since it's probably in a register anyway) than to do N dependent
loads to grab the LangOptions.

rdar://9674298

llvm-svn: 251041
2015-10-22 18:38:17 +00:00
Richard Barton 7dacc242d9 Fix __ARM_FP value for sp-only FPUs with Half-precision
The logic for parsing FP capabilities to set __ARM_FP was mistakenly removing
the Half-Precision capability when handling fp-only-sp resulting in a value
of 0x4. Section 6.5.1 of ACLE states that for such FP architectures the value
should be 0x6

llvm-svn: 250888
2015-10-21 10:03:55 +00:00
Craig Topper d945d50efc [X86] Remove a few 'else' after 'return'
llvm-svn: 250764
2015-10-20 00:00:17 +00:00
Craig Topper 6c03a54444 Make getTargetBuiltins return an ArrayRef instead of having two out parameters of a pointer and length. NFC
llvm-svn: 250681
2015-10-19 04:51:35 +00:00
Craig Topper f054e3ad6d Recommit "Return an ArrayRef instead of having two out parameters of a pointer and length. NFC". Hopefully this time the bots will be happy.
llvm-svn: 250678
2015-10-19 03:52:27 +00:00
Craig Topper d255c00acd Revert r250676 "Return an ArrayRef instead of having two out parameters of a pointer and length. NFC"
llvm-svn: 250677
2015-10-19 03:17:00 +00:00
Craig Topper 9c4d9b2316 Return an ArrayRef instead of having two out parameters of a pointer and length. NFC
llvm-svn: 250676
2015-10-19 03:05:12 +00:00
Craig Topper 273dbc602f Make a bunch of static arrays const.
llvm-svn: 250647
2015-10-18 05:29:26 +00:00
Craig Topper e33f51fa91 [X86] Add fxsr feature name for fxsave/fxrestore builtins.
llvm-svn: 250498
2015-10-16 06:22:36 +00:00
Ed Schouten ea9448e468 Add support for CloudABI/aarch64.
The core C library has already been ported over to aarch64 successfully,
meaning there is no reason to hold this change back.

llvm-svn: 250416
2015-10-15 15:07:07 +00:00
Craig Topper da9fe56bf6 [X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names.
llvm-svn: 250368
2015-10-15 05:23:38 +00:00
Craig Topper 543f3bdf39 [X86] Use C+11 non-static data member initialization to initialize all the X86 feature controls. NFC
This simplifies the constructor initialization list and makes it less likely a feature flag will be forgotten there.

llvm-svn: 250348
2015-10-14 23:47:57 +00:00
Eric Christopher b093d69062 Fix whitespace, 80-column violations, embedded tabs for the
TargetInfo class.

llvm-svn: 249872
2015-10-09 18:39:59 +00:00
Eric Christopher 8c47b427f9 constify the feature vector going into initFeatureMap as it shouldn't
change the set of features.

llvm-svn: 249871
2015-10-09 18:39:55 +00:00