48370e14e7
fix a type mismatch in this pattern, where we were using an i64 imm in a
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place where an i32 imm was required, the old isel just got lucky.
This fixes CodeGen/X86/x86-64-and-mask.ll
llvm-svn: 96894
2010-02-23 06:09:57 +00:00
923261bbe9
Update memdep when load PRE inserts a new load, and add some debug output.
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I don't have a small testcase for this.
llvm-svn: 96890
2010-02-23 05:55:00 +00:00
c51b7198a9
reapply my cellspu changes with a fix to not break the old isel.
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llvm-svn: 96885
2010-02-23 05:30:43 +00:00
7e5c4906dd
Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.
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llvm-svn: 96871
2010-02-23 02:33:29 +00:00
a828850b4d
X86InstrInfoSSE.td declares PINSRW as having type v8i16,
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don't alis it in the MMX .td file with a different width,
split into two X86ISD opcodes. This fixes an x86 testcase.
llvm-svn: 96859
2010-02-23 02:07:48 +00:00
21dbd6f449
Added versions of VCGE, VCGT, VCLE, and VCLT NEON instructions which compare to
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(immediate #0 ) for disassembly only.
A8.6.283, A8.6.285, A8.6.287, A8.6.290
llvm-svn: 96856
2010-02-23 01:42:58 +00:00
22bc26e4cf
fix hte last cellspu failure.
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llvm-svn: 96854
2010-02-23 01:37:39 +00:00
807666783c
hack around more crimes in instruction selection.
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llvm-svn: 96852
2010-02-23 01:33:17 +00:00
fbbe2617dc
the cell backend is making all sorts of unsafe and incorrect assumptions
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about ownership and update policies. It isn't clear why it is doing all
this lowering at isel time instead of in legalize. This fixes fcmp64.ll
llvm-svn: 96849
2010-02-23 01:20:00 +00:00
886915e3bb
Added VCEQ (immediate #0 ) NEON instruction for disassembly only.
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A8.6.281
llvm-svn: 96838
2010-02-23 00:33:12 +00:00
012d4369f6
Dead code elimination
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llvm-svn: 96837
2010-02-23 00:28:53 +00:00
cc2e3d22df
Fix viewCFG on Linux.
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llvm-svn: 96834
2010-02-23 00:04:53 +00:00
3688b8fa68
Instcombine constant folding can normalize gep with negative index to index with large offset. When instcombine objsize checking transformation sees these geps where the offset seemingly point out of bound, it should just return "i don't know" rather than asserting.
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llvm-svn: 96825
2010-02-22 23:34:00 +00:00
45fceea0e4
Updated version of r96634 (which was reverted due to failing 176.gcc and
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126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.
llvm-svn: 96822
2010-02-22 23:10:38 +00:00
017a505716
Clean up a bit and fix for when SPAdj != 0
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llvm-svn: 96818
2010-02-22 22:54:55 +00:00
15f6ed348f
The predicate index isn't fixed, so scan for it to make sure we get the proper
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value.
Thumb2 uses the tADJCALLSTACK* instructions, and doesn't need t2 versions, so
remove the FIXME entry.
llvm-svn: 96817
2010-02-22 22:47:46 +00:00
6c5ac6de5c
Canonicalize ConstantInts to the right operand of commutative
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operators.
The test difference is just due to the multiplication operands
being commuted (and thus requiring a more elaborate match). In
optimized code, that expression would be folded.
llvm-svn: 96816
2010-02-22 22:43:23 +00:00
3ac438b920
remove dupes now.
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llvm-svn: 96811
2010-02-22 22:15:05 +00:00
435611200b
move #includes earlier.
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llvm-svn: 96810
2010-02-22 22:14:47 +00:00
5fe3129a5d
MC/Mach-O: Remove non-sensical comment, and add a missing AddValueSymbols call.
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llvm-svn: 96809
2010-02-22 22:08:57 +00:00
ebf57b06ea
Minor formatting cleanup.
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llvm-svn: 96808
2010-02-22 22:07:27 +00:00
6eeabaad2b
Use Instruction::isCommutative instead of duplicating it.
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llvm-svn: 96807
2010-02-22 22:05:18 +00:00
5ddd4aca97
Added SEL, SXTB16, SXTAB16, UXTAB16, SMMULR, SMMLAR, SMMLSR, SMUAD, and SMUSD,
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for disassembly only.
llvm-svn: 96806
2010-02-22 21:50:40 +00:00
1da9041913
Erase deleted instructions from GVN's ValueTable. This fixes assertion
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failures from ValueTable::verifyRemoved() when using -debug.
llvm-svn: 96805
2010-02-22 21:39:41 +00:00
9d4a3e2a7c
Added a bunch of instructions for disassembly only:
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o signed/unsigned add/subtract
o signed/unsigned halving add/subtract
o unsigned sum of absolute difference [and accumulate]
o signed/unsigned saturate
o signed multiply accumulate/subtract [long] dual
llvm-svn: 96795
2010-02-22 18:50:54 +00:00
30ece5b807
Mark the return address stack slot as mutable when moving the return address
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during a tail call. A parameter might overwrite this stack slot during the tail
call.
The sequence during a tail call is:
1.) load return address to temp reg
2.) move parameters (might involve storing to return address stack slot)
3.) store return address to new location from temp reg
If the stack location is marked immutable CodeGen can colocate load (1) with the
store (3).
This fixes bug 6225.
llvm-svn: 96783
2010-02-22 16:18:09 +00:00
8c16b38262
Remove unused variables and parameters.
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llvm-svn: 96780
2010-02-22 04:11:59 +00:00
30ff721f09
Fix various doxygen warnings.
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llvm-svn: 96779
2010-02-22 04:10:52 +00:00
c1a545c307
Fix a typo in a comment.
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llvm-svn: 96778
2010-02-22 04:09:26 +00:00
754e4a9801
Constant-fold certain comparisons with infinity and negative infinity.
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llvm-svn: 96777
2010-02-22 04:06:03 +00:00
b87de8d30d
Remove the logic for reasoning about NaNs from the code that forms
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SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.
Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.
llvm-svn: 96775
2010-02-22 04:03:39 +00:00
4506fcb3c2
When emitting an instruction which depends on both a post-incremented
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induction variable value and a loop-variant value, don't force the
insert position to be at the post-increment position, because it may
not be dominated by the loop-variant value. This fixes a
use-before-def problem noticed on PPC.
llvm-svn: 96774
2010-02-22 03:59:54 +00:00
740909be2d
This cast<Instruction> is unnecessary.
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llvm-svn: 96771
2010-02-22 02:07:36 +00:00
db8d6678e9
fix an incorrect VT: eflags is always i32. The bug was causing us to
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create an X86ISD::Cmp node with result type i64 on the
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.
llvm-svn: 96768
2010-02-22 00:28:59 +00:00
40eb7f0991
MC/X86: Add stub AsmBackend.
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llvm-svn: 96763
2010-02-21 21:54:14 +00:00
3bea9bfa04
MC: Sketch registry support for target specific assembler backends.
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llvm-svn: 96762
2010-02-21 21:53:53 +00:00
31a9212b0b
It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
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This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.
llvm-svn: 96755
2010-02-21 20:28:15 +00:00
455201ba71
Remove a bunch of duplicated code, where there was one version taking a std::ostream
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and another taking a raw_ostream, but otherwise identical. Use raw_ostream everywhere.
llvm-svn: 96746
2010-02-21 19:15:19 +00:00
951d27e544
Enable assertion to detect cyclic valno references.
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This changes the stack overflow in PR6363 to an assertion failure.
llvm-svn: 96744
2010-02-21 18:51:48 +00:00
e96503faa1
IT turns out that during jumpless setcc lowering eq and ne were swapped.
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This fixes PR6348
llvm-svn: 96734
2010-02-21 12:28:58 +00:00
3c29aff9ff
fix and un-xfail X86/vec_ss_load_fold.ll
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llvm-svn: 96720
2010-02-21 04:53:34 +00:00
a07c9c7c56
Undo r96654. The printing of ARM shift instructions in canonical forms can be
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handled in ARMInstPrinter.cpp.
And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.
llvm-svn: 96719
2010-02-21 04:42:01 +00:00
18a32ce0f3
rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewrite
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it to follow the mode needed by the new isel. Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.
Since we want the old thing to still work, add a new
SelectScalarSSELoad to emulate the old interface. The XXX suffix
and the wrapper will eventually go away.
llvm-svn: 96715
2010-02-21 03:17:59 +00:00
986ab3fb1d
Eliminate some uses of immAllOnes, just use -1, it does
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the same thing and is more efficient for the matcher.
llvm-svn: 96712
2010-02-21 03:12:16 +00:00
4eebb94094
Rename getSDiv to getExactSDiv to reflect its behavior in cases where
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the division would have a remainder.
llvm-svn: 96693
2010-02-19 19:35:48 +00:00
85af256779
Check for overflow when scaling up an add or an addrec for
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scaled reuse.
llvm-svn: 96692
2010-02-19 19:32:49 +00:00
fbc9d8d424
Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
...
the armv6 nightly tests.
llvm-svn: 96691
2010-02-19 18:59:53 +00:00
cf9c64e6e3
Add a comment.
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llvm-svn: 96688
2010-02-19 18:49:22 +00:00
7e47767763
Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
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Also, FileCheck'ize a test.
llvm-svn: 96686
2010-02-19 18:17:13 +00:00
6b1e2a829d
Teach ScalarEvolution how to compute a tripcount for a loop with
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true or false as its exit condition. These are usually eliminated by
SimplifyCFG, but the may be left around during a pass which wishes
to preserve the CFG.
llvm-svn: 96683
2010-02-19 18:12:07 +00:00
Chris Lattner