Commit Graph

96 Commits

Author SHA1 Message Date
Akira Hatanaka 35792089e7 Change the chain input of nodes that load the address of a function. This change
enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.

llvm-svn: 133811
2011-06-24 19:01:25 +00:00
Akira Hatanaka ca88b4abec Prevent generation of redundant addiu instructions that compute address of
static variables or functions. 

llvm-svn: 133803
2011-06-24 17:55:19 +00:00
Akira Hatanaka 4c406e7457 Re-apply 132758 and 132768 which were speculatively reverted in 132777.
llvm-svn: 133494
2011-06-21 00:40:49 +00:00
Chris Lattner 5756c16cdf make the asmparser reject function and type redefinitions. 'Merging' hasn't been
needed since llvm-gcc 3.4 days.

llvm-svn: 133248
2011-06-17 07:06:44 +00:00
Chris Lattner b90ed2233c manually upgrade a bunch of tests to modern syntax, and remove some that
are either unreduced or only test old syntax.

llvm-svn: 133228
2011-06-17 03:14:27 +00:00
Eric Christopher f15601f19a Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
llvm-svn: 132777
2011-06-09 16:03:19 +00:00
Akira Hatanaka 0683a7212e Initial support for inline asm memory operand constraints.
llvm-svn: 132768
2011-06-09 03:31:05 +00:00
Akira Hatanaka 4e9af454f7 Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
dynamically allocated stack area was not set.

llvm-svn: 132758
2011-06-08 21:28:09 +00:00
Akira Hatanaka 08b7a779ef Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:
- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
  to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
  callee-saved register is emitted even when no callee-saved registers are
  saved.
- When a callee-saved double precision register is saved, two cfi_offset
  directives, one for each of the paired single precision registers, should be
  emitted.
 
 

llvm-svn: 132703
2011-06-07 02:17:21 +00:00
Akira Hatanaka 2446869410 Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
llvm-svn: 132448
2011-06-02 01:03:14 +00:00
Akira Hatanaka d84c76f2a7 Test case for r132444.
llvm-svn: 132445
2011-06-02 00:25:53 +00:00
Bruno Cardoso Lopes 98fc4c8bbc This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes bf3c1251e0 This patch implements the thread local storage. Implemented are General
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

llvm-svn: 132322
2011-05-31 02:53:58 +00:00
Jakob Stoklund Olesen dd6fcc4e46 Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.

The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.

llvm-svn: 132298
2011-05-29 20:10:28 +00:00
Akira Hatanaka b406843fe5 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Akira Hatanaka aa560006ed Add support for C++ exception handling.
llvm-svn: 132131
2011-05-26 18:59:03 +00:00
Akira Hatanaka fa63d3096d Define WeakRefDirective.
llvm-svn: 132098
2011-05-25 23:30:30 +00:00
Akira Hatanaka 44eba3ac49 Custom-lower FCOPYSIGN nodes.
llvm-svn: 132074
2011-05-25 19:32:07 +00:00
Akira Hatanaka aac670c1c8 Fix lowering of DYNAMIC_STACKALLOC nodes.
llvm-svn: 132030
2011-05-25 02:20:00 +00:00
Akira Hatanaka 2486729839 Test case for r132003.
llvm-svn: 132005
2011-05-24 21:28:18 +00:00
Akira Hatanaka ce4037ebcf Fix test case.
llvm-svn: 131988
2011-05-24 19:37:15 +00:00
Akira Hatanaka 0f30561bae Revision 131986 test case.
llvm-svn: 131987
2011-05-24 19:29:37 +00:00
Akira Hatanaka 6af5bd2537 Add pattern for double-to-integer conversion. Patch by Sasa Stankovic.
llvm-svn: 131927
2011-05-23 22:16:43 +00:00
Akira Hatanaka f9e5750fc8 Change StackDirection from StackGrowsUp to StackGrowsDown.
The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
  the stack pointer) are set before instruction selection is completed. There is
  no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
  no longer necessary to assign negative offsets to fixed objects for incoming
  arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
  selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in 
  MipsFrameLowering::adjustMipsStackFrame.

llvm-svn: 131915
2011-05-23 20:16:59 +00:00
Akira Hatanaka 43407fe633 Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
saving and restoring them.

llvm-svn: 131745
2011-05-20 18:39:33 +00:00
Akira Hatanaka fe4f9d5977 Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
llvm-svn: 131714
2011-05-20 02:30:51 +00:00
Akira Hatanaka 9e6a8cca5d Align i64 arguments to 64 bit boundaries.
llvm-svn: 131668
2011-05-19 20:29:48 +00:00
Akira Hatanaka 3bace5d223 Remove LLVM IR metadata in test case committed in r130847.
llvm-svn: 130849
2011-05-04 18:28:36 +00:00
Akira Hatanaka 23e8ecf125 Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.
llvm-svn: 130847
2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen 5b5abb4ea1 Don't run this test through -regalloc=basic.
The basic allocator is really bad about hinting, so it doesn't eliminate all
copies when physreg joining is disabled.

llvm-svn: 130817
2011-05-04 01:01:44 +00:00
Akira Hatanaka 0e7ee666b7 Lower BlockAddress node when relocation-model is static.
llvm-svn: 130131
2011-04-25 17:10:45 +00:00
Jakob Stoklund Olesen bf78618db6 Make tests register allocation independent again.
llvm-svn: 129739
2011-04-19 00:14:43 +00:00
Akira Hatanaka 2cb3aa30dd Re-enable test o32_cc_vararg.ll.
llvm-svn: 129616
2011-04-15 22:23:09 +00:00
Akira Hatanaka 279169771b Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
llvm-svn: 129594
2011-04-15 19:52:08 +00:00
Andrew Trick b53a00d2cb Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.
Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.

Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129421
2011-04-13 00:38:32 +00:00
Akira Hatanaka d6f1c58914 Fix handling of functions with internal linkage.
llvm-svn: 129099
2011-04-07 19:51:44 +00:00
Jakob Stoklund Olesen 1ec41e2bd9 These tests no longer require linear scan because reserved register coalescing is now universal.
llvm-svn: 128936
2011-04-05 21:40:41 +00:00
Akira Hatanaka 93f898f643 Add code for analyzing FP branches. Clean up branch Analysis functions.
llvm-svn: 128718
2011-04-01 17:39:08 +00:00
Jakob Stoklund Olesen f4c9754d5c Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.

llvm-svn: 128654
2011-03-31 18:42:43 +00:00
Akira Hatanaka a535270d91 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons.
llvm-svn: 128650
2011-03-31 18:26:17 +00:00
Daniel Dunbar 66559ba79a Revert "Re-enable test and hope to silence the buildbots", still broken.
llvm-svn: 127369
2011-03-09 22:48:46 +00:00
Bruno Cardoso Lopes 6492ef1237 Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka
llvm-svn: 127358
2011-03-09 21:05:32 +00:00
Bruno Cardoso Lopes 961908982f Re-enable test and hope to silence the buildbots
llvm-svn: 127357
2011-03-09 21:00:16 +00:00
Bruno Cardoso Lopes bd2f81c87b try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka.
llvm-svn: 127356
2011-03-09 20:59:05 +00:00
Bruno Cardoso Lopes 048ffabe78 Improve varags handling, with testcases. Patch by Sasa Stankovic
llvm-svn: 127349
2011-03-09 19:22:22 +00:00
Bruno Cardoso Lopes 434248a62c Improve div/rem node handling on mips. Patch by Akira Hatanaka
llvm-svn: 127034
2011-03-04 21:03:24 +00:00
Bruno Cardoso Lopes d631599e38 Add testcase for r127032
llvm-svn: 127033
2011-03-04 20:48:39 +00:00
Joerg Sonnenberger 62f759791a Be nice to Xcore and the XMOS assembler and avoid quoting section names
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
2011-03-04 20:03:14 +00:00
Bruno Cardoso Lopes f8198e4311 Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka
llvm-svn: 127027
2011-03-04 20:01:52 +00:00
Joerg Sonnenberger 852ab890b5 Bug#9033: For the ELF assembler output, always quote the section name.
llvm-svn: 126963
2011-03-03 22:31:08 +00:00