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279 Commits

Author SHA1 Message Date
Brian Gaeke 74584cd842 update according to tonight's info 
llvm-svn: 16866
 2004-10-09 05:58:27 +00:00
Brian Gaeke 9c0710781d Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the 
default 32/BE target on sparc hosts, and ppc will continue to be the default
on other hosts.

llvm-svn: 16865
 2004-10-09 05:57:01 +00:00
Brian Gaeke a1640d2427 I think this will handle double args. 
llvm-svn: 16618
 2004-09-30 19:44:32 +00:00
Brian Gaeke 7efd5fcb3a Mark the instructions that have delay slots with the hasDelaySlot flag. 
Add some comments.

llvm-svn: 16611
 2004-09-30 04:04:48 +00:00
Brian Gaeke 1f48ef2a9a Use TargetMachine::hasDelaySlot() instead of our old switch statement 
to find instrs that have delay slots.

llvm-svn: 16610
 2004-09-30 04:04:47 +00:00
Brian Gaeke fb1fd0cb5f Update list of shootout programs that should be working. 
llvm-svn: 16595
 2004-09-29 20:45:06 +00:00
Brian Gaeke ede068a8d3 Tell the target description that calls clobber registers O0...O5. 
llvm-svn: 16594
 2004-09-29 20:45:05 +00:00
Brian Gaeke 3a340dd7cd FITOD is spelled "fitod", not "fitos". Ouch. 
llvm-svn: 16591
 2004-09-29 19:59:07 +00:00
Brian Gaeke 47095da661 Don't use .quad to output double constants. The assembler must have a bug or 
something, because the wrong bit patterns get output.

llvm-svn: 16590
 2004-09-29 19:59:06 +00:00
Brian Gaeke 81f5e08573 Recognize FpMOVD as a move. 
llvm-svn: 16586
 2004-09-29 16:45:47 +00:00
Brian Gaeke c44da15813 add results 
llvm-svn: 16579
 2004-09-29 03:48:55 +00:00
Brian Gaeke 4023d4e191 Simplify copyConstantToRegister() for longs, using a pair of recursive calls. 
Copy constant-pool entries' addresses into registers before loading out of them,
to avoid errors from the assembler.
Handle loading call args past the 6th one off the stack.
Add IMPLICIT_DEF pseudo-instrs for double and long arguments passed in register
pairs.
Use FpMOVD to copy doubles around instead of the horrible store-load thing we
were doing before.
Handle 'ret double' and 'ret long'.
Fix a bug in handling 'and/or/xor long'.

llvm-svn: 16577
 2004-09-29 03:34:41 +00:00
Brian Gaeke eae5b17dba Fix bug recognizing moves: isMoveInstr should only treat ORs with %g0 as 
moves, not all ORs.

llvm-svn: 16576
 2004-09-29 03:28:15 +00:00
Brian Gaeke 069bb989e4 Use FpMOVD pseudo-instruction to move doubles around. 
llvm-svn: 16575
 2004-09-29 03:27:30 +00:00
Brian Gaeke da371d9cf3 Add new FpMOVD pseudo-instruction, used to move doubles around. 
llvm-svn: 16574
 2004-09-29 03:27:29 +00:00
Brian Gaeke 7f11dd4825 Fix double and long alignment. 
Call the FPMover pass after register allocation.

llvm-svn: 16573
 2004-09-29 03:26:27 +00:00
Brian Gaeke ead8e39832 Put quotes around argument to .section directive. 
llvm-svn: 16572
 2004-09-29 03:25:40 +00:00
Brian Gaeke 457180c597 Add createSparcV8FPMoverPass(). 
llvm-svn: 16571
 2004-09-29 03:25:39 +00:00
Brian Gaeke ce0ba4857b Pass which converts FpMOVD (double move pseudoinstructions) to pairs 
of FMOVS instrs.

llvm-svn: 16570
 2004-09-29 03:24:34 +00:00
Misha Brukman d409d38151 SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned! 
llvm-svn: 16526
 2004-09-27 18:22:18 +00:00
Misha Brukman a68d76ebfa Fix the copy-pasto that Brian noticed: V8 int regs are 32-bits wide, not 64. 
llvm-svn: 16518
 2004-09-26 21:07:43 +00:00
Misha Brukman 379a05b52a Use the V8/V9 shared register file description 
llvm-svn: 16485
 2004-09-22 21:48:50 +00:00
Misha Brukman 3c08658d56 Combine the F2 and F3 instruction classes into one file for simplicity 
llvm-svn: 16484
 2004-09-22 21:38:42 +00:00
Misha Brukman efce1ef9c3 Fix file header path 
llvm-svn: 16483
 2004-09-22 21:29:12 +00:00
Misha Brukman 009aaf9968 Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc 
llvm-svn: 16482
 2004-09-22 20:09:29 +00:00
Misha Brukman d55f854a5d V8 is now a subdirectory of Sparc; adjust paths accordingly 
llvm-svn: 16481
 2004-09-22 20:08:52 +00:00
Chris Lattner 247c29e4b0 Changes to make this work with Jason's patch. I checked this by hand, but 
would appreciate if others would also look at this to make sure I didn't
botch something obvious

llvm-svn: 16312
 2004-09-13 21:32:03 +00:00
Misha Brukman 04bbe6fa25 Renamed file to SparcV8ISelSimple.cpp 
llvm-svn: 16267
 2004-09-10 18:51:12 +00:00
Brian Gaeke acafb39cc3 This file does not need <iostream>, I think. 
llvm-svn: 16245
 2004-09-08 04:10:52 +00:00
Brian Gaeke c6e81f0fde Back to compiling land for v8 
llvm-svn: 16138
 2004-09-02 02:37:43 +00:00
Chris Lattner b7ddc73b45 Convert bytes to bits in alignment 
llvm-svn: 15971
 2004-08-21 20:09:46 +00:00
Chris Lattner 26971f4bc2 V8 never used the instrselectorgenerator 
llvm-svn: 15791
 2004-08-15 23:07:40 +00:00
Chris Lattner a0b38d3cb1 Code insertion methods now return void instead of an int. 
llvm-svn: 15780
 2004-08-15 22:15:11 +00:00
Chris Lattner 98de1d7795 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00
Chris Lattner b08d2a2a11 Update to no longer take MF as an argument 
llvm-svn: 15748
 2004-08-14 22:57:22 +00:00
Misha Brukman 8f951e579b Remove ClassPrefix variable as it's no longer used. 
llvm-svn: 15586
 2004-08-09 19:13:29 +00:00
Misha Brukman 0eb9cee698 The (future) SparcV8 JIT would do well to have a class prefix. 
llvm-svn: 15583
 2004-08-09 18:13:09 +00:00
Brian Gaeke a1a0643e38 Update the To-Do list according to my notes + assertions 
llvm-svn: 15535
 2004-08-06 04:38:13 +00:00
Chris Lattner 50c6df4ba0 getValues is gone 
llvm-svn: 15494
 2004-08-04 17:27:27 +00:00
Chris Lattner 4504b95801 I'm pretty sure that ba is branch always, which is a barrier. Brg should 
check this :)

llvm-svn: 15357
 2004-07-31 02:24:37 +00:00
Chris Lattner 51ebdec5c0 I think that V8 should coallesce registers, don't you? 
llvm-svn: 15192
 2004-07-25 06:19:04 +00:00
Chris Lattner 9ce34cb323 CPR fixes 
llvm-svn: 14960
 2004-07-18 07:26:17 +00:00
Brian Gaeke 135b870f72 Add a class for pseudo-instructions. Use it. 
Add IMPLICIT_USE and IMPLICIT_DEF, a la X86.

llvm-svn: 14884
 2004-07-16 10:32:10 +00:00
Brian Gaeke a57943154e Add what will eventually be the TSFlags. Big switch(opcode) statements are bad. 
llvm-svn: 14883
 2004-07-16 10:31:59 +00:00
Brian Gaeke f486726c56 Add special handling for pseudo-instructions (print them as comments). 
llvm-svn: 14882
 2004-07-16 10:31:47 +00:00
Brian Gaeke 97b71c9fa9 Add to-do list. 
llvm-svn: 14881
 2004-07-16 10:31:36 +00:00
Brian Gaeke 5ce1408537 Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc. 
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.

llvm-svn: 14880
 2004-07-16 10:31:25 +00:00
Chris Lattner c2726e63ed Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.

llvm-svn: 14756
 2004-07-11 04:17:10 +00:00
Chris Lattner 73eb9436ee Make these format a bit nicer 
llvm-svn: 14747
 2004-07-11 03:27:42 +00:00
Chris Lattner 4266f8017d Auto-registrate target 
llvm-svn: 14745
 2004-07-11 02:48:49 +00:00
Brian Gaeke 8165863a9d Support setcc on fp values. 
llvm-svn: 14687
 2004-07-08 09:08:35 +00:00
Brian Gaeke 7b4722e62c Add floating-point branches and compares. Compares don't complete 
until the next cycle, and there's no interlock, so they effectively
have a delay slot.

llvm-svn: 14686
 2004-07-08 09:08:22 +00:00
Brian Gaeke 3b204c3f24 Fix bug where SwitchSection would fail to change to ".bss" successfully. 
llvm-svn: 14685
 2004-07-08 08:08:23 +00:00
Brian Gaeke 4fdd22b922 Fix bug involving bool arguments to binary operators. 
Fix typo in comment.

llvm-svn: 14684
 2004-07-08 08:08:10 +00:00
Brian Gaeke dc5940794c Fix bug in copying long constants to register pairs. We were getting 
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.

llvm-svn: 14683
 2004-07-08 07:52:13 +00:00
Brian Gaeke 4ba31a2e1e Support 'ret float' 
llvm-svn: 14681
 2004-07-08 07:22:27 +00:00
Chris Lattner 0969646d6e Add #includes 
llvm-svn: 14625
 2004-07-04 17:19:21 +00:00
Chris Lattner 55256dbf9b Fix potential problems with unreachable basic blocks. 
Also, while noone's looking, add support for constant expressions.  Wait,
I said not to look!

llvm-svn: 14566
 2004-07-02 05:49:11 +00:00
Misha Brukman b9125f462d Fix indentation to be 2 spaces. 
llvm-svn: 14512
 2004-06-30 22:11:03 +00:00
Misha Brukman 04f07b4589 visitSetCondInst() takes a parameter of type `SetCondInst' 
llvm-svn: 14508
 2004-06-30 21:47:40 +00:00
Brian Gaeke 81f67f60ec Allow saving and restoring of double and float registers. 
Allow copying of float registers.

llvm-svn: 14445
 2004-06-27 22:59:56 +00:00
Brian Gaeke b3d33c7994 Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}. 
llvm-svn: 14444
 2004-06-27 22:53:56 +00:00
Brian Gaeke 187ff172b6 Support printing constant pool indices. 
If we see an "unknown operand", abort so it's easier to fix it.

llvm-svn: 14441
 2004-06-27 22:50:44 +00:00
Brian Gaeke c81b5a5331 Trim whitespace. 
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.

llvm-svn: 14440
 2004-06-27 22:47:33 +00:00
Misha Brukman c562342751 * LowercaseString moved to StringExtras.h 
* Wrap long line to 80 cols

llvm-svn: 14382
 2004-06-24 23:38:20 +00:00
Brian Gaeke 27966ba77b Add FSTOD and FDTOS conversion instructions. 
llvm-svn: 14372
 2004-06-24 21:22:09 +00:00
Brian Gaeke 72490c8d86 Support cast float to float, cast double to float, and cast float to double. 
(It's not yet clear how to copy doubles from register to register.)

llvm-svn: 14371
 2004-06-24 21:22:08 +00:00
Brian Gaeke eea4b17cf8 Make the double-fp pseudo registers be "NamedRegs". 
llvm-svn: 14366
 2004-06-24 09:23:21 +00:00
Brian Gaeke 2f6741f4f3 Fix a dyn_cast in copyConstantToRegister which should have been a cast. 
Compactify the code that emits copies of constant ints into registers.

llvm-svn: 14365
 2004-06-24 09:17:47 +00:00
Brian Gaeke c605ae6754 The long integer pseudo-regs are history. So long, we hardly knew ye. 
llvm-svn: 14364
 2004-06-24 08:55:21 +00:00
Brian Gaeke 4ed2826ce5 Use correct add*Imm form in more BuildMI calls. 
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.

llvm-svn: 14363
 2004-06-24 08:55:09 +00:00
Brian Gaeke 7777e66704 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.

llvm-svn: 14362
 2004-06-24 07:37:12 +00:00
Brian Gaeke c8e1b5abe8 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Add fp stores.

llvm-svn: 14361
 2004-06-24 07:36:59 +00:00
Brian Gaeke 9f455efff1 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.

llvm-svn: 14360
 2004-06-24 07:36:48 +00:00
Brian Gaeke 8863de761d Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of 
representational consistency, we want to address the halves of each 64-bit value
separately.

llvm-svn: 14356
 2004-06-24 06:44:57 +00:00
Brian Gaeke 1e8cc73ea3 Support constant cast expressions. 
llvm-svn: 14355
 2004-06-24 06:33:00 +00:00
Brian Gaeke 5825bdd8b2 Add pseudo-registers and register class for 64-bit integer values. 
llvm-svn: 14332
 2004-06-22 20:14:41 +00:00
Misha Brukman 31f4df6b54 Order #includes as per style guide. 
llvm-svn: 14305
 2004-06-21 21:54:40 +00:00
Chris Lattner bcdadf3765 Move the IntrinsicLowering header into the CodeGen directory, as per PR346 
llvm-svn: 14266
 2004-06-20 07:49:54 +00:00
Brian Gaeke 5b433a5de9 .zero doesn't work in the Solaris assembler. 
llvm-svn: 14231
 2004-06-18 08:59:16 +00:00
Brian Gaeke 4125c92009 Get rid of selects the easy way 
llvm-svn: 14230
 2004-06-18 08:46:15 +00:00
Brian Gaeke 694f7b78d9 Make visitAllocaInst() look more like its X86 counterpart. 
llvm-svn: 14229
 2004-06-18 08:45:52 +00:00
Brian Gaeke fcc30aca1b Mess around with allocation order. In particular, I think we ought to be 
using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228
 2004-06-18 08:19:08 +00:00
Brian Gaeke b42345811e JMPL has a delay slot. 
llvm-svn: 14227
 2004-06-18 08:18:54 +00:00
Brian Gaeke 7d9af983de Clean up the commented-out F3_3 stuff. 
Replace it with a working class for FP instrs.

llvm-svn: 14226
 2004-06-18 06:28:21 +00:00
Brian Gaeke 75f3738969 Fix jmpl. 
Add some FP moves.

llvm-svn: 14225
 2004-06-18 06:28:10 +00:00
Brian Gaeke 12ee9a1e75 Support printing base+offset pairs where the offset is a register. 
Use this for printing the jmpl indirect-call instruction.

llvm-svn: 14224
 2004-06-18 06:27:59 +00:00
Brian Gaeke 5ebab28a8a Support intrinsic calls (although no particular intrinsics are supported yet). 
Support indirect calls.
Support returning a float value.

llvm-svn: 14223
 2004-06-18 06:27:48 +00:00
Brian Gaeke 51d3c7b05b Add load instructions for floating-point registers. 
llvm-svn: 14217
 2004-06-18 05:19:27 +00:00
Brian Gaeke 21305c6f0c Support alloca instructions. 
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.

llvm-svn: 14216
 2004-06-18 05:19:16 +00:00
Brian Gaeke c37af629b4 Make storeRegToStackSlot slightly shorter. 
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().

llvm-svn: 14211
 2004-06-17 22:34:48 +00:00
Brian Gaeke eca9546dc3 Set the isBranch and isTerminator flags on branch instructions correctly. 
Add a FIXME about the (currently unused) JMPL instructions.

llvm-svn: 14210
 2004-06-17 22:34:29 +00:00
Brian Gaeke 63c1d6eda8 Emit stores correctly; don't fail an assertion. 
llvm-svn: 14209
 2004-06-17 22:34:19 +00:00
Brian Gaeke c4ee938f55 Support generating machine instructions for Phi nodes (based on x86, but with 
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.

llvm-svn: 14208
 2004-06-17 22:34:08 +00:00
Brian Gaeke a067fb3e6b Recognize more branches. 
llvm-svn: 14207
 2004-06-17 22:33:57 +00:00
Brian Gaeke 2f2b5f5b93 Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp. 
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.

llvm-svn: 14202
 2004-06-17 19:39:23 +00:00
Chris Lattner 6b7275996c Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID() 
llvm-svn: 14201
 2004-06-17 18:19:28 +00:00
Brian Gaeke 476c73b241 Fix thinko in visitor... ShiftInsts should currently be delegated 
to visitBinaryOperator.

llvm-svn: 14182
 2004-06-15 21:09:46 +00:00
Brian Gaeke 675c0e9701 I think we'll use the standard lowering passes for now. 
llvm-svn: 14179
 2004-06-15 20:37:12 +00:00
Brian Gaeke 0c8ee30d53 Fix bug generating code for void call instructions: don't call 
getReg() on void value.

llvm-svn: 14178
 2004-06-15 20:06:32 +00:00
Brian Gaeke 065a6cb93a Squash a warning from the Solaris assembler by aligning the stack 
on a double-word boundary instead of a single-word boundary.

llvm-svn: 14177
 2004-06-15 19:53:10 +00:00
Brian Gaeke ad98a9b526 Allow special-casing of operand printing based on opcode. Print 
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.

llvm-svn: 14176
 2004-06-15 19:52:59 +00:00
Brian Gaeke 19fbd28a06 Support constant GEP expressions. 
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.

llvm-svn: 14175
 2004-06-15 19:16:07 +00:00
Chris Lattner 63c07bf246 Adjust to new TM interfaces 
llvm-svn: 13949
 2004-06-02 05:47:26 +00:00
Brian Gaeke 1096ba9422 Add support for widening integral casts. 
Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):

       BB
   cond. branch
     /         /          R1=1    R2=0
     \      /
      \    /
    R=phi(R1,R2)

Other minor edits.

llvm-svn: 13423
 2004-05-08 06:36:14 +00:00
Brian Gaeke 91bf7cb79b Add a bunch more branches 
llvm-svn: 13422
 2004-05-08 06:08:29 +00:00
Brian Gaeke 7a66e5fff9 Flesh out GEP support 
llvm-svn: 13421
 2004-05-08 05:27:20 +00:00
Brian Gaeke d18b330605 Add ADD with immediate 
llvm-svn: 13420
 2004-05-08 05:26:55 +00:00
Brian Gaeke b56f1c9c10 Add forms of CMP, SUBCC, and a few branches, and some comments. 
llvm-svn: 13419
 2004-05-08 04:21:32 +00:00
Brian Gaeke f3a479f04a Add stub support for GEPs. 
Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.

llvm-svn: 13418
 2004-05-08 04:21:17 +00:00
Brian Gaeke 584308b71a Add support for copying bool constants to registers. 
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
 or narrowing only.

llvm-svn: 13413
 2004-05-07 21:39:30 +00:00
Brian Gaeke 6f6e4b9f59 I don't think we have to have 4 extra allocated (but unused) bytes on the stack. 
llvm-svn: 12905
 2004-04-13 18:28:37 +00:00
Brian Gaeke 969795b4ea I started working on casts, but I don't have anything compilable yet. 
llvm-svn: 12903
 2004-04-13 18:27:46 +00:00
Brian Gaeke 85521d70dd Don't print [%reg + 0], just print [%reg] 
llvm-svn: 12759
 2004-04-07 17:33:56 +00:00
Brian Gaeke 6d62df5422 First version of code to handle loads. Stub function for handling stores. 
llvm-svn: 12758
 2004-04-07 17:29:37 +00:00
Brian Gaeke 989c04ab58 Support loading arguments from %I0...%I5 into virtual registers in 
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.

llvm-svn: 12757
 2004-04-07 17:04:09 +00:00
Brian Gaeke 7985e56cf9 It's setting up the call args right now, but on the callee side, it's 
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.

llvm-svn: 12756
 2004-04-07 16:41:22 +00:00
Chris Lattner bd58b3fbe9 This is a start on handling setcc instructions. As the comment notes, we 
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.

llvm-svn: 12745
 2004-04-07 05:04:51 +00:00
Chris Lattner bb22d5a564 andd subcc instructions which is used to create the 'cmp' pseudo instruction 
llvm-svn: 12744
 2004-04-07 05:04:01 +00:00
Chris Lattner f6245bc8e9 Avoid emitting an extra copy on each 32-bit operation 
llvm-svn: 12743
 2004-04-07 04:36:53 +00:00
Brian Gaeke 4aac81435f Make generation of stack-slot loads and copies less ugly. 
llvm-svn: 12742
 2004-04-07 04:29:14 +00:00
Brian Gaeke 3675c30873 Fix bug in printing loads. 
llvm-svn: 12741
 2004-04-07 04:29:03 +00:00
Chris Lattner 42ffd2e32c Add support for shift instructions, wrap some long lines 
llvm-svn: 12740
 2004-04-07 04:27:16 +00:00
Chris Lattner 8406cf3046 Fix encoding of existing shift instructions, add rr shifts 
llvm-svn: 12739
 2004-04-07 04:26:57 +00:00
Chris Lattner fcdf82a19f Add a bunch more instructions 
llvm-svn: 12737
 2004-04-07 04:06:46 +00:00
Chris Lattner fd8212ef54 Merge my changes with brians 
llvm-svn: 12736
 2004-04-07 04:05:49 +00:00
Brian Gaeke 37f92b534f Add in some things I forgot, which Chris helpfully reminded me of... 
llvm-svn: 12735
 2004-04-07 04:05:12 +00:00
Brian Gaeke 322423181b Add support for the "Y" register, used by MUL & DIV. 
llvm-svn: 12734
 2004-04-07 04:01:11 +00:00
Brian Gaeke 5524d54c02 Add UDIV, SDIV, and a few variants of WR. 
llvm-svn: 12733
 2004-04-07 04:01:00 +00:00
Brian Gaeke cfbfb8ac57 Preliminary support for getting 64-bit integer constants into registers. 
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.

llvm-svn: 12732
 2004-04-07 04:00:49 +00:00
Brian Gaeke 589bf05bf4 Prune unnecessary #includes 
llvm-svn: 12731
 2004-04-06 23:25:07 +00:00
Brian Gaeke b3deed9fae Simple delay slot filler pass. 
llvm-svn: 12730
 2004-04-06 23:21:45 +00:00
Brian Gaeke 610c685eb6 Add references to delay slot filler pass. 
Fill in addPassesToJITCompile method.

llvm-svn: 12729
 2004-04-06 23:21:24 +00:00
Brian Gaeke 4bd246aee9 First attempt at handling frame index elimination. 
llvm-svn: 12728
 2004-04-06 22:10:22 +00:00
Brian Gaeke 3915ad7c02 First attempt at special-casing printing of [%reg + offset] for 
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.

llvm-svn: 12727
 2004-04-06 22:10:11 +00:00
Brian Gaeke 5e624b822b Delete reference to "the Mach-O Runtime ABI". 
llvm-svn: 12726
 2004-04-06 22:09:59 +00:00
Brian Gaeke 2e91a3d650 Deal with call return values. 
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.

llvm-svn: 12725
 2004-04-06 22:09:23 +00:00
Brian Gaeke d0bdad38f3 Add support for many of the MRegisterInfo callbacks. 
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.

llvm-svn: 12632
 2004-04-02 20:53:37 +00:00
Brian Gaeke d4869e4107 Add load, store, and NOP instructions. 
Fix up comments.

llvm-svn: 12631
 2004-04-02 20:53:37 +00:00
Brian Gaeke b65254a34d Add support for printing pc-relative displacements of functions (as used in 
the CALL instruction).

llvm-svn: 12630
 2004-04-02 20:53:35 +00:00
Brian Gaeke 2fd46b6e43 Add support for call instructions (0-ary only for now). 
llvm-svn: 12629
 2004-04-02 20:53:33 +00:00
Brian Gaeke d962dd5528 The .type directive on Solaris uses the # character instead of @. 
llvm-svn: 12454
 2004-03-16 22:52:04 +00:00
Brian Gaeke 3fb0e203cd Fix bug in zero-extending of shorts. 
llvm-svn: 12453
 2004-03-16 22:45:42 +00:00
Brian Gaeke ae22ce5370 Add UMULrr and SMULrr instructions. 
llvm-svn: 12452
 2004-03-16 22:37:13 +00:00
Brian Gaeke ae0ca8baa6 Use ! for comment char; it works in both Solaris as and GAS. 
llvm-svn: 12451
 2004-03-16 22:37:12 +00:00
Brian Gaeke 67fcefbfef Make getClass more robust by adding cLong. 
Add handling for Mul instruction.

llvm-svn: 12450
 2004-03-16 22:37:11 +00:00
Brian Gaeke 3a27bd889b Hmm, who left this sitting around in my tree 
llvm-svn: 12255
 2004-03-09 04:49:13 +00:00
Chris Lattner 98502aae76 Avoid allocating special registers a bit more robustly 
llvm-svn: 12207
 2004-03-08 03:48:07 +00:00
Brian Gaeke 4e0669cef0 Support return values of basic integer types. 
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.

llvm-svn: 12186
 2004-03-06 05:32:28 +00:00
Brian Gaeke c65b97d4f6 Sort stanzas into Sparc V8 book page number order. 
Add RET, RETL.  Rename SAVE, RESTORE & JMPL for consistency.

llvm-svn: 12185
 2004-03-06 05:32:13 +00:00