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Author SHA1 Message Date
Michael J. Spencer 93c9b2ea93 Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally." 
This reverts commit r113632

Conflicts:

	cmake/modules/AddLLVM.cmake

llvm-svn: 113819
 2010-09-13 23:59:48 +00:00
Bob Wilson c597fd3b4a Convert some VTBL and VTBX instructions to use pseudo instructions prior to 
register allocation.  Remove the NEONPreAllocPass, which is no longer needed.
Yeah!!

llvm-svn: 113818
 2010-09-13 23:55:10 +00:00
Bob Wilson d5c57a5ed4 Switch all the NEON vld-lane and vst-lane instructions over to the new 
pseudo-instruction approach.  Change ARMExpandPseudoInsts to use a table
to record all the NEON load/store information.

llvm-svn: 113812
 2010-09-13 23:01:35 +00:00
Dale Johannesen 1eea351920 Fix typos. 128-bit PSHUFB takes 128-bit memory op. 
v8i16 is not an MMX type; put it where it belongs.

llvm-svn: 113785
 2010-09-13 21:15:43 +00:00
Jim Grosbach 7aeff13cae trailing whitespace 
llvm-svn: 113768
 2010-09-13 18:25:42 +00:00
John Thompson 1094c80281 Added skeleton for inline asm multiple alternative constraint support. 
llvm-svn: 113766
 2010-09-13 18:15:37 +00:00
Michael J. Spencer ff24bf78ea CMake: Fix MSVS build. Although I don't know why this didn't break other build systems... 
This problem is unrelated to the recent dependency tracking change. It
seems like noone noticed the problem because I don't think anyone compiles
any target other than X86 on windows.

llvm-svn: 113727
 2010-09-12 18:32:57 +00:00
Michael J. Spencer d3dc222d09 CMake: Fix mingw32 build. 
llvm-svn: 113712
 2010-09-12 03:47:31 +00:00
Chris Lattner 1bbb14ab8f add a missed cmov alias, part of rdar://8416805 
llvm-svn: 113693
 2010-09-11 17:08:22 +00:00
Chris Lattner 3340c3e86c add support for all the setCC aliases. Part of rdar://8416805 
llvm-svn: 113692
 2010-09-11 17:06:05 +00:00
Chris Lattner b47c042e09 add support for pushfd/popfd which are aliases for pushfl/popfl. 
This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors

llvm-svn: 113690
 2010-09-11 16:39:16 +00:00
Chris Lattner 30561aba20 implement rdar://8407928 - support for in/out with a missing "a" register. 
llvm-svn: 113689
 2010-09-11 16:32:12 +00:00
Chris Lattner a2a9d16b78 fix the asmparser so that the target is responsible for skipping to 
the end of the line on a parser error, allowing skipping to happen
for syntactic errors but not for semantic errors.  Before we would
miss emitting a diagnostic about the second line, because we skipped
it due to the semantic error on the first line:

  foo %eax
  bar %al

This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors

llvm-svn: 113688
 2010-09-11 16:18:25 +00:00
Bill Wendling 27dddd1fd1 Rename ConvertToSetZeroFlag to something more general. 
llvm-svn: 113670
 2010-09-11 00:13:50 +00:00
Bill Wendling d0a5f4e238 No need to recompute the SrcReg and CmpValue. 
llvm-svn: 113666
 2010-09-10 23:46:12 +00:00
Bill Wendling 041230014c Move some of the decision logic for converting an instruction into one that sets 
the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.

llvm-svn: 113665
 2010-09-10 23:34:19 +00:00
Eric Christopher 72497e5d90 Start sketching out ARM fast-isel calls. 
llvm-svn: 113662
 2010-09-10 23:18:12 +00:00
Eric Christopher cc766a20d3 For consistency. 
llvm-svn: 113659
 2010-09-10 23:10:30 +00:00
Eric Christopher cc1367851b Newline at end of file. 
llvm-svn: 113654
 2010-09-10 22:46:03 +00:00
Eric Christopher 1c06917f15 Split out some of the calling convention bits so that they can be 
used for fast-isel.

llvm-svn: 113652
 2010-09-10 22:42:06 +00:00
Bill Wendling aee679bf35 Modify the comparison optimizations in the peephole optimizer to update the 
iterator when an optimization took place. This allows us to do more insane
things with the code than just remove an instruction or two.

llvm-svn: 113640
 2010-09-10 21:55:43 +00:00
Jim Grosbach 1f77ee5691 Add a missing case to duplicateCPV() for LSDA constants. Add a FIXME. rdar://8302157 
llvm-svn: 113637
 2010-09-10 21:38:22 +00:00
Michael J. Spencer dc38d36ccb CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally. 
llvm-svn: 113632
 2010-09-10 21:14:25 +00:00
Dale Johannesen baa5d045c9 Add X86 MMX type to bitcode and Type. 
(The Ada bindings probably need it too, but all the
obvious places to change say "do not edit this file".)

llvm-svn: 113618
 2010-09-10 20:55:01 +00:00
Bill Wendling 798725b24d Reapply r113585. The msvc machine is mercurial. 
llvm-svn: 113610
 2010-09-10 20:20:28 +00:00
Bill Wendling a9c9aaa839 r113585 was causing clang-i686-xp-msvc9 to fail in mysterious ways that I can't 
understand (the log file was no help).

llvm-svn: 113605
 2010-09-10 19:20:47 +00:00
Bob Wilson ed19768cec Calculate the number of VLDM/VSTM registers by subtracting the number of 
fixed operands from the total number of operands (including the variadic ones).

llvm-svn: 113597
 2010-09-10 18:25:35 +00:00
Bill Wendling 638a098f72 Mark the sse_load_f32 and sse_load_f64 load patterns as having memoperands so 
that the memoperands are properly set after DAG building and general mucking
about.

llvm-svn: 113585
 2010-09-10 10:34:22 +00:00
Bill Wendling ac0ad0f634 Reword since this may not be a bug but intended behavior. 
llvm-svn: 113584
 2010-09-10 10:31:11 +00:00
Bob Wilson 8617234658 Fix merging base-updates for VLDM/VSTM: Before I switched these instructions 
to use AddrMode4, there was a count of the registers stored in one of the
operands.  I changed that to just count the operands but forgot to adjust for
the size of D registers.  This was noticed by Evan as a performance problem
but it is a potential correctness bug as well, since it is possible that this
could merge a base update with a non-matching immediate.

llvm-svn: 113576
 2010-09-10 05:15:04 +00:00
Evan Cheng bf4070756f Teach if-converter to be more careful with predicating instructions that would 
take multiple cycles to decode.
For the current if-converter clients (actually only ARM), the instructions that
are predicated on false are not nops. They would still take machine cycles to
decode. Micro-coded instructions such as LDM / STM can potentially take multiple
cycles to decode. If-converter should take treat them as non-micro-coded
simple instructions.

llvm-svn: 113570
 2010-09-10 01:29:16 +00:00
Eric Christopher 712bd0a604 Fix build error. 
llvm-svn: 113566
 2010-09-10 00:35:09 +00:00
Eric Christopher 860fc9370f Update comments, reorganize some code, rename variables to be 
more clear.  No functional change.

llvm-svn: 113565
 2010-09-10 00:34:35 +00:00
Eric Christopher 22fd29a94a 64-bit fp loads can come straight out of the constant pool, not as 
bad as I'd thought.

llvm-svn: 113561
 2010-09-09 23:50:00 +00:00
Eric Christopher 4bd7047324 SIToFP and FPToSI conversions work only on fp-reg to fp-reg. Move 
some data around and implement a couple of move routines to do this.

llvm-svn: 113546
 2010-09-09 21:44:45 +00:00
Eric Christopher 2cbe0fd956 New "move to fp reg" routine. Use it. 
llvm-svn: 113537
 2010-09-09 20:49:25 +00:00
Eric Christopher 82b05d7206 "Strike that, reverse it." -- Mr. Wonka. 
Truncate when truncating, extend when extending.

llvm-svn: 113536
 2010-09-09 20:36:19 +00:00
Eric Christopher 5903c0be2a Add FPTrunc, fix some bugs where I forgot to update the value map. 
llvm-svn: 113533
 2010-09-09 20:26:31 +00:00
Eric Christopher 6e3eeba4d9 Basic FP->Int, Int->FP conversions. 
llvm-svn: 113523
 2010-09-09 18:54:59 +00:00
Bruno Cardoso Lopes e8501a468c Add one more pattern to fallback movddup 
llvm-svn: 113522
 2010-09-09 18:48:34 +00:00
Evan Cheng 367a5df8cf For each instruction itinerary class, specify the number of micro-ops each 
instruction in the class would be decoded to. Or zero if the number of
uOPs must be determined dynamically.

This will be used to determine the cost-effectiveness of predicating a
micro-coded instruction.

llvm-svn: 113513
 2010-09-09 18:18:55 +00:00
Roman Divacky 3b727f55aa Make ELF OS ABI dependent on the OS from target triple. 
llvm-svn: 113508
 2010-09-09 17:57:50 +00:00
Dale Johannesen 0ec303b97b Move remaining MMX instructions from SSE to MMX. 
llvm-svn: 113501
 2010-09-09 17:13:07 +00:00
Kalle Raiskila 01cda2d35a Silence compiler warning. 
llvm-svn: 113478
 2010-09-09 07:30:15 +00:00
Bob Wilson 4adbaf1843 Fix NEON VLD pseudo instruction itineraries that were incorrectly copied from 
the VST pseudos.  The VLD/VST scheduling still needs work (see pr6722), but
at least we shouldn't confuse the loads with the stores.

llvm-svn: 113473
 2010-09-09 05:40:26 +00:00
Eric Christopher 2ff757d422 Nuke whitespace and fix some indenting. 
llvm-svn: 113463
 2010-09-09 01:06:51 +00:00
Dale Johannesen 5f4a6f295c Move most MMX instructions (defined as anything that 
uses MMX, even if it also uses other things) from InstrSSE
into InstrMMX.  No (intended) functional change.

llvm-svn: 113462
 2010-09-09 01:02:39 +00:00
Eric Christopher bd3d121641 Handle 64-bit floating point binops as well. 
llvm-svn: 113461
 2010-09-09 01:02:03 +00:00
Eric Christopher 24dc27f73a Basic 32-bit FP operations. 
llvm-svn: 113459
 2010-09-09 00:53:57 +00:00
Bob Wilson 84971c850a For double-spaced VLD3/VLD4 instructions, copy the explicit super-register use 
operand from the pseudo instruction to the new instruction as an implicit use.
This will preserve any other flags (e.g., kill) on the operand.

llvm-svn: 113456
 2010-09-09 00:38:32 +00:00