Commit Graph

291073 Commits

Author SHA1 Message Date
Craig Topper 74a61b02e0 [X86][Disassembler] Clamp index to 4-bits when decoding GPR registers.
A 5-bit value can occur when EVEX.X is 0 due to it being used to extend modrm.rm to encode XMM16-31. But if modrm.rm instead encodes a GPR, the Intel documentation says EVEX.X should be ignored so just mask it to 4 bits once we know its a GPR.

llvm-svn: 333725
2018-06-01 05:12:44 +00:00
Craig Topper 1a00b0ac27 [X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX.X=0 and a GPR encoded in modrm.rm.
EVEX.X is used to extended modrm.rm when the instruction encodes a XMM/YMM/ZMM register. But we aren't properly ignoring it when it encodes a GPR and we end up printing whatever registers exist in X86 register enum after the GPRs.

llvm-svn: 333724
2018-06-01 05:12:43 +00:00
JF Bastien 766128e697 Filesystem tests: un-confuse write time
Summary:
The filesystem test was confused about access versus write / modification time. The spec says:

  file_time_type last_write_time(const path& p, error_code& ec) noexcept;
  Returns: The time of last data modification of p, determined as if by the value of the POSIX stat structure member st_mtime obtained as if by POSIX stat(). The signature with argument ec returns file_time_type::min() if an error occurs.

The test was looking at st_atime, not st_mtime, when comparing the result from last_write_time. That was probably due to using a pair instead of naming things nicely or using types. I opted to rename things so it's clearer.

This used to cause test bot failures.

<rdar://problem/40648859>

Reviewers: EricWF, mclow.lists, aemerson

Subscribers: christof, cfe-commits

Differential Revision: https://reviews.llvm.org/D47557

llvm-svn: 333723
2018-06-01 04:59:48 +00:00
Craig Topper 5b1dd01e57 [X86][Disassembler] Make sure EVEX.X is not used to extend base registers of memory operations.
This was an accidental side effect of EVEX.X being used to encode XMM16-XMM31 using modrm.rm with modrm.mod==0x3.

I think there are still more bugs related to this.

llvm-svn: 333722
2018-06-01 04:29:34 +00:00
Craig Topper c6b2c2bb70 [X86][Disassembler] Use a local variable instead of using a field in the instruction object. NFC
llvm-svn: 333721
2018-06-01 04:29:30 +00:00
Tom Stellard e43778895c AMDGPU/R600: Move intrinsics to IntrinsicsAMDGPU.td
Reviewers: arsenm, nhaehnle, jvesely

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47487

llvm-svn: 333720
2018-06-01 02:19:46 +00:00
Artem Dergachev f83d547989 [analyzer] NFC: Track all constructed objects in a single state trait.
ExprEngine already maintains three internal program state traits to track
path-sensitive information related to object construction: pointer returned by
operator new, and pointer to temporary object for two different purposes - for
destruction and for lifetime extension. We'll need to add 2-3 more in a few
follow-up commits.

Merge these traits into one because they all essentially serve one purpose and
work similarly.

Differential Revision: https://reviews.llvm.org/D47303

llvm-svn: 333719
2018-06-01 01:59:48 +00:00
Bruno Cardoso Lopes 9f6020bcc5 [Modules] Warning for module declarations lacking 'framework' qualifier
When a module declaration for a framework lacks the 'framework'
qualifier, the listed headers aren't found (because there's no
trigger for the special framework style path lookup) and the module
is silently not built. This leads to frameworks not being modularized
by accident, which is pretty bad.

Add a warning and suggest the user to add the 'framework' qualifier
when we can prove that it's the case.

rdar://problem/39193062

llvm-svn: 333718
2018-06-01 01:26:18 +00:00
Craig Topper dc5ba1e495 [X86] Make sure the check for VEX.vvvv being all ones on instructions that don't use it doesn't ignore a bit in 32-bit mode.
llvm-svn: 333717
2018-06-01 01:23:52 +00:00
Heejin Ahn 1eb074d76e [WebAssembly] Hide new Wasm EH behind its feature flag
Summary:
clang's current wasm EH implementation is a non-MVP feature in progress.
We had a `-mexception-handling` wasm feature but were not using it. This
patch hides the non-MVP wasm EH behind a flag, so it does not affect
other code for now.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Differential Revision: https://reviews.llvm.org/D47614

llvm-svn: 333716
2018-06-01 01:01:37 +00:00
Vedant Kumar d781d97ed4 [Coverage] End deferred regions before labels, fixes PR35867
A deferred region should end before the start of a label, and should not
extend to the start of the label sub-statement.

Fixes llvm.org/PR35867.

llvm-svn: 333715
2018-06-01 00:37:13 +00:00
Craig Topper 0179c6d0e5 [X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.
llvm-svn: 333714
2018-06-01 00:10:36 +00:00
Craig Topper b9c2e8cc01 [X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in 32-bit mode.
We aren't properly suppressing the reading of VEX.R' and VEX.V' in 32-bit mode.

llvm-svn: 333713
2018-06-01 00:10:32 +00:00
Dan Gohman 9f8ee03772 [WebAssembly] Update to the new names for the memory builtin functions.
The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the clang builtin
functions to follow those names, keeping both sets of old names in place
for compatibility.

llvm-svn: 333712
2018-06-01 00:05:51 +00:00
Heejin Ahn d69acf3b4c Change ambiguous uses of term 'funclet' to 'EH scopes'. NFC.
Summary:
`getEHScopeMembership()` function is used not only for funclet-based
EHs; they apply to all EH schemes that use the scoped IR
(catchpad/cleanuppad/...). D47005 (rL333045) changed some of the uses of
the term 'funclet' to 'EH scopes' in case they apply to all scoped EH,
and this fixes more of them. For `FuncletLayout` pass, I left it as is
because the pass is only used for funclet-based EH.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47611

llvm-svn: 333711
2018-06-01 00:03:21 +00:00
Michael Kruse d51fbfca46 [ZoneAlgo] Make ZoneAlgorithm::isNormalized out-of-quota safe.
The aosp-O3-polly-before-vectorizer-unprofitable buildbot currently
fails in ZoneAlgorithm::isNormalized, presumably because an
out-of-quota happens in that function.

Modify ZoneAlgorithm::isNormalized to return an isl::boolean such
it can report an error.

In the failing case, it was called in an assertion in ForwardOpTree.
Allow to pass the assertion in an out-of-quota event, a condition that
is later checked before forwarding an operand tree.

llvm-svn: 333709
2018-05-31 22:44:23 +00:00
Dan Gohman 91ab25bbe3 [WebAssembly] Update to the new names for the memory intrinsics.
The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the LLVM intrinsics to
follow those names, keeping both sets of old names in place for
compatibility.

llvm-svn: 333708
2018-05-31 22:35:25 +00:00
Sanjay Patel affe450db7 [LoopVectorize, x86] add tests to show missing SVML transforms; NFC
llvm-svn: 333707
2018-05-31 22:31:02 +00:00
Dan Gohman b17de645ea [WebAssembly] Fix the signatures for the __mulo* libcalls.
The __mulo* libcalls have an extra i32* to return the overflow value.

Fixes PR37401.

llvm-svn: 333706
2018-05-31 22:27:24 +00:00
Heejin Ahn 5ef4d5f9c1 [WebAssembly] Support instruction selection for catching exceptions
Summary:
This lowers exception catching-related instructions:
1. Lowers `wasm.catch` intrinsic to `catch` instruction
2. Removes `catchpad` and `cleanuppad` instructions; they are not
necessary after isel phase. (`MachineBasicBlock::isEHFuncletEntry()` or
`MachineBasicBlock::isEHPad()` can be used instead.)
3. Lowers `catchret` and `cleanupret` instructions to pseudo `catchret`
and `cleanupret` instructions in isel, which will be replaced with other
instructions in `WebAssemblyExceptionPrepare` pass.
4. Adds 'WebAssemblyExceptionPrepare` pass, which is for running various
transformation for EH. Currently this pass only replaces `catchret` and
`cleanupret` instructions into appropriate wasm instructions to make
this patch successfully run until the end.

Currently this does not handle lowering of intrinsics related to LSDA
info generation (`wasm.landingpad.index` and `wasm.lsda`), because they
cannot be tested without implementing `EHStreamer`'s wasm-specific
handlers. They are marked as TODO, which is needed to make isel pass.
Also this does not generate `try` and `end_try` markers yet, which will
be handled in later patches.

This patch is based on the first wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44090

llvm-svn: 333705
2018-05-31 22:25:54 +00:00
Dominic Chen cd81614e8b [analyzer] fix bug with 1-bit APSInt types in Z3ConstraintManager
Summary: Clang does not have a corresponding QualType for a 1-bit APSInt, so use the BoolTy and extend the APSInt. Split from D35450. Fixes PR37622.

Reviewers: george.karpenkov, NoQ

Subscribers: mikhail.ramalho, xazax.hun, szepet, rnkovacs, cfe-commits, a.sidorin

Differential Revision: https://reviews.llvm.org/D47603

llvm-svn: 333704
2018-05-31 22:23:07 +00:00
Heejin Ahn c647919933 [WebAssembly] Use Windows EH instructions for Wasm EH
Summary:
Because wasm control flow needs to be structured, using WinEH
instructions to support wasm EH brings several benefits. This patch
makes wasm EH uses Windows EH instructions, with some changes:
1. Because wasm uses a single catch block to catch all C++ exceptions,
   this merges all catch clauses into a single catchpad, within which we
   test the EH selector as in Itanium EH.
2. Generates a call to `__clang_call_terminate` in case a cleanup
   throws. Wasm does not have a runtime to handle this.
3. In case there is no catch-all clause, inserts a call to
   `__cxa_rethrow` at the end of a catchpad in order to unwind to an
   enclosing EH scope.

Reviewers: majnemer, dschuff

Subscribers: jfb, sbc100, jgravelle-google, sunfish, cfe-commits

Differential Revision: https://reviews.llvm.org/D44931

llvm-svn: 333703
2018-05-31 22:18:13 +00:00
Craig Topper 9a6c0bdcbd [LoopIdiomRecognize] Only convert loops to ctlz if we can prove that the input is non-negative.
Summary:
Loop idiom recognize tries to convert loops like

```
int foo(int x) {
  int cnt = 0;
  while (x) {
    x >>= 1;
    ++cnt;
  }
  return cnt;
}
```

into calls to ctlz, but if x is initially negative this loop should be infinite.

It happens that the cases that motivated this change have an absolute value of x before the loop. So this patch restricts the transform to cases where we know x is positive. Note: We are relying on the absolute value of INT_MIN to be undefined so we can assume that the result is always positive.

Fixes PR37479

Reviewers: spatel, hfinkel, efriedma, javed.absar

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D47348

llvm-svn: 333702
2018-05-31 22:16:55 +00:00
Vedant Kumar 38671237a6 [lit] Remove the *.test suffix from two test inputs
This prevents the test inputs from being marked as unsupported tests,
due to their lack of RUN lines.

llvm-svn: 333701
2018-05-31 22:09:01 +00:00
Vedant Kumar cc5a6163a4 [IRMemoryMap] Test interleaved Mallocs and Frees
This adds a new command to the ir-memory-map tester:

  free <allocation-index>

The argument to free is an index which identifies which live allocation
to free. Index 0 identifies the first live allocation in the address
space, index 1 identifies the second, etc. where the allocations are
sorted in increasing order.

For illustrative purposes, assume malloc returns monotonically
increasing addresses. Here are some examples of how free would work:

Example 1
---------

malloc 16 1
malloc 32 1
free 1      //< Free the 32-byte allocation.
free 0      //< Next, free the 16-byte allocation.

Example 2
---------

malloc 16 1
malloc 32 1
free 0      //< Free the 16-byte allocation.
free 0      //< Next, free the 32-byte allocation.

llvm-svn: 333700
2018-05-31 22:09:01 +00:00
Vedant Kumar 7e4c84a78c [lldb-test] Make logging available to all subcommands
llvm-svn: 333699
2018-05-31 22:09:00 +00:00
Vedant Kumar f616b9db7d [IRMemoryMap] Test host-side allocations
r333583 introduced testing for IRMemoryMap's process-side allocations
(eAllocationPolicyProcessOnly). This adds support for the host-side
variety (eAllocationPolicyHostOnly).

llvm-svn: 333698
2018-05-31 22:09:00 +00:00
Vedant Kumar 5b71e75ed3 [IRMemoryMap] Fix the alignment adjustment in Malloc
This prevents Malloc from allocating the same chunk of memory twice, as
a byproduct of an alignment adjustment which gave the client access to
unallocated memory.

Prior to this patch, the newly-added test failed with:

$ lldb-test ir-memory-map ... ir-memory-map-overlap1.test
...
Command: malloc(size=64, alignment=32)
Malloc: address = 0x1000cd080
Command: malloc(size=64, alignment=8)
Malloc: address = 0x1000cd0b0
Malloc error: overlapping allocation detected, previous allocation at [0x1000cd080, 0x1000cd0c0)

Differential Revision: https://reviews.llvm.org/D47551

llvm-svn: 333697
2018-05-31 22:08:59 +00:00
Heejin Ahn 99d60e0dab [WebAssembly] Add Wasm exception handling prepare pass
Summary:
This adds a pass that transforms a program to be prepared for Wasm
exception handling. This is using Windows EH instructions and based on
the previous Wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, mgorny, sbc100, jgravelle-google, JDevlieghere, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D43746

llvm-svn: 333696
2018-05-31 22:02:34 +00:00
Sanjay Patel 2ae1ab30e3 [LoopVectorize, x86] regenerate checks; NFC
I removed the 'fast' flag from the calls because that's not required.

llvm-svn: 333695
2018-05-31 21:30:36 +00:00
Rui Ueyama a3e5d4982e Print out "Alias for -foo" instead of repeating the same help message for -foo.
Since aliases don't actually need name, I removed it from Options.td
to keep the definitions concise.

Before:

  -(                      Ignored for compatibility with GNU unless you pass --warn-backrefs
  -)                      Ignored for compatibility with GNU unless you pass --warn-backrefs
  --allow-multiple-definition Allow multiple definitions
  --apply-dynamic-relocs  Apply dynamic relocations to place
  --as-needed             Only set DT_NEEDED for shared libraries if used
  --auxiliary=<value>     Set DT_AUXILIARY field to the specified name
  --Bdynamic              Link against shared libraries
  --Bshareable            Build a shared object
  ...

After:

  -(                      Alias for --start-group
  -)                      Alias for --end-group
  --allow-multiple-definition Allow multiple definitions
  --apply-dynamic-relocs  Apply dynamic relocations to place
  --as-needed             Only set DT_NEEDED for shared libraries if used
  --auxiliary=<value>     Set DT_AUXILIARY field to the specified name
  --Bdynamic              Link against shared libraries (default)
  --Bshareable            Alias for --shared
  ...

Differential Revision: https://reviews.llvm.org/D47588

llvm-svn: 333694
2018-05-31 20:46:22 +00:00
Alexander Shaposhnikov ecc84834b7 [llvm-strip] Add -o option to llvm-strip
This diff implements the option -o 
for specifying a file to write the output to.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D47505

llvm-svn: 333693
2018-05-31 20:42:13 +00:00
Andrea Di Biagio 4037011404 [llvm-mca] Fixed a problem caused by an invalid use of a processor resource mask in the Scheduler.
The lambda functions used by method ResourceManager::mustIssueImmediately() was
incorrectly truncating masks of buffered processor resources to 32-bit quantities.
The invalid mask values were then used to access a map of processor
resource descriptors.

Fixes PR37643.

llvm-svn: 333692
2018-05-31 20:27:46 +00:00
Stanislav Mekhanoshin 739174c4be [AMDGPU] Construct memory clauses before RA
Memory clauses are formed into bundles in presence of xnack.
Their source operands are marked as early-clobber.

This allows to allocate distinct source and destination registers
within a clause and prevent breaking the clause with s_nop in the
hazard recognizer.

Clauses are undone before post-RA scheduler to allow some rescheduling,
which will not break the clause since artificial edges are created in
the dag to keep memory operations together. Yet this allows a better
ILP in some cases.

Differential Revision: https://reviews.llvm.org/D47511

llvm-svn: 333691
2018-05-31 20:13:51 +00:00
Jason Molenda a6922415b1 Set m_struct_valid to initial value in ctor.
Patch from Tom Tromey <ttromey@mozilla.com>.

Differential Revision: https://reviews.llvm.org/D47481

llvm-svn: 333690
2018-05-31 20:01:15 +00:00
Sanjay Patel 26368cd5d9 [InstCombine] narrow select to match condition operands' size
This is the planned enhancement to D47163 / rL333611.
We want to match cmp/select sizes because that will be recognized
as min/max more easily and lead to better codegen (especially for
vector types).

As mentioned in D47163, this improves some of the tests that would
also be folded by D46380, so we may want to adjust that patch to
match the new patterns where the extend op occurs after the select.

llvm-svn: 333689
2018-05-31 19:55:27 +00:00
Tobias Grosser 4dcd83fcd2 Update isl C++ bindings
This update adds new list types and adds functions which convert isl
data types to lists of their contained elements:

  isl::set::get_basic_set_list
  isl::union_set::get_set_list

  isl::map::get_basic_map_list
  isl::union_map::get_map_list

llvm-svn: 333688
2018-05-31 19:48:23 +00:00
Stanislav Mekhanoshin 7137f609f4 [AMDGPU] Fixed incorrect -mcpu=gfx800 in xnor.ll test. NFC.
llvm-svn: 333687
2018-05-31 19:39:54 +00:00
Taiju Tsuiki 1cb31049af Fix rpath-link handling
Summary:
After r333596, rpath-link no longer consumes the following argument, and
the path argument left by it confuses LLD.

Reviewers: espindola, ruiu

Reviewed By: ruiu

Subscribers: ruiu, emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D47591

llvm-svn: 333686
2018-05-31 19:37:04 +00:00
Aditya Nandakumar 2980b01995 [GISel]: Pattern matchers for GFSUB, GFNEG
https://reviews.llvm.org/D47547

Add matching templates for G_FSUB, and G_FNEG.

Reviewed by: aemerson.

llvm-svn: 333685
2018-05-31 19:30:01 +00:00
Lang Hames 6fe6616c47 [ORC] Add a getRequestedSymbols method to MaterializationResponsibility.
This method returns the set of symbols in the target VSO that have queries
waiting on them. This can be used to make decisions about which symbols to
delegate to another MaterializationUnit (typically this will involve
delegating all symbols that have *not* been requested to another
MaterializationUnit so that materialization of those symbols can be
deferred until they are requested).

llvm-svn: 333684
2018-05-31 19:29:03 +00:00
Lang Hames d3a76f5bbc [ORC] Rename IRMaterializationUnit's Discardable member to SymbolToDefinition,
and make it protected rather than private.

The new name reflects the actual information in the map, and this information
can be useful to derived classes (for example, to quickly look up the IR
definition of a requested symbol).

llvm-svn: 333683
2018-05-31 19:29:01 +00:00
Sanjay Patel dfbe6b49f0 [InstCombine] regenerate checks; NFC
llvm-svn: 333682
2018-05-31 19:25:02 +00:00
Sean Fertile 1a8343fce3 [PPC64] Support R_PPC64_GOT_TLSLD16 relocations.
Add support for the R_PPC64_GOT_TLSLD16 relocations used to build the address of
the tls_index struct used in local-dynamic tls.

Differential Revision: https://reviews.llvm.org/D47538

llvm-svn: 333681
2018-05-31 18:44:12 +00:00
Reid Kleckner 26fc531dbc Fix null MSInheritanceAttr deref in CXXRecordDecl::getMSInheritanceModel()
Ensure latest MPT decl has a MSInheritanceAttr when instantiating
templates, to avoid null MSInheritanceAttr deref in
CXXRecordDecl::getMSInheritanceModel().

See PR#37399 for repo / details.

Patch by Andrew Rogers!

Differential Revision: https://reviews.llvm.org/D46664

llvm-svn: 333680
2018-05-31 18:42:29 +00:00
Artem Dergachev 38f7bb7798 [analyzer] Annotate ProgramState update methods with LLVM_NODISCARD.
Because our program states are immutable, methods like "add<>", "set<>", "bind"
create a copy of the program state instead of mutating the existing state.
If the updated state is discarded, it clearly indicates a bug.
Such bugs are introduced frequently, hence the warn_unused_result annotation.

Differential Revision: https://reviews.llvm.org/D47499

llvm-svn: 333679
2018-05-31 18:30:41 +00:00
Reid Kleckner d44a6eab40 Fix GCC 4.8.5 build by avoiding braced default member initializer
Use internal_memset instead.  Should revive all Linux Chromium ToT bots.

llvm-svn: 333678
2018-05-31 18:26:36 +00:00
Peter Collingbourne 3aa30e8062 IRGen: Write .dwo files when -split-dwarf-file is used together with -fthinlto-index.
Differential Revision: https://reviews.llvm.org/D47597

llvm-svn: 333677
2018-05-31 18:25:59 +00:00
Sriraman Tallam d10c4e07f5 Relax GOTPCREL relocations for tail jmp instructions.
Differential Revision: https://reviews.llvm.org/D47563

llvm-svn: 333676
2018-05-31 18:12:33 +00:00
Craig Topper c9a4c6208b [JumpThreading] Fix some strange formatting of code inside LLVM_DEBUG. NFC
I don't know if clang-format got confused here or what.

llvm-svn: 333675
2018-05-31 18:08:11 +00:00