Commit Graph

136850 Commits

Author SHA1 Message Date
Zachary Turner 8321ba5437 Write the TPI stream from a PDB to Yaml.
Reviewed By: ruiu, rnk
Differential Revision: https://reviews.llvm.org/D23226

llvm-svn: 278869
2016-08-16 23:28:54 +00:00
Justin Bogner a36f4a25b3 Introduce LLVM_FALLTHROUGH, which expands to the C++17 attribute.
This allows you to annotate switch case fallthrough in a better way
than a "// FALLTHROUGH" comment. Eventually it would be nice to turn
on -Wimplicit-fallthrough, if we can get the code base clean.

llvm-svn: 278868
2016-08-16 23:24:13 +00:00
Sanjay Patel 7ad324b396 [InstCombine] add tests for fold with no coverage and missing vector fold
llvm-svn: 278867
2016-08-16 23:18:42 +00:00
Kyle Butt 07d61425e3 Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough.
If AnalyzeBranch can't analyze a block and it is possible to
fallthrough, then duplicating the block doesn't make sense, as only one
block can be the layout predecessor for the un-analyzable fallthrough.

Submitted wit a test case, but NOTE: the test case doesn't currently
fail. However, the test case fails with D20505 and would have saved me
some time debugging.

llvm-svn: 278866
2016-08-16 22:56:14 +00:00
Sanjay Patel 60ea1b43d6 [InstCombine] clean up foldICmpAddConstant(); NFCI
1. Fix variable names
2. Add local variables to reduce code
3. Fix code comments
4. Add early exit to reduce indentation
5. Remove 'else' after if -> return
6. Hoist common predicate

llvm-svn: 278864
2016-08-16 22:34:42 +00:00
Konstantin Zhuravlyov e0b87181cf [AMDGPU] Remove duplicate initialization of SIDebuggerInsertNops pass
Differential Revision: https://reviews.llvm.org/D23556

llvm-svn: 278863
2016-08-16 22:30:11 +00:00
David Majnemer 744a8753db Preserve the assumption cache more often
We were clearing it out in LoopUnswitch and InlineFunction instead of
attempting to preserve it.

llvm-svn: 278860
2016-08-16 22:07:32 +00:00
Sanjay Patel e47df1ac62 [InstCombine] use m_APInt to allow icmp (sub X, Y), C folds for splat constant vectors
llvm-svn: 278859
2016-08-16 21:53:19 +00:00
Duncan P. N. Exon Smith 41cf73ce16 CodeGen: Don't dereference end() in MachineBasicBlock::CorrectExtraCFGEdges
The current MachineBasicBlock might be the last block, so FallThru may
be past the end().  Use getNextNode(), which will convert to nullptr,
rather than &*++, which is invalid if we reach the end().

llvm-svn: 278858
2016-08-16 21:46:03 +00:00
Sanjay Patel 904cd39b05 [x86] Allow merging multiple instances of an immediate within a basic block for code size savings, for 64-bit constants.
This patch handles 64-bit constants which can be encoded as 32-bit immediates.

It extends the functionality added by https://reviews.llvm.org/D11363 for 32-bit constants to 64-bit constants.

Patch by Sunita Marathe!

Differential Revision: https://reviews.llvm.org/D23391

llvm-svn: 278857
2016-08-16 21:35:16 +00:00
Kostya Serebryany 3044390af1 [libFuzzer] minor speed improvement
llvm-svn: 278856
2016-08-16 21:28:05 +00:00
Sanjay Patel b9aa67bfcf [InstCombine] fix variable names to match formula comments; NFC
llvm-svn: 278855
2016-08-16 21:26:10 +00:00
David Majnemer 110522bc0f [LoopUnroll] Don't clear out the AssumptionCache on each loop
Clearing out the AssumptionCache can cause us to rescan the entire
function for assumes.  If there are many loops, then we are scanning
over the entire function many times.

Instead of clearing out the AssumptionCache, register all cloned
assumes.

llvm-svn: 278854
2016-08-16 21:09:46 +00:00
Reid Kleckner b99b709068 Revert "Enhance SCEV to compute the trip count for some loops with unknown stride."
This reverts commit r278731. It caused http://crbug.com/638314

llvm-svn: 278853
2016-08-16 21:02:04 +00:00
Matt Arsenault b8037a1bd3 TailDuplicator: Use range loops
llvm-svn: 278847
2016-08-16 20:38:05 +00:00
Evandro Menezes 5a5b8dcd32 [AArch64] Adjust the scheduling model for Exynos M1.
Refine the model for the FP division unit.

llvm-svn: 278846
2016-08-16 20:35:01 +00:00
Evandro Menezes d03aff2e11 [AArch64] Adjust the scheduling model for Exynos M1.
Refine the model for the integer division unit.

llvm-svn: 278845
2016-08-16 20:34:58 +00:00
Matt Arsenault 7f19298bfa AMDGPU: Remove excessive padding from ImmOp and RegOp.
The structs ImmOp and RegOp are in AArch64AsmParser.cpp (inside
anonymous namespace).
This diff changes the order of fields and removes the excessive padding
(8 bytes).

Patch by Alexander Shaposhnikov

llvm-svn: 278844
2016-08-16 20:28:06 +00:00
Reid Kleckner 43231bc19b Fix an instance of -Wmicrosoft-enum-value by making the enum unsigned
llvm-svn: 278843
2016-08-16 20:22:49 +00:00
Haicheng Wu 9780df5385 [BranchFolding] Change a test case of r278575.
Rename the operands to make the test less brittle.

llvm-svn: 278841
2016-08-16 20:06:25 +00:00
Sjoerd Meijer 15c81b05ea [MBP] do not reorder and move up loop latch block
Do not reorder and move up a loop latch block before a loop header
when optimising for size because this will generate an extra 
unconditional branch.

Differential Revision: https://reviews.llvm.org/D22521

llvm-svn: 278840
2016-08-16 19:50:33 +00:00
Kostya Serebryany d46a59fac4 [libFuzzer] new experimental feature: value profiling. Profiles values that affect control flow and treats new values as new coverage.
llvm-svn: 278839
2016-08-16 19:33:51 +00:00
Benjamin Kramer 0464ae83e7 Remove excessive padding from LineNoCacheTy
The struct LineNoCacheTy is in SourceMgr.cpp inside anonymous namespace.
This diff changes the order of fields and removes the excessive padding
(8 bytes).

Patch by Alexander Shaposhnikov!

Differential revision: https://reviews.llvm.org/D23546

llvm-svn: 278838
2016-08-16 19:20:10 +00:00
David Majnemer 00940fb854 Make MDNode::intersect faster than O(n * m)
It is pretty easy to get it down to O(nlogn + mlogm).  This
implementation has the added benefit of automatically deduplicating
entries between the two sets.

llvm-svn: 278837
2016-08-16 18:48:37 +00:00
David Majnemer fa0f1e660b Don't passively concatenate MDNodes
I have audited all the callers of concatenate and none require duplicate
entries to service concatenation.
These duplicates serve no purpose but to needlessly embiggen the IR.

N.B. Layering getMostGenericAliasScope on top of concatenate makes it
O(nlogn + mlogm) instead of O(n*m).

llvm-svn: 278836
2016-08-16 18:48:34 +00:00
Krzysztof Parzyszek 1d01a79304 [Hexagon] Standardize next batch of pseudo instructions
ALIGNA          PS_aligna
ALLOCA          PS_alloca
TFR_FI          PS_fi
TFR_FIA         PS_fia
TFR_PdFalse     PS_false
TFR_PdTrue      PS_true
VMULW           PS_vmulw
VMULW_ACC       PS_vmulw_acc

llvm-svn: 278832
2016-08-16 18:08:40 +00:00
Gor Nishanov 74309fa014 [Coroutines] Part 7: Split coroutine into subfunctions
Summary:
This patch adds simple coroutine splitting logic to CoroSplit pass.

Documentation and overview is here: http://llvm.org/docs/Coroutines.html.

Upstreaming sequence (rough plan)
1.Add documentation. (https://reviews.llvm.org/D22603)
2.Add coroutine intrinsics. (https://reviews.llvm.org/D22659)
...
7. Split coroutine into subfunctions <= we are here
8. Coroutine Frame Building algorithm
9. Handle coroutine with unwinds
10+. The rest of the logic

Reviewers: majnemer

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23461

llvm-svn: 278830
2016-08-16 18:04:14 +00:00
Sanjay Patel a3f4f0828b [InstCombine] add helper functions for foldICmpWithConstant; NFCI
Besides breaking up a 700 line function to improve readability,
this sinks the 'FIXME: ConstantInt' check into each helper. So 
now we can independently break that restriction within any of the
helper functions.

As much as possible, the code was only {cut/paste/clang-format}'ed 
to minimize risk (no functional changes intended), so several more
readability improvements are still possible. 

llvm-svn: 278828
2016-08-16 17:54:36 +00:00
Kostya Serebryany c98ef718ea [libFuzzer] refactoring around PCMap, NFC
llvm-svn: 278825
2016-08-16 17:37:13 +00:00
Simon Dardis 4893aff94e [mips] Enforce compact branch restrictions
Check both operands for use of the $zero register which cannot be used with
a compact branch instruction.

Reviewers: dsanders, vkalintris

Differential Review: https://reviews.llvm.org/D23547

llvm-svn: 278824
2016-08-16 17:16:11 +00:00
Krzysztof Parzyszek eabc0d0fd5 [Hexagon] Clean up some miscellaneous V60 intrinsics a bit
llvm-svn: 278823
2016-08-16 17:14:44 +00:00
Wolfgang Pieb 8df58f48dd When the inline spiller rematerializes an instruction, take the debug location from the instruction
that immediately follows the rematerialization point.

Patch by Andrea DiBiagio.

Differential Revision: http://reviews.llvm.org/D23539

llvm-svn: 278822
2016-08-16 17:12:50 +00:00
Wei Mi db68c9adbd Remove a stale comment from the test, NFC.
llvm-svn: 278821
2016-08-16 16:57:15 +00:00
Vitaly Buka 1ce73ef11c [Asan] Unpoison red zones even if use-after-scope was disabled with runtime flag
Summary: PR27453

Reviewers: eugenis

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23481

llvm-svn: 278818
2016-08-16 16:24:10 +00:00
Sanjay Patel 1e5b2d1611 [InstCombine] use m_APInt in foldICmpWithConstant; NFCI
There's some formatting and pointer deref ugliness here that I intend to fix in
subsequent patches. The overall goal is to refactor the obnoxiously long switch
and incrementally remove the restriction to scalar types (allow folds for vector
splats). This patch introduces the use of m_APInt which means the RHSV reference
is now a pointer (and may have matched a vector splat), but the check of 'RHS' 
remains, so vector folds are disallowed and no functional change is intended.

llvm-svn: 278816
2016-08-16 16:08:11 +00:00
Krzysztof Parzyszek 17aa4136a2 [Hexagon] Standardize vector predicate load/store pseudo instructions
- Remove unused instructions: LDriq_pred_vec_V6, STriq_pred_vec_V6, and
  the 128B counterparts.
- Rename:
    LDriq_pred_V6         PS_vloadrq_ai
    LDriq_pred_V6_128B    PS_vloadrq_ai_128B
    STriq_pred_V6         PS_vstorerq_ai
    STriq_pred_V6_128B    PS_vstorerq_ai_128B

llvm-svn: 278813
2016-08-16 15:43:54 +00:00
Ahmed Bougacha e4c03abddd [AArch64][GlobalISel] Select G_MUL.
llvm-svn: 278810
2016-08-16 14:37:46 +00:00
Ahmed Bougacha 329a1fea32 [GlobalISel] Fix G_MUL comment. NFC.
llvm-svn: 278809
2016-08-16 14:37:43 +00:00
Ahmed Bougacha 59e160a19c [AArch64][GlobalISel] Factor out unsupported binop check. NFC.
We're going to need it for G_MUL, and, if other targets end up using
something similar, we can easily put it in the generic selector.

llvm-svn: 278808
2016-08-16 14:37:40 +00:00
David Callahan 947be0fa66 [ADCE] Modify data structures to support removing control flow
Summary:
This is part of a serious of patches to evolve ADCE.cpp to support
removing of unnecessary control flow.

This patch changes the data structures to hold liveness information to
support the additional information we will eventually need. In
particular we now have a notion of basic blocks being live because
they contain a live operations. This will eventually feed into control
dependence analysis of which branches are live. We cater to getting
from instructions to associated block information and from blocks to
information about their terminators.

This patch also changes the structure of the main loop of the
algorithm so that it alternates propagating liveness between
instructions and usign control dependence information to mark branches
live.

We force all terminators live for now until we add code to handlinge
removing control flow in a later patch.

No changes to effective behavior with this patch

Previous patches:

D23065 [ADCE] Refactor anticipating new functionality (NFC)
D23102 [ADCE] Refactoring for new functionality (NFC)

Reviewers: nadav, majnemer, mehdi_amini

Subscribers: freik, twoh, llvm-commits

Differential Revision: https://reviews.llvm.org/D23225

llvm-svn: 278807
2016-08-16 14:31:51 +00:00
Brendon Cahoon 65b6ebccad [Pipeliner] Fix an asssert due to invalid Phi in the epilog
The pipeliner was generating an invalid Phi name for an operand
in the epilog block, which caused an assert in the live variable
analysis pass. The fix is to the code that generates new Phis
in the epilog block. In this case, there is an existing Phi that
needs to be reused rather than creating a new Phi instruction.

Differential Revision: https://reviews.llvm.org/D23513

llvm-svn: 278805
2016-08-16 14:29:24 +00:00
Ahmed Bougacha 2ac5bf94bc [AArch64][GlobalISel] Select (variable) shifts.
For now, no support for immediates.

llvm-svn: 278804
2016-08-16 14:02:47 +00:00
Ahmed Bougacha 7e508a8fcd [AArch64][GlobalISel] Robustize select tests. NFC.
Using the same register means nothing was checking for operand order.

llvm-svn: 278803
2016-08-16 14:02:44 +00:00
Ahmed Bougacha 0306b5ef07 [AArch64][GlobalISel] Select p0 G_FRAME_INDEX.
And mark it as legal.

llvm-svn: 278802
2016-08-16 14:02:42 +00:00
Ahmed Bougacha 66d9dc2f7a [GlobalISel] Mention pointers in LowLevelType.h. NFC.
llvm-svn: 278801
2016-08-16 14:02:36 +00:00
Pierre Gousseau 051db7d838 [x86] Refactor a PowerPC specific ctlz/srl transformation (NFC).
Following the discussion on D22038, this refactors a PowerPC specific setcc -> srl(ctlz) transformation so it can be used by other targets.

Differential Revision: https://reviews.llvm.org/D23445

llvm-svn: 278799
2016-08-16 13:53:53 +00:00
Simon Pilgrim 25d2506029 [X86][AVX] Fixed typo in zero element insertion
llvm-svn: 278798
2016-08-16 13:33:33 +00:00
Ron Lieberman a481c7db93 [Hexagon] Improve test to check for @PCREL, only run llc, not opt -> llc.
llvm-svn: 278796
2016-08-16 13:10:09 +00:00
Sagar Thakur e311740bde [MemorySanitizer] [MIPS] Changed memory mapping to support pie executable.
Reviewed by eugenis
Differential: D22994

llvm-svn: 278795
2016-08-16 12:55:38 +00:00
Simon Pilgrim cc316f013a [X86][SSE] Add support for combining v2f64 target shuffles to VZEXT_MOVL byte rotations
The combine was only matching v2i64 as it assumed lowering to MOVQ - but we have v2f64 patterns that match in a similar fashion

llvm-svn: 278794
2016-08-16 12:52:06 +00:00
Simon Pilgrim d2d3202532 [X86][AVX512BW] Updated tests to demonstrate AVX512BW's inability to vectorize v64i8 shifts
llvm-svn: 278790
2016-08-16 11:05:47 +00:00
Prakhar Bahuguna a27c4a0e66 Correct the upper bound for a CBZ/CBNZ branch target.
Summary:
Fix for the upper bound check that was causing a build failure.

Reviewers: olista01, rengolin, t.p.northover

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23501

llvm-svn: 278789
2016-08-16 10:41:56 +00:00
Prakhar Bahuguna 15ed7ec5aa [Thumb] Validate branch target for CBZ/CBNZ instructions.
Summary:
The assembler currently does not check the branch target for CBZ/CBNZ
instructions, which only permit branching forwards with a positive offset. This
adds validation for the branch target to ensure negative PC-relative offsets are
not encoded into the instruction, whether specified as a literal or as an
assembler symbol.

Reviewers: rengolin, t.p.northover

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D23312

llvm-svn: 278788
2016-08-16 10:41:52 +00:00
Simon Pilgrim f16cd361d4 [X86][SSE] Add support for combining target shuffles to PALIGNR byte rotations
llvm-svn: 278787
2016-08-16 10:03:23 +00:00
Job Noorman 6cd8c9a9d6 [AVR] Fix compile errors
Differential Revision: https://reviews.llvm.org/D23450

llvm-svn: 278784
2016-08-16 08:41:35 +00:00
Guy Blank 722caebdae [X86] Add xgetbv/xsetbv intrinsics to non-windows platforms
Differential Revision: https://reviews.llvm.org/D21958

llvm-svn: 278782
2016-08-16 06:41:00 +00:00
David Majnemer 5c5df6283a [InstSimplify] Fold gep (gep V, C), (xor V, -1) to C-1
llvm-svn: 278779
2016-08-16 06:13:46 +00:00
Mehdi Amini 88c491ddec FunctionImport: missed one occurence of ImportListForModule to rename (NFC)
llvm-svn: 278778
2016-08-16 05:49:12 +00:00
Mehdi Amini 9b490f10e1 FunctionImport: rename ImportsForModule to ImportList for consistency (NFC)
llvm-svn: 278777
2016-08-16 05:47:12 +00:00
Mehdi Amini cdbcbf7477 [LTO] Simplify APIs and constify (NFC)
Summary:
Multiple APIs were taking a StringMap for the ImportLists containing
the entries for for all the modules while operating on a single entry
for the current module. Instead we can pass the desired ModuleImport
directly. Also some of the APIs were not const, I believe just to be
able to use operator[] on the StringMap.

Reviewers: tejohnson

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23537

llvm-svn: 278776
2016-08-16 05:46:05 +00:00
Sanjay Patel 46a68ba618 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278768
2016-08-16 00:48:38 +00:00
Mehdi Amini acc50c4334 [LTO] Rename variables with meaningul names, i.e. more than one character (NFC)
llvm-svn: 278766
2016-08-16 00:44:46 +00:00
Sanjay Patel f1bf21c56b [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278765
2016-08-16 00:27:12 +00:00
Reid Kleckner 229d32abfc [AMDGPU] Give enum an explicit 64-bit type to fix MSVC 2013 failures
Recall that MSVC always gives enums the type 'int', nothing else.  MSVC
2015 does not appear to have this problem anymore.

Clang-cl -Wmicrosoft-enum-value flags this, FWIW, so now I have a true
positive for my warning. :)

llvm-svn: 278762
2016-08-15 23:54:44 +00:00
Teresa Johnson c44a12244f [ThinLTO] Fix temp file dumping, enable via llvm-lto and test it
Summary:
Fixed a bug in ThinLTOCodeGenerator's temp file dumping. The Twine
needs to be passed directly as an argument, or a copy saved into a
std::string.

It doesn't seem there are any consumers of this, so I added a new option
to llvm-lto to enable saving of temp files during ThinLTO, and augmented
a test to use it to check post-import but pre-opt bitcode.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23525

llvm-svn: 278761
2016-08-15 23:24:57 +00:00
Reid Kleckner a7b04a589e Don't use %llc_dwarf with -mtriple, they don't combine
llvm-svn: 278758
2016-08-15 22:54:26 +00:00
Sanjay Patel df77a4dbb0 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278757
2016-08-15 22:43:52 +00:00
Justin Bogner 375f71e3a3 Linker: Avoid some ridiculous indentation by using a temporary. NFC
This was indented really awkwardly, and clang-format didn't seem to
know how to do any better. Avoid the issue with a temporary variable.

llvm-svn: 278756
2016-08-15 22:41:42 +00:00
Wolfgang Pieb 12cd6ddef3 Adding the triple for test comitted with r278703.
llvm-svn: 278755
2016-08-15 22:39:39 +00:00
Mike Aizatsky 5086417e9f [sancov] extracting AArch64 test to a separate file.
llvm-svn: 278754
2016-08-15 22:30:37 +00:00
Tim Shen 75ca2ac329 [ADT] Fix DepthFirstIterator's std::iterator base to have normal typedefs
Summary: This is similiar to r278752, where I found that the std::iterator<...> base can be normal.

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23527

llvm-svn: 278753
2016-08-15 22:07:30 +00:00
Tim Shen e0793db41d [ADT] Change PostOrderIterator to use NodeRef. NFC.
Reviewers: dblaikie

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23522

llvm-svn: 278752
2016-08-15 21:52:54 +00:00
Sanjay Patel 41520e1712 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278751
2016-08-15 21:47:50 +00:00
Eli Friedman 98151d6440 Fix typo in lowering for fp128 ueq.
Regression from r259791.

Differential Revision: https://reviews.llvm.org/D23374

llvm-svn: 278750
2016-08-15 21:46:19 +00:00
Jan Vesely 0486f739a4 AMDGPU/R600: Convert buffer id to VTX_READ input
Use patterns instead of multiple instructions
Add buffer id to asm string

https://reviews.llvm.org/D22650

llvm-svn: 278749
2016-08-15 21:38:30 +00:00
Hemant Kulkarni 533aa25e1c Really fix the issue with 502957cc9cf805dc6093950e8cdcd0db4969d933. Windows %p and FileCheck limitations makes the test linux only
llvm-svn: 278748
2016-08-15 21:38:23 +00:00
Sanjay Patel 638b613101 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278747
2016-08-15 21:37:24 +00:00
Tim Northover 28fdc4272d GlobalISel: support loads and stores of strange types.
Before we mischaracterized structs and i1 types as a scalar with size 0 in
various ways.

llvm-svn: 278744
2016-08-15 21:13:17 +00:00
Teresa Johnson ad71543972 Remove unnecessary flag from new test
Remove -disable-inlining flag that snuck into the test I added for r278739.
It doesn't have an effect in ThinLTO mode (something that should be fixed),
but in any case the checks depend on inlining currently.

llvm-svn: 278743
2016-08-15 21:07:57 +00:00
Sanjay Patel 55d87a88cc update tests to use FileCheck and exact checking
llvm-svn: 278741
2016-08-15 21:02:25 +00:00
Sanjoy Das 78db2963f6 Revert "[ValueTracking] Improve ValueTracking on left shift with nsw flag"
This reverts commit r278172.  It causes PR28946.

llvm-svn: 278740
2016-08-15 21:01:31 +00:00
Teresa Johnson 6107a4195d [ThinLTO] Remove functions resolved to available_externally from comdats
Summary:
thinLTOResolveWeakForLinkerModule needs to drop any preempted weak symbols
that were converted to available_externally from comdats, otherwise we
will get a verification failure (since available_externally is a
declaration for the linker, and no declarations can be in a comdat).

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23015

llvm-svn: 278739
2016-08-15 21:00:04 +00:00
Sanjay Patel 3e9acec2fa [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278737
2016-08-15 20:56:11 +00:00
Hemant Kulkarni 5b140cdd17 Fix a test that failed due to:
https://llvm.org/svn/llvm-project/llvm/trunk@278725 91177308-0d34-0410-b5e6-96231b3b80d8

llvm-svn: 278732
2016-08-15 20:36:16 +00:00
David L Kreitzer 7fe18251a5 Enhance SCEV to compute the trip count for some loops with unknown stride.
Patch by Pankaj Chawla

Differential Revision: https://reviews.llvm.org/D22377

llvm-svn: 278731
2016-08-15 20:21:41 +00:00
Sanjay Patel b37bd6d7b7 [InstCombine] add test for missing vector icmp fold
llvm-svn: 278727
2016-08-15 20:02:40 +00:00
Sanjay Patel 7d98be81cc [InstCombine] add tests for vector icmp folds
llvm-svn: 278726
2016-08-15 19:58:21 +00:00
Hemant Kulkarni 8dfc0b5541 llvm-objdump: Implement source[line numbers] interleaving
Differential Revsion: https://reviews.llvm.org/D22932

llvm-svn: 278725
2016-08-15 19:49:24 +00:00
Kostya Serebryany bdb220c7a0 [libFuzzer] print a verbose message after executing inputs in non-fuzzing mode
llvm-svn: 278724
2016-08-15 19:44:04 +00:00
Kostya Serebryany a0d40a21e7 [libFuzzer] fix the bot
llvm-svn: 278721
2016-08-15 19:36:13 +00:00
Sanjay Patel b860859611 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278717
2016-08-15 19:16:33 +00:00
Sanjay Patel 6866b82a05 update test to use FileCheck and autogenerated checks
llvm-svn: 278714
2016-08-15 18:56:10 +00:00
Reid Kleckner bb8652312a Fix WAsm test after LSR change in r278658
Now the increment is done in a different location

llvm-svn: 278713
2016-08-15 18:51:42 +00:00
Matthias Braun b948c52416 Revert "[Thumb] Validate branch target for CBZ/CBNZ instructions."
This currently breaks the greendragon clang-stage1-configure-RA/ and
brotli. It is probably just uncovering a pre-existing problem. Reverting
temporarily to get the buildbots green again. A reduced testcase will
follow shortly.

This reverts commit r278659.

llvm-svn: 278711
2016-08-15 18:50:13 +00:00
Sanjay Patel 2044a8eba9 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278709
2016-08-15 18:45:10 +00:00
Sanjay Patel aaf34d1bfc [InstCombine] add test for missing vector icmp fold
llvm-svn: 278708
2016-08-15 18:39:54 +00:00
Sanjay Patel 195eb9340a minimize test
llvm-svn: 278707
2016-08-15 18:35:44 +00:00
Sanjay Patel 3f506daf8c remove unnecessary IR comments about uses
llvm-svn: 278705
2016-08-15 18:32:50 +00:00
Sanjay Patel d391b0d69e [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278704
2016-08-15 18:26:56 +00:00
Wolfgang Pieb dfad9b20c9 Local variables whose address is taken and passed on to a call are described
in debug info using their stack slots instead of as an indirection of param reg + 0
offset. This is done by detecting FrameIndexSDNodes in SelectionDAG and generating
FrameIndexDbgValues for them. This ultimately generates DBG_VALUEs with stack
location operands.

Differential Revision: http://reviews.llvm.org/D23283

llvm-svn: 278703
2016-08-15 18:18:26 +00:00
Sanjay Patel cbd62a082c [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278689
2016-08-15 17:55:39 +00:00
Kostya Serebryany dfbe59b03d [libFuzzer] add InsertRepeatedBytes and EraseBytes.
New mutation: InsertRepeatedBytes.
Updated mutation: EraseByte => EraseBytes.

This helps https://github.com/google/sanitizers/issues/710
where libFuzzer was not able to find a known bug.
Now it finds it in minutes.

Hopefully, the change is general enough to help other targets.

llvm-svn: 278687
2016-08-15 17:48:28 +00:00
Sanjay Patel 566b348987 [InstCombine] auto-generate exact checks
Note that several of these tests belong in InstSimplify rather than
InstCombine because they return existing operands or constants.

llvm-svn: 278684
2016-08-15 17:19:07 +00:00
Sanjay Patel a7b9bb3785 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278683
2016-08-15 17:10:35 +00:00
Yaxun Liu c7cbd72921 AMDGPU: Update AMDGPURuntimeMetadata.h for enums of address space qualifiers
llvm-svn: 278682
2016-08-15 16:54:25 +00:00
Matt Arsenault 3661e90e71 AMDGPU: Don't fold subregister extracts into tied operands
llvm-svn: 278676
2016-08-15 16:18:36 +00:00
Reid Kleckner 70a600b8bb Revert "[SimplifyCFG] Rewrite SinkThenElseCodeToEnd"
This reverts commit r278660.

It causes downstream assertion failure in InstCombine on shuffle
instructions. Comes up in __mm_swizzle_epi32.

llvm-svn: 278672
2016-08-15 15:42:31 +00:00
Valery Pykhtin c761675ef4 [AMDGPU] fix failure on printing of non-existing instruction operands.
Differential revision: https://reviews.llvm.org/D23323

llvm-svn: 278665
2016-08-15 10:56:48 +00:00
Sjoerd Meijer 58156715b4 MachineLoop: add methods findLoopControlBlock and findLoopPreheader
This adds two new utility functions findLoopControlBlock and findLoopPreheader
to MachineLoop and MachineLoopInfo. These functions are refactored and taken
from the Hexagon target as they are target independent; thus this is intendend to
be a non-functional change.

Differential Revision: https://reviews.llvm.org/D22959

llvm-svn: 278661
2016-08-15 08:22:42 +00:00
James Molloy 9a3c82f5cf [SimplifyCFG] Rewrite SinkThenElseCodeToEnd
The new version has several advantages:
  1) IMSHO it's more readable and neater
  2) It handles loads and stores properly
  3) It can handle any number of incoming blocks rather than just two. I'll be taking advantage of this in a followup patch.

With this change we can now finally sink load-modify-store idioms such as:

    if (a)
      return *b += 3;
    else
      return *b += 4;

    =>

    %z = load i32, i32* %y
    %.sink = select i1 %a, i32 5, i32 7
    %b = add i32 %z, %.sink
    store i32 %b, i32* %y
    ret i32 %b

When this works for switches it'll be even more powerful.

llvm-svn: 278660
2016-08-15 08:04:56 +00:00
Prakhar Bahuguna a305a435a6 [Thumb] Validate branch target for CBZ/CBNZ instructions.
Summary:
The assembler currently does not check the branch target for CBZ/CBNZ
instructions, which only permit branching forwards with a positive offset. This
adds validation for the branch target to ensure negative PC-relative offsets are
not encoded into the instruction, whether specified as a literal or as an
assembler symbol.

Reviewers: rengolin, t.p.northover

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D23312

llvm-svn: 278659
2016-08-15 07:57:44 +00:00
James Molloy 196ad0823e [LSR] Don't try and create post-inc expressions on non-rotated loops
If a loop is not rotated (for example when optimizing for size), the latch is not the backedge. If we promote an expression to post-inc form, we not only increase register pressure and add a COPY for that IV expression but for all IVs!

Motivating testcase:

    void f(float *a, float *b, float *c, int n) {
      while (n-- > 0)
        *c++ = *a++ + *b++;
    }

It's imperative that the pointer increments be located in the latch block and not the header block; if not, we cannot use post-increment loads and stores and we have to keep both the post-inc and pre-inc values around until the end of the latch which bloats register usage.

llvm-svn: 278658
2016-08-15 07:53:03 +00:00
Craig Topper f774de6d54 [X86] PADDUSB/W instructions should be commutable.
llvm-svn: 278654
2016-08-15 06:31:57 +00:00
Craig Topper 80c8b80919 [X86] Mark some of the X86 SDNodes as commutative.
llvm-svn: 278653
2016-08-15 04:47:30 +00:00
Craig Topper dbc387cfc9 [X86] X86ISD::FANDN is not commutative or associative.
llvm-svn: 278652
2016-08-15 04:47:28 +00:00
David Majnemer 3b47a5a562 [ScopedNoAliasAA] collectMDInDomain should be a free function
collectMDInDomain doesn't use any class members, making it a free
function is not a functional change.

llvm-svn: 278651
2016-08-15 03:56:06 +00:00
David Majnemer 8b8869f8ef [ScopedNoAliasAA] Only collect noalias nodes if we have alias.scope nodes
No functional change is intended.

llvm-svn: 278646
2016-08-15 02:23:50 +00:00
David Majnemer ddc7ab26fc [ScopedNoAliasAA] Replace !ScopeNodes.size() with ScopeNodes.empty()
No functional change is intended.

llvm-svn: 278645
2016-08-15 02:23:48 +00:00
David Majnemer c77a1390de Revert "[ScopedNoAliasAA] Remove an unneccesary set"
This reverts commit r278641.  I'm not sure why but this has upset the
multistage builders...

llvm-svn: 278644
2016-08-15 02:23:46 +00:00
David Majnemer 5ec9c58f13 [ScopedNoAliasAA] Remove an unneccesary set
We are trying to prove that one group of operands is a subset of
another.  We did this by populating two Sets and determining that every
element within one was inside the other.

However, this is unnecessary.  We can simply construct a single set and
test if each operand is within it.

llvm-svn: 278641
2016-08-15 00:13:04 +00:00
Sanjay Patel 52fe9ae990 [InstCombine] add test for missing vector icmp fold
llvm-svn: 278639
2016-08-14 22:56:46 +00:00
Sanjay Patel 7e57b00274 [InstCombine] add tests for vector icmp folds
llvm-svn: 278637
2016-08-14 22:44:10 +00:00
Sanjay Patel 8554f70c07 [InstCombine] add test for potentially missing vector icmp fold
llvm-svn: 278636
2016-08-14 22:30:07 +00:00
Sanjay Patel beebe05af1 [InstCombine] add test for missing vector icmp fold
llvm-svn: 278635
2016-08-14 22:29:27 +00:00
Sanjay Patel ba1f9fbddc [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278634
2016-08-14 22:28:50 +00:00
Sanjay Patel f6559404d5 [InstCombine] remove unnecessary function attributes from tests
llvm-svn: 278633
2016-08-14 21:48:21 +00:00
Sanjay Patel b44ca3bfa9 [InstCombine] add tests for missing vector icmp folds
llvm-svn: 278632
2016-08-14 21:36:22 +00:00
Sanjay Patel bbb3dffd0a [InstCombine] add test for missing vector icmp fold
llvm-svn: 278631
2016-08-14 21:05:08 +00:00
Sanjay Patel 66a3457a4c [InstCombine] add test for missing vector icmp fold
llvm-svn: 278630
2016-08-14 20:39:42 +00:00
Craig Topper 37e8c5443c [AVX-512] Mark VPMADDWD as commutable to match SSE/AVX version.
llvm-svn: 278629
2016-08-14 17:57:22 +00:00
Craig Topper c677e97dff [AVX-512] Add masked commutable floating point max/min instructions to folding tables.
llvm-svn: 278628
2016-08-14 17:57:19 +00:00
Craig Topper 29fbdc309a [AVX-512] Add masked logical operations to memory folding tables.
llvm-svn: 278627
2016-08-14 17:57:16 +00:00
Igor Breger 505f2cc468 [AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should be zero extended according to SPEC.
Differential Revision: http://reviews.llvm.org/D23489

llvm-svn: 278626
2016-08-14 13:58:57 +00:00
Igor Breger 6fc00b0acf autogenerate checks
llvm-svn: 278624
2016-08-14 09:34:39 +00:00
Igor Breger 8672408db0 [AVX512] Fix insertelement i1 lowering.
1. Use shuffle to insert element i1 into vector. The previous implementation was incorrect ( dest_bit OR src_bit , it doesn't clear the bit if src_bit=0 )
2. Improve shuffle i1 vector, use CVT2MASK if supported instead TRUNCATE.

Differential Revision: http://reviews.llvm.org/D23347

llvm-svn: 278623
2016-08-14 05:25:07 +00:00
Saleem Abdulrasool 98541b09f4 Revert "gold: add a cast to appease std::max NFC"
This was fixed differently by Teresa and this should no longer be needed.

llvm-svn: 278622
2016-08-14 05:07:20 +00:00
Diana Picus 68be1eb885 Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."
This reverts commit r278287.

This commit broke the clang-cmake-thumbv7-a15-full-sh bot.
See https://llvm.org/bugs/show_bug.cgi?id=28949

llvm-svn: 278621
2016-08-14 02:10:18 +00:00
Diana Picus 35ccf53e75 Revert "Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough."
This reverts commit r278288.

r278287 broke the clang-cmake-thumbv7-a15-full-sh bot.
Revert this so we can get to r278287.

llvm-svn: 278620
2016-08-14 02:10:12 +00:00
Sanjoy Das 35459f0e34 [IRCE] Change variable grouping; NFC
llvm-svn: 278619
2016-08-14 01:04:50 +00:00
Sanjoy Das 2143447c73 [IRCE] Create llvm::Loop instances for cloned out loops
llvm-svn: 278618
2016-08-14 01:04:46 +00:00
Sanjoy Das 7a18a238c6 [IRCE] Don't iterate on loops that were cloned out
IRCE has the ability to further version pre-loops and post-loops that it
created, but this isn't useful at all.  This change teaches IRCE to
leave behind some metadata in the loops it creates (by cloning the main
loop) so that these new loops are not re-processed by IRCE.

Today this bug is hidden by another bug -- IRCE does not update LoopInfo
properly so the loop pass manager does not re-invoke IRCE on the loops
it split out.  However, once the latter is fixed the bug addressed in
this change causes IRCE to infinite-loop in some cases (e.g. it splits
out a pre-loop, a pre-pre-loop from that, a pre-pre-pre-loop from that
and so on).

llvm-svn: 278617
2016-08-14 01:04:36 +00:00
Sanjoy Das 43fdc54303 [IRCE] Add better DEBUG diagnostic; NFC
NFC meaning IRCE should not _do_ anything different, but
-debug-only=irce will be a little friendlier.

llvm-svn: 278616
2016-08-14 01:04:31 +00:00
Mehdi Amini a71002e7f1 Fix bitcode auto-upgrade when using bitcode lazy loading
The auto-upgrade path could be called before the VST (global
names) was fully parsed, and thus intrinsic names were not
available and the autoupgrade logic could not operate.

Fix link failures with ThinLTO.

This is a recommit of r278610 with a different fix.

llvm-svn: 278615
2016-08-14 00:01:27 +00:00
Ron Lieberman 822ee88ab8 Fix unsupported relocation type R_HEX_6_X' for symbol .rodata
LowerTargetConstantPool is not properly setting the TargetFlag to indicate
desired relocation. Coding error, the offset parameter was omitted, so the
TargetFlag was used as the offset, and the TargetFlag defaulted to zero.

This only affects -fpic compilation, and only those items created in a
Constant Pool, for example a vector of constants. Halide ran into this issue.

llvm-svn: 278614
2016-08-13 23:41:11 +00:00
Mehdi Amini 466a64e298 Revert "Fix bitcode auto-upgrade when using bitcode lazy loading"
This reverts commit r278610. Tests are broken

llvm-svn: 278613
2016-08-13 23:39:14 +00:00
Sanjoy Das 1b1272f515 [IRCE] Fix test case; NFC
The (negative) test case is supposed to check that IRCE does not muck
with range checks it cannot handle, not that it does the right thing in
the absence of profiling information.

llvm-svn: 278612
2016-08-13 23:36:40 +00:00
Sanjoy Das 2a2f14d7ab [IRCE] Be resilient in the face of non-simplified loops
Loops containing `indirectbr` may not be in simplified form, even after
running LoopSimplify.  Reject then gracefully, instead of tripping an
assert.

llvm-svn: 278611
2016-08-13 23:36:35 +00:00
Mehdi Amini e62aaf2303 Fix bitcode auto-upgrade when using bitcode lazy loading
The auto-upgrade path could be called before the VST (global
names) was fully parsed, and thus intrinsic names were not
available and the autoupgrade logic could not operate.

Fix link failures with ThinLTO.

llvm-svn: 278610
2016-08-13 23:31:53 +00:00
Mehdi Amini 8c629ecf3a Revert "Revert "Invariant start/end intrinsics overloaded for address space""
This reverts commit 32fc6488e48eafc0ca1bac1bd9cbf0008224d530.

llvm-svn: 278609
2016-08-13 23:31:24 +00:00
Mehdi Amini 164ac651da Revert "Invariant start/end intrinsics overloaded for address space"
This reverts commit r276447.

llvm-svn: 278608
2016-08-13 23:27:32 +00:00
Sanjoy Das f2b7bafae4 [IRCE] Use dyn_cast instead of explicit isa/cast; NFC
llvm-svn: 278607
2016-08-13 22:00:12 +00:00
Sanjoy Das d1d62a1354 [IRCE] Use range-for; NFC
llvm-svn: 278606
2016-08-13 22:00:09 +00:00
Mehdi Amini fa0f96b083 [ADT] Add a reserve() method to DenseSet as well as an insert() for R-value
Recommit 278600 with some fixes to make the test more robust.

llvm-svn: 278604
2016-08-13 20:42:19 +00:00
Mehdi Amini bf0010934b Revert "[ADT] Add a reserve method to DenseSet as well as an insert() for R-value"
This reverts commit r278600. The unittest does not pass on MSVC, there is
an extra move. Investigating how to make it more robust.

llvm-svn: 278603
2016-08-13 20:14:39 +00:00
Yaron Keren 782788b7a1 Limit DenseMap::setNumEntries input to 1<<31, in accordance with the 31 bits allocated to NumEntries.
std::numeric_limits<int>::max() may be something else than 1<<31.

llvm-svn: 278602
2016-08-13 19:46:31 +00:00
Mehdi Amini 7079efe1ce Add missing REQUIRES in sancov/print_coverage_pcs.test: it requires aarch64 as well now
llvm-svn: 278601
2016-08-13 19:44:02 +00:00
Mehdi Amini d866d8a03f [ADT] Add a reserve method to DenseSet as well as an insert() for R-value
llvm-svn: 278600
2016-08-13 19:40:13 +00:00
Sanjay Patel 08c876673e [x86] add tests to show missed 64-bit immediate merging
Tests are slightly modified versions of those written by
Sunita Marathe in D23391.

llvm-svn: 278599
2016-08-13 18:42:14 +00:00
Aditya Kumar f24939b1f4 Test commit
llvm-svn: 278598
2016-08-13 11:56:50 +00:00
Craig Topper 8c372a31b7 [X86] Add a check of isCommutable at the top of X86InstrInfo::findCommutedOpIndices. Most callers don't check if the instruction is commutable before calling.
This saves us the trouble of ending up in the default of the switch and having to determine if this is an FMA or not.

llvm-svn: 278597
2016-08-13 06:48:44 +00:00
Craig Topper eafdbecc44 [AVX-512] Add isCommutable to scalar FMA3 instructions.
llvm-svn: 278596
2016-08-13 06:48:41 +00:00
Craig Topper 5f2441d8f3 [AVX-512] Add commutable flags to 132 form FMA3 instructions.
llvm-svn: 278595
2016-08-13 06:48:39 +00:00
Craig Topper e5115aa4ca [X86] Remove patterns for (vzmovl (insert_subvector undef, (scalar_to_vector))) as the (vzmovl VR256) pattern has higher priority. NFC
llvm-svn: 278594
2016-08-13 06:02:19 +00:00
Craig Topper 3f8126e6fa [AVX-512] Remove an AddedComplexity that was prioritizing basic vzmovl patterns over more complex ones that produce better code.
llvm-svn: 278593
2016-08-13 05:43:20 +00:00
Craig Topper 600685d510 [AVX-512] Add patterns to support VZEXT_MOVL from 512-bit vectors with 64-bit and 32-bit elements.
Fixes PR28961.

llvm-svn: 278592
2016-08-13 05:33:12 +00:00
Teresa Johnson 1eca6bc6a7 [PM] Port LoopDataPrefetch to new pass manager
Summary:
Refactor the existing support into a LoopDataPrefetch implementation
class and a LoopDataPrefetchLegacyPass class that invokes it.
Add a new LoopDataPrefetchPass for the new pass manager that utilizes
the LoopDataPrefetch implementation class.

Reviewers: mehdi_amini

Subscribers: sanjoy, mzolotukhin, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D23483

llvm-svn: 278591
2016-08-13 04:11:27 +00:00
Matt Arsenault c1ebd82ebe AMDGPU: Fix not estimating MBB operand sizes correctly
llvm-svn: 278590
2016-08-13 01:43:54 +00:00
Matt Arsenault 3cc1e0066d AMDGPU: Fix missing test for addressing mode with odd offsets
Add test if the constant offset looks unaligned.

llvm-svn: 278589
2016-08-13 01:43:51 +00:00
Matt Arsenault 44f6d694b3 AMDGPU/R600: Remove macros
llvm-svn: 278588
2016-08-13 01:43:46 +00:00
Hans Wennborg 0dd9ed1d45 Fix more dereferenced end() iterators after r278532
llvm-svn: 278587
2016-08-13 01:12:49 +00:00
Pete Cooper 35b00d5d9e Constify ValueTracking. NFC.
Almost all of the method here are only analysing Value's as opposed to
mutating them.  Mark all of the easy ones as const.

llvm-svn: 278585
2016-08-13 01:05:32 +00:00
Sanjoy Das 3502511548 [IndVars] Ignore (s|z)exts that don't extend the induction variable
`IVVisitor::visitCast` used to have the invariant that if the
instruction it was passed was a sext or zext instruction, the result of
the instruction would be wider than the induction variable.  This is no
longer true after rL275037, so this change teaches `IndVarSimplify` s
implementation of `IVVisitor::visitCast` to work with the relaxed
invariant.

A corresponding change to SimplifyIndVar to preserve the said invariant
after rL275037 would also work, but given how `IVVisitor::visitCast` is
spelled (no indication of said invariant), I figured the current fix is
cleaner.

Fixes PR28935.

llvm-svn: 278584
2016-08-13 00:58:31 +00:00
Eugene Zelenko 3e3a057c20 Fix some Clang-tidy modernize-use-using and Include What You Use warnings.
Differential revision: https://reviews.llvm.org/D23478

llvm-svn: 278583
2016-08-13 00:50:41 +00:00
Kostya Serebryany f5bb42c081 [libFuzzer] mention one more trophie in LLVM
llvm-svn: 278582
2016-08-13 00:12:32 +00:00
Justin Lebar d1675aadf6 [LSV] Use a set rather than an ArraySlice at the end of getVectorizablePrefix. NFC
Summary: This avoids a small O(n^2) loop.

Reviewers: asbirlea

Subscribers: mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D23473

llvm-svn: 278581
2016-08-13 00:04:12 +00:00
Justin Lebar 222ceff289 [LSV] Use OrderedBasicBlock instead of rolling it ourselves. NFC
Summary:
In getVectorizablePrefix, this is less efficient (because we have to
iterate over the BB twice), but boy is it simpler.  Given how much
trouble we've had here, I think the simplicity gain is worthwhile.

In reorder(), this is actually more efficient, as
DominatorTree::dominates iterates over the BB from the beginning when
the two instructions are in the same BB.

Reviewers: asbirlea

Subscribers: arsenm, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D23472

llvm-svn: 278580
2016-08-13 00:04:08 +00:00
Justin Lebar cf56e92c50 Minor comment fix ("generate" --> "generates").
llvm-svn: 278578
2016-08-12 23:58:19 +00:00
Hans Wennborg 2d87ccfd58 X86: Fix another dereferenced end() iterator after r278532
llvm-svn: 278577
2016-08-12 23:35:59 +00:00
Dominic Chen 4a9b99ee92 [WebAssembly] Re-enable disabled debug value test
Summary:
This test was resulting in asan/valgrind failures due to undefined
DWARF register mappings for WebAssembly, and was disabled in r278495.
These have been resolved.

Reviewers: sunfish, dschuff

Subscribers: bkramer, llvm-commits, jfb

Differential Revision: https://reviews.llvm.org/D23459

llvm-svn: 278576
2016-08-12 23:14:18 +00:00
Haicheng Wu 7c4535d1e7 Reapply [BranchFolding] Restrict tail merging loop blocks after MBP
Fixed a bug in the test case.

To fix PR28104, this patch restricts tail merging to blocks that belong to the
same loop after MBP.

llvm-svn: 278575
2016-08-12 23:13:38 +00:00
Dominic Chen 2868fa171a Avoid accessing LLVM/DWARF register mappings if undefined
Summary:
If the backend does not define LLVM/DWARF register mappings, the associated
variables are undefined since the map initializer is called by auto-generated
TableGen routines. This patch initializes the pointers and sizes to nullptr
and zero, respectively, and checks that they are valid before searching
for a mapping.

Reviewers: grosbach, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23458

llvm-svn: 278574
2016-08-12 23:12:59 +00:00
Tim Shen c9c0d2dcb5 [LoopVectorize] Detect loops in the innermost loop before creating InnerLoopVectorizer
InnerLoopVectorizer shouldn't handle a loop with cycles inside the loop
body, even if that cycle isn't a natural loop.

Fixes PR28541.

Differential Revision: https://reviews.llvm.org/D22952

llvm-svn: 278573
2016-08-12 22:47:13 +00:00
Duncan P. N. Exon Smith 69b0650548 X86: Stop dereferencing end() in X86FrameLowering::emitEpilogue
On a Windows build of Chromium, r278532 (up to r278539)
X86FrameLowering::emitEpilogue because it wasn't wary enough of the
return of MachineBasicBlock::getFirstTerminator.  Guard all the uses
here.

Note that r278532 *looks* like an NFC commit (just an API change), but
it removes a couple of layers of abstraction and is probably causing
optimization differences in MSVC.

llvm-svn: 278572
2016-08-12 22:43:33 +00:00
Reid Kleckner 6ee00a2602 [Inliner] Don't treat inalloca allocas as static
They aren't static, and moving them to the entry block across something
else will only result in tears.

Root cause of http://crbug.com/636558.

llvm-svn: 278571
2016-08-12 22:23:04 +00:00
Pete Cooper ab47fa643b Add support to paternmatch for simple const Value cases.
Pattern match has some paths which can operate on constant instructions,
but not all.  This adds a version of m_value() to return const Value* and
changes ICmp matching to use auto so that it can match both constant and
mutable instructions.

Tests also included for both mutable and constant ICmpInst matching.

This will be used in a future commit to constify ValueTracking.cpp.

llvm-svn: 278570
2016-08-12 22:16:05 +00:00
Tim Shen e78e32a443 [ADT] Add filter_iterator for filtering elements
Differential Revision: https://reviews.llvm.org/D22951

llvm-svn: 278569
2016-08-12 22:03:28 +00:00
Artem Belevich 2f0a3dfe64 [NVPTX] Use untyped (.b) integer registers in PTX.
This bring LLVM-generated PTX closer to what nvcc generates and avoids
triggering issues in ptxas.

For instance, ptxas does not accept .s16 (or .u16) registers as operands
for .fp16 instructions.

Differential Revision: https://reviews.llvm.org/D23460

llvm-svn: 278568
2016-08-12 22:02:19 +00:00
Saleem Abdulrasool 0bc85613f7 gold: add a cast to appease std::max NFC
llvm-svn: 278567
2016-08-12 21:56:12 +00:00
Teresa Johnson 358657f27e [PM] BitcodeWriterPass should derive from PassInfoMixin
Summary:
The BitcodeWriterPass was ported a couple years ago, and predates the
PassInfoMixin. Make BitcodeWriterPass from that base class.

Should BitcodeWriterPass be added to the PassRegistry.def file? It seems
like that is only for passes that can be added arbitrarily, e.g. via the
-passes flag to the opt tool. Whereas the bitcode writer is added
specially based on the output type (and requires an output stream and
other parameters). For now I have left it out of the PassRegistry, but
let me know if it should go there.

Finally, I was considering an NFC change of the legacy WriteBitcodePass
to BitcodeWriterLegacyPass to make its usage clearer and more consistent
with other legacy passes. WDYT?

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23465

llvm-svn: 278566
2016-08-12 21:33:36 +00:00
David L Kreitzer 9667417a1a Fixed typo.
llvm-svn: 278565
2016-08-12 21:06:53 +00:00
Krzysztof Parzyszek f285963608 [Hexagon] Cleanup and standardize vector load/store pseudo instructions
Remove the following single-vector load/store pseudo instructions, use real
instructions instead:
  LDriv_pseudo_V6         STriv_pseudo_V6
  LDriv_pseudo_V6_128B    STriv_pseudo_V6_128B
  LDrivv_indexed          STrivv_indexed
  LDrivv_indexed_128B     STrivv_indexed_128B

Rename the double-vector load/store pseudo instructions, add unaligned
counterparts:

  -- old --               -- new --            -- unaligned --
  LDrivv_pseudo_V6        PS_vloadrw_io        PS_vloadrwu_io
  LDrivv_pseudo_V6_128B   PS_vloadrw_io_128B   PS_vloadrwu_io_128B
  STrivv_pseudo_V6        PS_vstorerw_io       PS_vstorerwu_io
  STrivv_pseudo_V6_128B   PS_vstorerw_io_128   PS_vstorerwu_io_128

llvm-svn: 278564
2016-08-12 21:05:05 +00:00
Kostya Serebryany 5d70d82f60 [libFuzzer] fix typo in docs
llvm-svn: 278563
2016-08-12 20:42:24 +00:00
Eli Friedman f184e4befc [AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loads/stores.
The existing code accidentally skipped the aliasing check in edge cases.

Differential revision: https://reviews.llvm.org/D23372

llvm-svn: 278562
2016-08-12 20:39:51 +00:00
Mike Aizatsky f4fdb5ddf3 [AArch64] Registering default MCInstrAnalysis
Even in this form it is useful: it can detect branch instructions.

https://github.com/google/sanitizers/issues/706

Subscribers: aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D23426

llvm-svn: 278560
2016-08-12 20:28:05 +00:00
Eli Friedman 8585e9d33d [AArch64LoadStoreOpt] Handle offsets correctly for post-indexed paired loads.
Trunk would try to create something like "stp x9, x8, [x0], #512", which isn't actually a valid instruction.

Differential revision: https://reviews.llvm.org/D23368

llvm-svn: 278559
2016-08-12 20:28:02 +00:00
Chris Bieneman c5e19b6f8d Remove autoconf references from LICENSE.TXT
Since we don't actually have the autoconf subdirectories anymore, we don't need this reference here.

llvm-svn: 278558
2016-08-12 20:11:03 +00:00
Kevin Enderby c614d283b7 Next set of additional error checks for invalid Mach-O files.
This contains the two missing checks for LC_SEGMENT load command fields.
And checks for the Mach-O sections fields that would make them invalid.

With the new checks, some of the existing malformed file checks now trips one
of these instead of the issue it was having before so those tests were adjusted.

llvm-svn: 278557
2016-08-12 20:10:25 +00:00
Mike Aizatsky 17a907588c [sancov] test file cleanup
llvm-svn: 278556
2016-08-12 20:06:32 +00:00
Mike Aizatsky 3c4d60ad89 [sancov] MachO indirect symbols support.
Differential Revision: https://reviews.llvm.org/D23338

llvm-svn: 278551
2016-08-12 19:25:59 +00:00
Tim Shen dc698c3e91 [PPC] Memoize getValueBits. NFC.
Summary: It triggers exponential behavior when the DAG has many branches.

Reviewers: hfinkel, kbarton

Subscribers: iteratee, nemanjai, echristo

Differential Revision: https://reviews.llvm.org/D23428

llvm-svn: 278548
2016-08-12 18:40:04 +00:00
Benjamin Kramer 9bc1b230fd [WebAssembly] Plug MachineMemOperand leaks.
llvm-svn: 278545
2016-08-12 18:33:50 +00:00
Dan Liew ed3c9cae49 [LibFuzzer] Fix `-jobs=<N>` where <N> > 1 and the number of workers is > 1 on macOS.
The original `ExecuteCommand()` called `system()` from the C library.
The C library implementation of this on macOS contains a mutex which
serializes calls to `system()`. This prevented the `-jobs=` flag
from running copies of the fuzzing binary in parallel which is
the opposite of what is intended.

To fix this on macOS an alternative implementation of `ExecuteCommand()`
is provided that can be used concurrently. This is provided in
`FuzzerUtilDarwin.cpp` which is guarded to only compile code on Apple
platforms. The existing implementation has been moved to a new file
`FuzzerUtilLinux.cpp` which is guarded to only compile code on Linux.

This commit includes a simple test to check that LibFuzzer is being
executed in parallel when requested.

Differential Revision: https://reviews.llvm.org/D22742

llvm-svn: 278544
2016-08-12 18:29:36 +00:00
Duncan P. N. Exon Smith b1669ba1ed ADT: Remove stale header comments about next/prev after r278532
Thanks to Mehdi for noticing.

llvm-svn: 278542
2016-08-12 18:14:42 +00:00
Duncan P. N. Exon Smith ad9a5951d9 Hide type trait from r278532 from MSVC
The fixup from r278537 was insufficient.  Just #ifdef it out for MSVC.

llvm-svn: 278539
2016-08-12 18:10:29 +00:00
Duncan P. N. Exon Smith ef07ac9584 Try to appease win7 bots after r278532 by cleaning up type trait
The HasGetNext type trait was cluttered with a few things it didn't
need.  Try to clean it up, hoping to fix windows bots:
  http://lab.llvm.org:8011/builders/lld-x86_64-win7/builds/38063

I may just have to delete the trait...

llvm-svn: 278537
2016-08-12 17:54:54 +00:00
David Majnemer 600158f959 Remove whitespace
llvm-svn: 278536
2016-08-12 17:53:06 +00:00
Duncan P. N. Exon Smith 0a4d57172a ADT: Remove the ilist_nextprev_traits customization point
No one is using the capability to implement next and prev another way
(since lld stopped doing it in r278468).  Remove the customization point
by moving the API from ilist_nextprev_traits<T> to ilist_node_access.

The old traits class is still useful/necessary API as a target for
friends of node types that inherit privately from ilist_node.
Eventually I plan to either remove it entirely or move the template
parameters to the methods.

(Note: if there's desire to bring back customization of next/prev
pointers in the future (e.g., to pack some bits in there), I think a
traits class like this is an awkward way to accomplish it.  Instead, we
should change ilist<T> to be ilist<ilist_node<T>>, and give an extra
template parameter to ilist_node.)

llvm-svn: 278532
2016-08-12 17:32:34 +00:00
Michael Kuperstein 31b8399beb [PM] Port LowerInvoke to the new pass manager
llvm-svn: 278531
2016-08-12 17:28:27 +00:00
Pete Cooper 980a935e27 constify InstCombine::foldAllocaCmp. NFC.
This is part of an effort to constify ValueTracking.cpp.  This change is
to methods which need const Value* instead of Value* to go with the upcoming
changes to ValueTracking.

llvm-svn: 278528
2016-08-12 17:13:28 +00:00
Dehao Chen c0a1e432c7 Fine tuning of sample profile propagation algorithm.
Summary: The refined propagation algorithm is more accurate and robust.

Reviewers: davidxl, dnovillo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23224

llvm-svn: 278522
2016-08-12 16:22:12 +00:00
Artur Pilipenko 87e4038a91 [x86] X86ISelLowering zext(add_nuw(x, C)) --> add(zext(x), C_zext)
Currently X86ISelLowering has a similar transformation for sexts:
sext(add_nsw(x, C)) --> add(sext(x), C_sext)

In this change I extend this code to handle zexts as well.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D23359

llvm-svn: 278520
2016-08-12 16:08:30 +00:00
Ehsan Amiri 17e1701075 [BasicAA] Avoid calling GetUnderlyingObject, when the result of a previous call can be reused.
Recursive calls to aliasCheck from alias[GEP|Select|PHI] may result in a second call to GetUnderlyingObject for a Value, whose underlying object is already computed. This patch ensures that in this situations, the underlying object is not computed again, and the result of the previous call is resued.

https://reviews.llvm.org/D22305

llvm-svn: 278519
2016-08-12 16:05:03 +00:00
Artur Pilipenko 2e8f82d962 [LVI] Take guards into account
Teach LVI to gather control dependant constraints from guards.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D23358

llvm-svn: 278518
2016-08-12 15:52:23 +00:00
Teresa Johnson 77a1f7566c Add move ops to satisfy MSVC.
Try to appease Windows bots after r278508:
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/27250
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/14776

llvm-svn: 278517
2016-08-12 15:39:26 +00:00
Geoff Berry 22dfbc5637 [AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.
This re-factoring could cause the following slight changes in generated
code, though none were observed during testing:

- MachineScheduler could decide not to cluster some loads/stores if
  there are other load/stores with non-pairable opcodes that have the
  same base register and offset as a pairable set of load/stores.  One
  case of different MachineScheduler pairing did show up in my testing,
  but it wasn't due to this issue, but due
  BaseMemOpClusterMutation::clusterNeighboringMemOps() being unstable
  w.r.t. the order it considers memory operations.  See PR28942.

- The ImplicitNullChecks optimization could be done for more load/store
  opcodes.  This optimization isn't done for C/C++ code, so it didn't
  show up in my testing.

Reviewers: mcrosier, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D23365

llvm-svn: 278515
2016-08-12 15:26:00 +00:00
Artur Pilipenko b623088abe [LVI] Fix potential memory corruption in getValueFromCondition
Rewrite Visited[Cond] = getValueFromConditionImpl(..., Visited) statement which can lead to a memory corruption since getValueFromConditionImpl changes Visited map and invalidates the iterators.

llvm-svn: 278514
2016-08-12 15:08:15 +00:00
Duncan P. N. Exon Smith 0d2ed35d3e ADT: Share code for embedded sentinel traits, NFC
Share code for the (mostly problematic) embedded sentinel traits.
- Move the LLVM_NO_SANITIZE("object-size") attribute to
  ilist_half_embedded_sentinel_traits and ilist_embedded_sentinel_traits
  (previously it spread throughout the code duplication).
- Add an ilist_full_embedded_sentinel_traits which has no UB (but has
  the downside of storing the complete node).
- Replace all the custom sentinel traits in LLVM with a declaration of
  ilist_sentinel_traits that inherits from one of the embedded sentinel
  traits classes.

There are still custom sentinel traits in other LLVM subprojects.  I'll
remove those in a follow-up.

Nothing at all should be changing here, this is just rearranging code.
Note that the final goal here is to remove the sentinel traits
altogether, settling on the memory layout of
ilist_half_embedded_sentinel_traits without the UB.  This intermediate
step moves the logic into ilist.h.

llvm-svn: 278513
2016-08-12 15:00:55 +00:00
Teresa Johnson ad7eb9db46 Fix type to avoid problems on 32-bit builds
lto::InputFile::Symbol::getCommonSize should return uint64_t instead of
size_t since it is returning the result of DataLayout::getTypeAllocSize
which returns uint64_t, and the result of getCommonSize is assigned to a
uint64_t variable. On 32-bit builds size_t is unsigned int and there are
type errors. This was introduced in r278338.

llvm-svn: 278512
2016-08-12 14:55:43 +00:00
James Y Knight 2cc9da9a65 Revert "[Sparc] Leon errata fix passes."
...and the two followup commits:
Revert "[Sparc][Leon] Missed resetting option flags from check-in 278489."
Revert "[Sparc][Leon] Errata fixes for various errata in different
versions of the Leon variants of the Sparc 32 bit processor."

This reverts commit r274856, r278489, and r278492.

llvm-svn: 278511
2016-08-12 14:48:09 +00:00
Teresa Johnson 4223dd8559 [PM] Port NameAnonFunction pass to new pass manager
Summary:
Port the NameAnonFunction pass and add a test.

Depends on D23439.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23440

llvm-svn: 278509
2016-08-12 14:03:36 +00:00
Teresa Johnson f93b246f8b [PM] Port ModuleSummaryIndex analysis to new pass manager
Summary:
Port the ModuleSummaryAnalysisWrapperPass to the new pass manager.
Use it in the ported BitcodeWriterPass (similar to how we use the
legacy ModuleSummaryAnalysisWrapperPass in the legacy WriteBitcodePass).

Also, pass the -module-summary opt flag through to the new pass
manager pipeline and through to the bitcode writer pass, and add
a test that uses it.

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23439

llvm-svn: 278508
2016-08-12 13:53:02 +00:00
Simon Pilgrim 687d71e877 [X86][SSE] Add support for combining target shuffles to PSLLDQ/PSRLDQ byte shifts
llvm-svn: 278502
2016-08-12 11:24:34 +00:00
Krzysztof Parzyszek be976d4ea9 [Hexagon] Standardize pseudo-instructions for calls and returns
- CALLv3nr        PS_call_nr
- CALLRv3nr       PS_callr_nr
- CALLstk         PS_call_stk

- TCRETURNi       PS_tailcall_i
- TCRETURNr       PS_tailcall_r

- JMPret          PS_jmpret
- JMPrett         PS_jmprett
- JMPretf         PS_jmpretf
- JMPrettnew      PS_jmprettnew
- JMPretfnew      PS_jmpretfnew
- JMPrettnewpt    PS_jmprettnewpt
- JMPretfnewpt    PS_jmpretfnewpt

llvm-svn: 278499
2016-08-12 11:12:02 +00:00
Krzysztof Parzyszek ab9127ca3c [Hexagon] Treat non-returning indirect calls as scheduling boundaries
llvm-svn: 278498
2016-08-12 11:01:10 +00:00
Artur Pilipenko 6669f253d5 [LVI] Take range metadata into account while calculating icmp condition constraints
Take range metadata into account for conditions like this:

%length = load i32, i32* %length_ptr, !range !{i32 0, i32 2147483647}
%cmp = icmp ult i32 %a, %length

This is a common pattern for range checks where the length of the array is dynamically loaded.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D23267

llvm-svn: 278496
2016-08-12 10:14:11 +00:00
Benjamin Kramer 05e760ec4b [Webassembly] disable unstable test.
It reads uninitialized memory and crashes randomly.

llvm-svn: 278495
2016-08-12 10:13:45 +00:00
Simon Pilgrim ed96b9adfb [X86][SSE] Fixed PALIGNR target shuffle decode
The PALIGNR target shuffle decode was not taking into account that DecodePALIGNRMask (rather oddly) expects the operands to be in reverse order, nor was it detecting unary patterns, causing combines to combine with the incorrect input.

The cgbuiltin, auto upgrade and instruction comments code correctly swap the operands so are not affected.

llvm-svn: 278494
2016-08-12 10:10:51 +00:00
Artur Pilipenko 635625855f [LVI] Handle any predicate in comparisons like icmp <pred> (add Val, Offset), ...
Currently LVI can only gather value constraints from comparisons like:

* icmp <pred> Val, ...
* icmp ult (add Val, Offset), ...

In fact we can handle any predicate in latter comparisons.

Reviewed By: sanjoy

Differential Revision: https://reviews.llvm.org/D23357

llvm-svn: 278493
2016-08-12 10:05:11 +00:00
Chris Dewhurst 5247af24c3 [Sparc][Leon] Missed resetting option flags from check-in 278489.
llvm-svn: 278492
2016-08-12 09:54:39 +00:00
Chris Dewhurst 829f8efe55 [Sparc][Leon] Errata fixes for various errata in different versions of the Leon variants of the Sparc 32 bit processor.
The nature of the errata are listed in the comments preceding the errata fix passes. Relevant unit tests are implemented for each of these.

These changes update older versions of these errata fixes with improvements to code and unit tests.

Differential Revision: https://reviews.llvm.org/D21960

llvm-svn: 278489
2016-08-12 09:34:26 +00:00
Benjamin Kramer bbff9c6130 [Coroutines] Move class into anonymous namespace.
Hopefully fixes visibility warnings from GCC. No functionality change.

llvm-svn: 278485
2016-08-12 08:47:13 +00:00
Haicheng Wu d9cbb1608f Revert "[BranchFolding] Restrict tail merging loop blocks after MBP"
This reverts commit r278463 because it hits the bot.

llvm-svn: 278484
2016-08-12 08:40:24 +00:00
Gor Nishanov 0f303accde [Coroutines]: Part6b: Add coro.id intrinsic.
Summary:
1. Make coroutine representation more robust against optimization that may duplicate instruction by introducing coro.id intrinsics that returns a token that will get fed into coro.alloc and coro.begin. Due to coro.id returning a token, it won't get duplicated and can be used as reliable indicator of coroutine identify when a particular coroutine call gets inlined.
2. Move last three arguments of coro.begin into coro.id as they will be shared if coro.begin will get duplicated.
3. doc + test + code updated to support the new intrinsic.

Reviewers: mehdi_amini, majnemer

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D23412

llvm-svn: 278481
2016-08-12 05:45:49 +00:00
Duncan P. N. Exon Smith f197b1f78f ADT: Remove all ilist_iterator => pointer casts, NFC
Remove all ilist_iterator to pointer casts.  There were two reasons for
casts:

  - Checking for an uninitialized (i.e., null) iterator.  I added
    MachineInstrBundleIterator::isValid() to check for that case.

  - Comparing an iterator against the underlying pointer value while
    avoiding converting the pointer value to an iterator.  This is
    occasionally necessary in MachineInstrBundleIterator, since there is
    an assertion in the constructors that the underlying MachineInstr is
    not bundled (but we don't care about that if we're just checking for
    pointer equality).

To support the latter case, I rewrote the == and != operators for
ilist_iterator and MachineInstrBundleIterator.

  - The implicit constructors now use enable_if to exclude
    const-iterator => non-const-iterator conversions from overload
    resolution (previously it was a compiler error on instantiation, now
    it's SFINAE).

  - The == and != operators are now global (friends), and are not
    templated.

  - MachineInstrBundleIterator has overloads to compare against both
    const_pointer and const_reference.  This avoids the implicit
    conversions to MachineInstrBundleIterator that assert, instead just
    checking the address (and I added unit tests to confirm this).

Notably, the only remaining uses of ilist_iterator::getNodePtrUnchecked
are in ilist.h, and no code outside of ilist*.h directly relies on this
UB end-iterator-to-pointer conversion anymore.  It's still needed for
ilist_*sentinel_traits, but I'll clean that up soon.

llvm-svn: 278478
2016-08-12 05:05:36 +00:00
David Majnemer 91a02f5bee Use the range variant of transform instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278477
2016-08-12 04:32:45 +00:00
David Majnemer 2d006e7673 Use the range variant of transform instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278476
2016-08-12 04:32:42 +00:00
David Majnemer c700490f48 Use the range variant of remove_if instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278475
2016-08-12 04:32:37 +00:00
David Majnemer 0da5afe717 Use the range variant of count_if instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278474
2016-08-12 04:32:29 +00:00
David Majnemer 42531260b3 Use the range variant of find/find_if instead of unpacking begin/end
If the result of the find is only used to compare against end(), just
use is_contained instead.

No functionality change is intended.

llvm-svn: 278469
2016-08-12 03:55:06 +00:00
Duncan P. N. Exon Smith fb14ed0777 ADT: Add ilist_iterator conversions to/from ilist_node
Allow an ilist_iterator to be constructed from an ilist_node, and give
access to the underlying ilist_node as well.

This will be used immediately in lld to support a type-erasure use case.
Longer term, they'll stick around once the iterator is using
ilist_node<NodeTy>* instead of NodeTy*.

llvm-svn: 278467
2016-08-12 03:35:33 +00:00
Wei Mi 7e103d92cc Recommit 'Remove the restriction that MachineSinking is now stopped by
"insert_subreg, subreg_to_reg, and reg_sequence" instructions' after
adjusting some unittest checks.

This is to solve PR28852. The restriction was added at 2010 to make better register
coalescing. We assumed that it was not necessary any more. Testing results on x86
supported the assumption.

We will look closely to any performance impact it will bring and will be prepared
to help analyzing performance problem found on other architectures.

Differential Revision: https://reviews.llvm.org/D23210

llvm-svn: 278466
2016-08-12 03:33:22 +00:00
Haicheng Wu ea02372059 [BranchFolding] Restrict tail merging loop blocks after MBP
To fix PR28014, this patch restricts tail merging to blocks that belong to the
same loop after MBP.

Differential Revision: https://reviews.llvm.org/D23191

llvm-svn: 278463
2016-08-12 03:30:23 +00:00
Ivan Krasin 89439a7939 WholeProgramDevirt: initialize WasDevirt in all constructors.
Summary: This is a follow up to r278389 and r278442.

Differential Revision: https://reviews.llvm.org/D23438

llvm-svn: 278455
2016-08-12 01:40:10 +00:00
Eli Friedman a6707f56b5 [DSE] Don't remove stores made live by a call which unwinds.
Issue exposed by noalias or more aggressive alias analysis.

Fixes http://llvm.org/PR25422.

Differential revision: https://reviews.llvm.org/D21007

llvm-svn: 278451
2016-08-12 01:09:53 +00:00
Pete Cooper 54a0255679 Refactor isValidAssumeForContext to reduce duplication and indentation. NFC.
This method had some duplicate code when we did or did not have a dom tree.  Refactor
it to remove the duplication, but also clean up the control flow to have less duplication.

llvm-svn: 278450
2016-08-12 01:00:15 +00:00
David Majnemer 562e82945e Use the range variant of find_if instead of unpacking begin/end
No functionality change is intended.

llvm-svn: 278443
2016-08-12 00:18:03 +00:00
Ivan Krasin 067cc24aaf WholeProgramDevirt: fix access to a non-initialized field.
Summary: This is a follow up to r278389, where I have introduced the bug

Reviewers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D23436

llvm-svn: 278442
2016-08-12 00:07:14 +00:00
Xinliang David Li 1ce88fa0a5 Add comment /NFC
llvm-svn: 278438
2016-08-11 23:09:56 +00:00
Tim Shen 6aaeb9b185 [ADT] Migrate DepthFirstIterator to use NodeRef
Summary:
Notice that the data layout is changed: instead of using
std::pair<PointerIntPair<NodeType*, 1>, ChildItTy>, now use
std::pair<NodeRef, Optional<ChildItTy>>.

A NFC but worth noticing change is operator==(), since we only compare
an iterator against end(), it's better to put an assert there and make
people noticed when it fails.

Reviewers: dblaikie, chandlerc

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D23146

llvm-svn: 278437
2016-08-11 22:36:16 +00:00
Xinliang David Li cbb5e02f4a Fix typos /NFC
llvm-svn: 278436
2016-08-11 22:34:00 +00:00