Commit Graph

13165 Commits

Author SHA1 Message Date
Rafael Espindola aa318ae495 Revert 132424 to fix PR10068.
llvm-svn: 132479
2011-06-02 19:57:47 +00:00
Stuart Hastings 351422bdc8 Andy pointed out a dumb omission in this test case. Thanks Andy!
llvm-svn: 132477
2011-06-02 19:26:49 +00:00
Stuart Hastings e239a6920e Jakob pointed out a dumb omission in this test case. Thanks Jakob!
llvm-svn: 132472
2011-06-02 18:44:05 +00:00
Stuart Hastings 8d530ad22a Omit unnecessary stack copy when x87 input is a load.
rdar://problem/6373334

llvm-svn: 132458
2011-06-02 15:57:11 +00:00
Stuart Hastings 7f25c32d5b Tweak testcase for ARM bot. rdar://problem/5993888
llvm-svn: 132454
2011-06-02 05:05:39 +00:00
Akira Hatanaka 2446869410 Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
llvm-svn: 132448
2011-06-02 01:03:14 +00:00
Akira Hatanaka d84c76f2a7 Test case for r132444.
llvm-svn: 132445
2011-06-02 00:25:53 +00:00
Eli Friedman b576b1675c When marking a block as being unanalyzable, use "Clobber" on the terminator instead of the first instruction in the block. This is a bit of a hack; "Clobber" isn't really the right marking in the first place. memdep doesn't really have any way of properly expressing "unanalyzable" at the moment. Using it on the terminator is much less ambiguous than using it on an arbitrary instruction, though.
In the given testcase, the "Clobber" was pointing to a load, and GVN was incorrectly assuming that meant that the "Clobber" load overlapped the load being analyzed (when they are actually unrelated).

The included testcase tests both this commit and r132434.

Part two of rdar://9429882.  (r132434 was mislabeled.)

llvm-svn: 132442
2011-06-02 00:08:52 +00:00
Devang Patel 324f843107 Do not drop constant values when a variable's content is described using .debug_loc entries.
llvm-svn: 132427
2011-06-01 22:03:25 +00:00
Stuart Hastings 7adc95f69e Recommit 132404 with fixes. rdar://problem/5993888
llvm-svn: 132424
2011-06-01 21:33:14 +00:00
Eric Christopher 690030c116 Allow bitcasts between valid types of the same size and vector
types if the vector type is legal.

Fixes rdar://9306086

llvm-svn: 132420
2011-06-01 19:55:10 +00:00
Stuart Hastings aab130d995 Revert 132404 to appease a buildbot. rdar://problem/5993888
llvm-svn: 132419
2011-06-01 19:52:20 +00:00
Eric Christopher d949eb714a Add a testcase, enabled only on arm, for llvm-gcc r132366.
llvm-svn: 132409
2011-06-01 18:23:56 +00:00
Stuart Hastings 41b1aa466d Cleanup test case. rdar://problem/5660695
llvm-svn: 132408
2011-06-01 18:23:14 +00:00
Stuart Hastings 7b7c102f2c Add support for x86 CMPEQSS and friends. These instructions do a
floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs.  Only profitable when the user wants a materialized 0
or 1 at runtime.  rdar://problem/5993888

llvm-svn: 132404
2011-06-01 17:17:45 +00:00
Stuart Hastings 2380483355 Reapply 132348 with fixes. rdar://problem/6501862
llvm-svn: 132402
2011-06-01 16:42:47 +00:00
Stuart Hastings 6f89e2ffaa A forthcoming SSE patch will break this test; since the test is also
valid for x87, re-target to x87.  rdar://problem/5993888

llvm-svn: 132401
2011-06-01 16:13:09 +00:00
Stuart Hastings 4d2fe66dc0 Test case for 132396. rdar://problem/5660695
llvm-svn: 132399
2011-06-01 15:50:29 +00:00
Nadav Rotem 8b24a731f2 This patch is another step in the direction of adding vector select. In this
patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization.  This flag will be removed when the transition is
complete.

llvm-svn: 132394
2011-06-01 12:51:46 +00:00
John McCall fca7786267 First, do no harm -- even if we can't find a selector for an enclosing
landing pad, forward llvm.eh.resume calls to it instead of turning them
invalidly into invokes.

llvm-svn: 132382
2011-06-01 02:17:11 +00:00
Galina Kistanova e21d849476 Reverted r132135 per Xerxes request. These tests are passing for his setup. Requires more research.
llvm-svn: 132364
2011-05-31 21:50:33 +00:00
Andrew Trick 812276eed4 scev: Better sign-extend removal. Normalize postincrement recurrences
so that their sign extended forms are congruent when no overflow occurs.

llvm-svn: 132360
2011-05-31 21:17:47 +00:00
Stuart Hastings 9d6a06d536 Revert to pacify a buildbot. rdar://problem/6501862
llvm-svn: 132351
2011-05-31 19:56:35 +00:00
Stuart Hastings 780f723309 Followup to 132316; accept arbitrary constants, add with a constant,
sub with a non-constant.  Fix comments, enlarge test case.
rdar://problem/6501862

llvm-svn: 132348
2011-05-31 19:29:55 +00:00
Richard Osborne 2f14b0bb1d Add XCore intrinsic for crc8.
llvm-svn: 132340
2011-05-31 16:24:49 +00:00
Richard Osborne 542f9a2bcf Add XCore intrinsic for crc32.
llvm-svn: 132336
2011-05-31 14:47:36 +00:00
Richard Osborne 36d027f7f6 Convert test to FileCheck.
llvm-svn: 132335
2011-05-31 14:00:05 +00:00
Bruno Cardoso Lopes 394f516d16 Fix ssat and ssat16 encodings for ARM and Thumb. The bit position value
must be encoded decremented by one. Only add encoding tests for ssat16
because ssat can't be parsed yet.

llvm-svn: 132324
2011-05-31 03:33:27 +00:00
Bruno Cardoso Lopes 98fc4c8bbc This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes bf3c1251e0 This patch implements the thread local storage. Implemented are General
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

llvm-svn: 132322
2011-05-31 02:53:58 +00:00
Rafael Espindola 08600bcf65 Use the dwarf->llvm mapping to print register names in the cfi
directives.

Fixes PR9826.

llvm-svn: 132317
2011-05-30 20:20:15 +00:00
Stuart Hastings 8284374b07 (1 - X) * (-2) -> (x - 1) * 2, for all positive nonzero powers of 2
rdar://problem/6501862

llvm-svn: 132316
2011-05-30 20:00:33 +00:00
John McCall f19cf99097 Add the test case for phis in the outer landing pad during the inliner's
forwarding of eh.resume that I promised yesterday.

llvm-svn: 132307
2011-05-30 01:08:04 +00:00
Jakob Stoklund Olesen dd6fcc4e46 Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.

The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.

llvm-svn: 132298
2011-05-29 20:10:28 +00:00
John McCall 7d84ece09b On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

Take 2, now with more basic competence.

llvm-svn: 132295
2011-05-29 19:50:32 +00:00
John McCall e64371b932 I didn't mean to commit these residues of a personal project.
llvm-svn: 132293
2011-05-29 19:41:56 +00:00
Nick Lewycky 63353933c6 Add testcase for r132290, to check for the crasher caught by the buildbots
doing llvm-gcc selfhost (or cross).

llvm-svn: 132292
2011-05-29 19:41:14 +00:00
John McCall 085d891d80 On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).

llvm-svn: 132291
2011-05-29 19:39:04 +00:00
Nick Lewycky a3bb03e400 Obey the isVolatile bit on memory intrinsics when analyzing uses of a global
variable. Noticed by inspection.

Simulate memset in EvaluateFunction where the target of the memset and the
value we're setting are both the null value. Fixes PR10047!

llvm-svn: 132288
2011-05-29 18:41:56 +00:00
Rafael Espindola 2e84c82750 Use %rbp on a 64 bit test.
llvm-svn: 132279
2011-05-29 04:04:50 +00:00
Benjamin Kramer 41112a1703 Move ARM specific test into the ARM subdir.
llvm-svn: 132255
2011-05-28 11:01:30 +00:00
Benjamin Kramer fd53a27f99 ConstantFoldInstOperands doesn't like compares, hand it off to instsimplify instead.
Fixes PR10040.

llvm-svn: 132254
2011-05-28 10:16:58 +00:00
John McCall 046c47e970 Implement and document the llvm.eh.resume intrinsic, which is
transformed by the inliner into a branch to the enclosing landing pad
(when inlined through an invoke).  If not so optimized, it is lowered
DWARF EH preparation into a call to _Unwind_Resume (or _Unwind_SjLj_Resume
as appropriate).  Its chief advantage is that it takes both the
exception value and the selector value as arguments, meaning that there
is zero effort in recovering these;  however, the frontend is required
to pass these down, which is not actually particularly difficult.

Also document the behavior of landing pads a bit better, and make it
clearer that it's okay that personality functions don't always land at
landing pads.  This is just a fact of life.  Don't write optimizations that
rely on pushing things over an unwind edge.

llvm-svn: 132253
2011-05-28 07:45:59 +00:00
Bruno Cardoso Lopes 325110f30d Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.

llvm-svn: 132248
2011-05-28 04:07:29 +00:00
Eric Christopher d00e8ad803 Implement the 'M' output modifier for arm inline asm. This is fairly
register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.

rdar://9119939

llvm-svn: 132242
2011-05-28 01:40:44 +00:00
Chad Rosier 96ea58e7c7 Add missing newlines.
llvm-svn: 132241
2011-05-28 01:35:58 +00:00
Akira Hatanaka b406843fe5 Define a wrapper node for target constant nodes (tglobaladdr, etc.).
Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240
2011-05-28 01:07:07 +00:00
Chad Rosier f374d8b0cf Fix test cases that were previously using grep to use FileCheck
llvm-svn: 132237
2011-05-28 00:15:10 +00:00
Cameron Zwarich 1d553a2cc4 Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
and add some basic tests for them.

llvm-svn: 132235
2011-05-27 23:54:00 +00:00
Bruno Cardoso Lopes 787dfadc7c ARM asm parser wasn't able to parse a "mov" instruction while in Thumb
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

llvm-svn: 132233
2011-05-27 23:46:09 +00:00