6 Commits

Author	SHA1	Message	Date
Matt Arsenault	26f8f3db39	AMDGPU: Rework how private buffer passed for HSA ... If we know we have stack objects, we reserve the registers that the private buffer resource and wave offset are passed and use them directly. If not, reserve the last 5 SGPRs just in case we need to spill. After register allocation, try to pick the next available registers instead of the last SGPRs, and then insert copies from the inputs to the reserved registers in the progloue. This also only selectively enables all of the input registers which are really required instead of always enabling them. llvm-svn: 254331	2015-11-30 21:16:03 +00:00
Matt Arsenault	49affb8462	AMDGPU: Check feature attributes in SIMachineFunctionInfo ... llvm-svn: 254091	2015-11-25 20:55:12 +00:00
Matt Arsenault	5b22dfa65d	AMDGPU: Also track whether SGPRs were spilled ... llvm-svn: 252145	2015-11-05 05:27:10 +00:00
Tom Stellard	45bb48ea19	R600 -> AMDGPU rename ... llvm-svn: 239657	2015-06-13 03:28:10 +00:00
Tom Stellard	1be1aa84ec	Revert "AMDGPU: Add core backend files for R600/SI codegen v6" ... This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea. llvm-svn: 160303	2012-07-16 18:19:53 +00:00
Tom Stellard	bcce80fa95	AMDGPU: Add core backend files for R600/SI codegen v6 ... llvm-svn: 160270	2012-07-16 14:17:08 +00:00