7a8cfafd2e
Revert r70876 and add a testcase (@c7) showing the problem:
...
bits captured, but the pointer marked nocapture. In fact
I now recall that this problem is why only readnone functions
returning void were considered before! However keep a small
fix that was also in r70876: a readnone function returning
void can result in bits being captured if it unwinds, so
test for this.
llvm-svn: 71168
2009-05-07 18:08:34 +00:00
17f0f65499
Temporarily revert r71158. It was causing a failure during a full bootstrap:
...
checking for bcopy... no
checking for getc_unlocked... Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decUtility.c:360: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [decUtility.o] Error 1
make[4]: *** Waiting for unfinished jobs....
Assertion failed: (0 && "Unknown SCEV kind!"), function operator(), file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmCore.roots/llvmCore~obj/src/lib/Analysis/ScalarEvolution.cpp, line 511.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvmgcc42.roots/llvmgcc42~obj/src/libdecnumber/decNumber.c:5591: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [decNumber.o] Error 1
make[3]: *** [all-stage2-libdecnumber] Error 2
make[3]: *** Waiting for unfinished jobs....
llvm-svn: 71165
2009-05-07 17:26:14 +00:00
9ba542c325
Make ScalarEvolution's GroupByComplexity more thorough. In addition
...
to sorting SCEVs by their kind, sort SCEVs of the same kind according
to their operands. This helps avoid things like (a+b) being a distinct
expression from (b+a).
llvm-svn: 71160
2009-05-07 14:39:04 +00:00
4f2e69c229
Trim unnecessary headers. Code in Analysis shouldn't use Transforms
...
headers due to library dependencies.
llvm-svn: 71159
2009-05-07 14:30:26 +00:00
e5d2a04ace
Constant-fold ptrtoint+add+inttoptr to gep when the pointer is an
...
array and the add is within range. This helps simplify expressions
expanded by ScalarEvolutionExpander.
llvm-svn: 71158
2009-05-07 14:24:56 +00:00
c6bb55ba53
Factor out a common base class between SCEVCommutativeExpr and
...
SCEVAddRecExpr. This eliminates redundant code for visiting
all the operands of an expression.
llvm-svn: 71157
2009-05-07 14:00:19 +00:00
58f3811300
Move the tablegen-produced DebugLoc handling into a AsmWriter::processDebugLoc function.
...
No functionality change.
llvm-svn: 71156
2009-05-07 13:55:51 +00:00
143bae5dcd
Code refactoring.
...
llvm-svn: 71151
2009-05-07 05:49:39 +00:00
f356a89e92
Rename "loop aligner" pass to "code placement optimization" pass.
...
llvm-svn: 71150
2009-05-07 05:42:24 +00:00
a55d46100e
Eliminate compiler warnings.
...
llvm-svn: 71149
2009-05-07 05:31:56 +00:00
5a2fff718d
Just turn aggressive stack coloring off at -O3.
...
llvm-svn: 71140
2009-05-07 01:33:38 +00:00
6144f63bd5
Temporarily revert r71010. It was causing massive failures during self-hosting.
...
llvm-svn: 71138
2009-05-07 01:27:25 +00:00
baf3fee885
Make DwarfWriter::RecordInlinedFnStart more like the other DwarfWriter's methods:
...
-Have it return a label ID
-Remove the unused Instruction parameter
No functionality change.
llvm-svn: 71132
2009-05-07 00:16:31 +00:00
39b480cea0
Use stable_sort instead of plain sort to avoid the risk of generating
...
trivially different code on different hosts (due to differing
std::sort implementations).
llvm-svn: 71124
2009-05-06 22:54:33 +00:00
4d11693f33
- Move some debug fields to coincide with how GCC emits them. No functionality
...
change.
- Reformatting.
llvm-svn: 71118
2009-05-06 21:21:34 +00:00
364f3efa53
CMake: Updated lib/Target/PIC16/CMakeLists.txt.
...
llvm-svn: 71115
2009-05-06 20:40:05 +00:00
72b6582c0f
Use X86AddrNumOperands instead of magic constant one
...
more place. This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645. At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)
llvm-svn: 71106
2009-05-06 19:04:30 +00:00
cfc0513080
Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
...
llvm-svn: 71098
2009-05-06 18:25:01 +00:00
342053cd27
Unbreak the build.
...
llvm-svn: 71091
2009-05-06 18:00:56 +00:00
0dec5b9a75
Make sure to use signed arithmetic in APInt to fix a regression.
...
llvm-svn: 71090
2009-05-06 17:39:26 +00:00
9a6fef0a52
Simplify code by using SmallVector's pop_back_val() instead of
...
separate back() and pop_back() calls.
llvm-svn: 71089
2009-05-06 17:22:41 +00:00
49518d8f54
CMake: Updated lib/CodeGen/CMakeLists.txt.
...
llvm-svn: 71085
2009-05-06 14:56:40 +00:00
7374a0118d
OCaml parameter attribute bindings from PR2752.
...
Incomplete, but better than nothing.
llvm-svn: 71081
2009-05-06 12:21:17 +00:00
2338f6c57e
Add generic expansion of SUB when ADD and XOR
...
are legal. Based on a patch by Micah Villmow.
llvm-svn: 71078
2009-05-06 11:29:50 +00:00
9759f2e063
Fix PR3754: don't mark functions that wrap MallocInst with
...
the readnone. Since MallocInst is scheduled for deletion
it doesn't seem worth doing anything more subtle, such as
having mayWriteToMemory return true for MallocInst.
llvm-svn: 71077
2009-05-06 08:42:00 +00:00
960ae0660b
Emit banksel and movlp instructions.
...
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.
llvm-svn: 71073
2009-05-06 08:02:01 +00:00
1efabaaa2a
Allow readonly functions to unwind exceptions. Teach
...
the optimizers about this. For example, a readonly
function with no uses cannot be removed unless it is
also marked nounwind.
llvm-svn: 71071
2009-05-06 06:49:50 +00:00
ab68cf24bb
Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.
...
llvm-svn: 71057
2009-05-06 02:36:21 +00:00
e58fc20f8d
Fix a copy+pasto in a comment.
...
llvm-svn: 71035
2009-05-05 23:02:38 +00:00
96b18ccdd3
Delete a FIXME which is no longer relevant, and add a FIXME that is.
...
llvm-svn: 71033
2009-05-05 22:59:55 +00:00
cfdbfccd91
Quotes should be printed before private prefix; some code clean up.
...
llvm-svn: 71032
2009-05-05 22:50:29 +00:00
b24b776208
Add dump method to DIDescriptor.
...
llvm-svn: 71028
2009-05-05 22:19:25 +00:00
bb2f10759e
If a MachineBasicBlock has multiple ways of reaching another block,
...
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.
llvm-svn: 71018
2009-05-05 21:10:19 +00:00
5e2ac0cd9c
Temporarily reverting r71008. It was causing this failure:
...
Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/
CodeGen/X86/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/
CodeGen/X86/change-compare-stride-1.ll
Failed with exit(1) at line 2
while running: grep {cmpq $-478,} change-compare-stride-1.ll.tmp
child process exited abnormally
llvm-svn: 71013
2009-05-05 20:49:46 +00:00
9bf9002161
Enable stack coloring with regs at -O3.
...
llvm-svn: 71010
2009-05-05 20:30:36 +00:00
246a3dfb10
Handle overflow of 64-bit loop conditions.
...
llvm-svn: 71008
2009-05-05 20:22:36 +00:00
be9fa506ad
Add basic support for code generation of
...
addrspace(257) -> FS relative on x86. Patch by Zoltan Varga!
llvm-svn: 70992
2009-05-05 18:52:19 +00:00
a35aed567a
Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.
...
llvm-svn: 70986
2009-05-05 18:18:57 +00:00
929b644b0f
Do not require variable debug info nodes to have a compile unit.
...
For implicit decls like "self" and "_cmd" in ObjC, these decls
should not have a location.
llvm-svn: 70964
2009-05-05 04:55:56 +00:00
6fc03634db
Do not substitute if the new register isn't in the register class of the operand being updated.
...
llvm-svn: 70953
2009-05-05 00:46:16 +00:00
1ff2727c95
Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.
...
llvm-svn: 70950
2009-05-05 00:30:09 +00:00
dbfb102523
Do forward and backward substitution to eliminate loads and stores when possible.
...
llvm-svn: 70937
2009-05-04 23:13:13 +00:00
c298ccb998
- Avoid the longer SIB encoding on x86_64 when it's not needed.
...
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.
llvm-svn: 70929
2009-05-04 22:49:16 +00:00
48f8222293
Re-apply 70645, converting ScalarEvolution to use
...
CallbackVH, with fixes. allUsesReplacedWith need to
walk the def-use chains and invalidate all users of a
value that is replaced. SCEVs of users need to be
recalcualted even if the new value is equivalent. Also,
make forgetLoopPHIs walk def-use chains, since any
SCEV that depends on a PHI should be recalculated when
more information about that PHI becomes available.
llvm-svn: 70927
2009-05-04 22:30:44 +00:00
fc2a8d1eb0
Fix an 80-column violation.
...
llvm-svn: 70925
2009-05-04 22:23:18 +00:00
4b56fab92b
Fix doxygen comment syntax.
...
llvm-svn: 70924
2009-05-04 22:20:30 +00:00
354b12259f
Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it
...
shows up in -print-machineinstrs. This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.
llvm-svn: 70921
2009-05-04 22:10:05 +00:00
a30370bc33
Constify a bunch of SCEV-using code.
...
llvm-svn: 70919
2009-05-04 22:02:23 +00:00
bb525f7e02
X86FastISel doesn't support the -tailcallopt ABI.
...
llvm-svn: 70902
2009-05-04 19:50:33 +00:00
71fb950b73
Restore a comment.
...
llvm-svn: 70900
2009-05-04 19:23:45 +00:00
2d1e7321f6
Fix code emission for conditional branches.
...
Patch by Collin Winter!
llvm-svn: 70898
2009-05-04 19:10:38 +00:00
3f02595048
Use true instead of 1 for a boolean value. And fix a copy+pasto
...
in a comment.
llvm-svn: 70882
2009-05-04 17:25:21 +00:00
630f4e1eb3
Trim unnecessary #includes.
...
llvm-svn: 70880
2009-05-04 17:11:06 +00:00
50c70336b0
Teach capture tracking that readonly functions can
...
only capture their arguments by returning them or
throwing an exception or not based on the argument
value. Patch essentially by Frits van Bommel.
llvm-svn: 70876
2009-05-04 16:50:29 +00:00
fa552d728d
fix some problems spotted by Duncan and Nicolas Geoffray
...
llvm-svn: 70872
2009-05-04 16:29:24 +00:00
9ae29b2d8f
-Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors.
...
-Depend on DebugLocs for source line info.
(Comes with Regression-Be-Gone(tm))
llvm-svn: 70871
2009-05-04 16:23:49 +00:00
3f77805642
Make sure to color with only allocatable registers for the specific register class.
...
llvm-svn: 70821
2009-05-04 03:30:11 +00:00
d579cb1167
* Sink 4 duplicates of edge threading validity checks and DOUT prints into
...
ThreadEdge directly. This shares the code, but is just a refactoring.
* Make JumpThreading compute the set of loop headers and avoid threading
across them. This prevents jump threading from forming irreducible
loops (goodness) but also prevents it from threading in other cases that
are beneficial (see the comment above FindFunctionBackedges).
llvm-svn: 70820
2009-05-04 02:28:08 +00:00
351134ba93
Factor loop backedge finding out of CodeGenPrepare into a new
...
FindFunctionBackedges function.
llvm-svn: 70819
2009-05-04 02:25:58 +00:00
4b6072bcb8
The stack slots which share the same stack slot after coloring can, but do not have to, use the same register. In fact, they each may have different register class requirements.
...
llvm-svn: 70815
2009-05-04 00:24:50 +00:00
79be34012f
Revert r70803 for now, it causes a regression.
...
llvm-svn: 70811
2009-05-03 23:27:19 +00:00
ce7196b903
-Remove the DwarfWriter::RecordSourceLine calls from the instruction selectors.
...
-Depend on DebugLocs for source line info.
llvm-svn: 70803
2009-05-03 22:03:35 +00:00
1de5cf548e
Typo.
...
llvm-svn: 70792
2009-05-03 19:10:11 +00:00
210fc62a91
In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
...
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.
Not yet enabled. This is part 1. More coming.
llvm-svn: 70787
2009-05-03 18:32:42 +00:00
4ff60e0cc2
Handle implicit zext in a better way. Shamelessly stolen from x86 backend.
...
Thanks for Dan Gohman for suggestion!
llvm-svn: 70782
2009-05-03 15:50:18 +00:00
2745bc92fa
Fix typo
...
llvm-svn: 70770
2009-05-03 13:19:57 +00:00
1324f810d7
Update due to mainline API change
...
llvm-svn: 70769
2009-05-03 13:19:42 +00:00
d089ef1003
Add TODO list :)
...
llvm-svn: 70768
2009-05-03 13:19:24 +00:00
47fcd72e24
Make handling of conditional stuff much more straightforward
...
llvm-svn: 70767
2009-05-03 13:19:09 +00:00
dedfa00ba1
Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought
...
llvm-svn: 70766
2009-05-03 13:18:50 +00:00
eb2152f753
Expand divisions into libcalls
...
llvm-svn: 70765
2009-05-03 13:18:33 +00:00
05b7a7c8f8
Properly handle sdiv / udiv / srem / urem libcalls
...
llvm-svn: 70764
2009-05-03 13:18:16 +00:00
29747e9c26
Custom lower SIGN_EXTEND
...
llvm-svn: 70763
2009-05-03 13:17:49 +00:00
3c48ea7dbe
Some eye-candy
...
llvm-svn: 70762
2009-05-03 13:17:31 +00:00
48e21c57f1
Print function header / footer
...
llvm-svn: 70761
2009-05-03 13:17:11 +00:00
8847e3e554
Fix printing: je => jeq
...
llvm-svn: 70760
2009-05-03 13:16:54 +00:00
f3a6bc8562
Add 8bit shifts
...
llvm-svn: 70759
2009-05-03 13:16:37 +00:00
61763b532a
Handle logical shift right (at least I hope so :) )
...
llvm-svn: 70758
2009-05-03 13:16:17 +00:00
20a91130ce
Handle anyext
...
llvm-svn: 70757
2009-05-03 13:15:57 +00:00
e31559576f
Expand all sorts of indirect branches
...
llvm-svn: 70755
2009-05-03 13:15:40 +00:00
41917df643
Add InsertBranch() hook for tail mergeing
...
llvm-svn: 70754
2009-05-03 13:15:22 +00:00
4b0a0f18fb
Implement bswap
...
llvm-svn: 70753
2009-05-03 13:15:03 +00:00
ba0e81d4b2
Properly handle ExternalSymbol's
...
llvm-svn: 70752
2009-05-03 13:14:46 +00:00
de60d1caef
Expand muls (all mulls!) to libcalls for now
...
llvm-svn: 70751
2009-05-03 13:14:25 +00:00
399ad444fd
Proper name 16 bit libcalls
...
llvm-svn: 70750
2009-05-03 13:14:08 +00:00
f3fc92d6fc
Add libcall expansion for 16 and 128 bit muls
...
llvm-svn: 70749
2009-05-03 13:13:51 +00:00
0da755ee3e
Provide addc and subc
...
llvm-svn: 70748
2009-05-03 13:13:34 +00:00
a3f7a83ad8
Add left shift
...
llvm-svn: 70747
2009-05-03 13:13:17 +00:00
aa43d0b182
Add direct branch
...
llvm-svn: 70746
2009-05-03 13:12:58 +00:00
24bfb51416
It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed.
...
llvm-svn: 70745
2009-05-03 13:12:37 +00:00
b6321e15f7
Lower select with custom inserted and make condjumps generic
...
llvm-svn: 70744
2009-05-03 13:12:23 +00:00
962720129d
Add first draft for conditions, conditional branches, etc
...
llvm-svn: 70743
2009-05-03 13:12:06 +00:00
aa51bff808
Hanle i8 returns
...
llvm-svn: 70742
2009-05-03 13:11:48 +00:00
7212c15e70
Small tweaking
...
llvm-svn: 70741
2009-05-03 13:11:35 +00:00
f2b50994ca
Add prologue/epilogue emission. Fix frame pointer handling.
...
llvm-svn: 70740
2009-05-03 13:11:20 +00:00
1af0b61e7c
Add code for save/restore of callee-saved registers
...
llvm-svn: 70739
2009-05-03 13:11:04 +00:00
b85f4ec819
Two more hooks for RA and FP registers
...
llvm-svn: 70738
2009-05-03 13:10:40 +00:00
7784ae9a6f
Proper handle loading of effective address of stack slot stuff
...
llvm-svn: 70737
2009-05-03 13:10:26 +00:00
0d1234fd69
Match frame indexes
...
llvm-svn: 70736
2009-05-03 13:10:11 +00:00
f6af822c76
First draft of stack slot loads / stores lowering
...
llvm-svn: 70735
2009-05-03 13:09:57 +00:00
Duncan Sands