Commit Graph

379370 Commits

Author SHA1 Message Date
Jinsong Ji 9202806241 Revert "[CostModel] Remove VF from IntrinsicCostAttributes"
This reverts commit 502a67dd7f.

This expose a failure in test-suite build on PowerPC,
revert to unblock buildbot first,
Dave will re-commit in https://reviews.llvm.org/D96287.

Thanks Dave.
2021-02-09 02:14:14 +00:00
Richard Smith 21e8bb8325 PR48606: The lifetime of a constexpr heap allocation always started
during the same evaluation.

It looks like the only case for which this matters is determining
whether mutable subobjects of a heap allocation can be modified during
constant evaluation.
2021-02-08 17:58:05 -08:00
Richard Smith c945dc4a50 PR48587: is_constant_evaluated() should not evaluate to true during a
variable's destruction if it didn't do so during construction.

The standard doesn't give any guidance as to what to do here, but this
approach seems reasonable and conservative, and has been proposed to the
standard committee.
2021-02-08 17:34:40 -08:00
Fangrui Song 3e837e1735 [llvm-objcopy][test] Stablize build-id-link-dir.test 2021-02-08 17:22:22 -08:00
LLVM GN Syncbot 71a79e7b4b [gn build] Port 87104faac4 2021-02-09 01:14:44 +00:00
Greg McGary 87104faac4 [lld-macho] Add ARM64 target arch
This is an initial base commit for ARM64 target arch support. I don't represent that it complete or bug-free, but wish to put it out for review now that some basic things like branch target & load/store address relocs are working.

I can add more tests to this base commit, or add them in follow-up commits.

It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated.

Differential Revision: https://reviews.llvm.org/D88629
2021-02-08 18:14:07 -07:00
Sam Clegg 01a48535c3 [MC][WebAssembly] Fix provisional values for data alias relocations
When calculating the symbol offsets to write as provisitonal values
in object files we are only interested in the offset of the symbol
itself.  For aliases this offset already includes the offset of the
base symbol.

The testin question was added back in https://reviews.llvm.org/D87407
but I believe the expectations here were incorrect.   sym_a lives
at offset 4 and sym_b lives 4 bytes into that (should be 8).

The addresses of the 3 symbosl in this object file are:

foo  : 0
sym_a: 4
sym_b: 8

Differential Revision: https://reviews.llvm.org/D96234
2021-02-08 16:56:57 -08:00
Craig Topper 622611f7e5 [TableGen] Use return value from EmitVBRValue instead of calling GetVBRSize on the same value. Consistently use unsigned for child sizes. NFCI
getSize and setSize both use unsigned. So size_t doesn't
increase range here and might get truncated if passed to
setSize.

Also not sure why EmitVBRValue was returning uint64_t, but used
an unsigned to supply the value.
2021-02-08 16:34:35 -08:00
Uday Bondhugula 333d2cfc70 [MLIR][NFC] Fix std.copysign op documentation
Fix std.copysign op documentation. NFC.

Differential Revision: https://reviews.llvm.org/D96217
2021-02-09 05:59:05 +05:30
Yaxun (Sam) Liu 52f312c69e Fix failure in cuda-external-tools.cu
-fgpu-rdc is output in different order
2021-02-08 19:27:43 -05:00
LemonBoy 45e33e8ba9 [SPARC] Recognize and handle the %lm(sym) operator
Reviewed By: joerg

Differential Revision: https://reviews.llvm.org/D77737
2021-02-08 19:25:33 -05:00
Jameson Nash 10c1d290d9 Revert "Renovate CMake files in the `llvm-exegesis` tool."
This reverts commit 549a1e2e59.

I see some buildbot failures, so reverting while I look into them.
2021-02-08 19:12:08 -05:00
Argyrios Kyrtzidis a8cb39bab0 Make sure a module file with errors produced via '-fallow-pcm-with-compiler-errors' can be loaded when using implicit modules
A module with errors would be marked as out-of-date, then the `compilerModule` action would produce it, but due to the error it would be treated as failure and the resulting PCM would not get used.

rdar://74087062

Differential Revision: https://reviews.llvm.org/D96246
2021-02-08 16:10:39 -08:00
Yaxun (Sam) Liu 1dab94f9ed [CUDA][HIP] Pass -fgpu-rdc to host clang -cc1
Currently -fgpu-rdc is not passed to host clang -cc1.
This causes issue because -fgpu-rdc affects shadow
variable linkage in host compilation.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D96105
2021-02-08 19:08:20 -05:00
Eric Schweitz 2cd0a113df [flang][fir] Add OpaqueAttr.
Add the opaque attribute class used in flang.

https://github.com/flang-compiler/f18-llvm-project/pull/402

Differential Revision: https://reviews.llvm.org/D96293
2021-02-08 16:02:22 -08:00
Jameson Nash 16e7973c5d Renovate CMake file for the `llvm-cfi-verify` tool
Hopefully this is the non-problematic part from https://reviews.llvm.org/rL342148, which later got reverted in r342336 (b09a8c9bd9) due to problems with the llvm-exegesis part of the change. That part would also still be desirable, but currently appears not to be possible (https://reviews.llvm.org/D81922).

I think this should replace https://reviews.llvm.org/D44650, per Keno's comment there.

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D90969
2021-02-08 18:20:38 -05:00
Jameson Nash 549a1e2e59 Renovate CMake files in the `llvm-exegesis` tool.
This attempts to move all tools over to using `add_llvm_library` for
better consistency. After doing this, I noticed it ended up as nearly a
reimplementation of https://reviews.llvm.org/rL342148, which later got
reverted in r342336 (b09a8c9bd9).

With ccache and ninja on a large core machine (40), I haven't run into
build errors, so I'm hopeful it's better now, though it doesn't seem to
be any different / new.

Reviewed By: stephenneuendorffer

Differential Revision: https://reviews.llvm.org/D90970
2021-02-08 18:06:07 -05:00
Hsiangkai Wang a5b07a221a [RISCV] Initial support of LoopVectorizer for RISC-V Vector.
Define an option -riscv-vector-bits-max to specify the maximum vector
bits for vectorizer. Loop vectorizer will use the value to check if it
is safe to use the whole vector registers to vectorize the loop.

It is not the optimum solution for loop vectorizing for scalable vector.
It assumed the whole vector registers will be used to vectorize the code.
If it is possible, we should configure vl to do vectorize instead of
using whole vector registers.

We only consider LMUL = 1 in this patch.

This patch just an initial work for loop vectorizer for RISC-V Vector.

Differential Revision: https://reviews.llvm.org/D95659
2021-02-09 06:32:18 +08:00
Matt Arsenault 87e280110d GlobalISel: Use correct calling convention in handleAssignments
This was using the calling convention of the calling function, not the
callee. Avoids regressions in a future patch.
2021-02-08 17:09:28 -05:00
Matt Arsenault bcf723b2fd AMDGPU: Stop adding stack passed wide arguments to call conv handler
The generated calling convention code shouldn't see these types since
we split large types into 32-bit chunks before the calling convention
code is triggered.

GlobalISel ends up directly calls the generated CC code before
checking for the register count breakdown. Arguably this difference is
a bug, but this was dead code for the DAG anyway.
2021-02-08 17:09:28 -05:00
Matt Arsenault e855cc6d04 AMDGPU/GlobalISel: Remove dead check prefixes 2021-02-08 17:09:28 -05:00
Arthur Eubanks e84a4650eb [NVPTX][NewPM] Re-enable NVVMReflectPass
Disabled alongside NVVMIntrRangePass in https://reviews.llvm.org/D96166,
but turns out NVVMIntrRangePass was the issue.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D96291
2021-02-08 13:58:17 -08:00
Eric Schweitz e892109c3e [flang][NFC] Add comment. 2021-02-08 13:49:16 -08:00
Fangrui Song 830ead58fe [test] Fix unused check prefixes 2021-02-08 13:44:30 -08:00
Fangrui Song 87dbdd2e3b [FileCheck] Default --allow-unused-prefixes to false
Link: https://lists.llvm.org/pipermail/llvm-dev/2020-October/146162.html "[RFC] FileCheck: (dis)allowing unused prefixes"

If a downstream project using lit needs time for transition,
add the following to `lit.local.cfg`:

```
from lit.llvm.subst import ToolSubst

fc = ToolSubst('FileCheck', unresolved='fatal')
config.substitutions.insert(0, (fc.regex, 'FileCheck --allow-unused-prefixes'))
```

Differential Revision: https://reviews.llvm.org/D95849
2021-02-08 13:37:04 -08:00
Fangrui Song ad60802a71 [Verifier] Allow DW_TAG_class_type/DW_TAG_union_type to have no filename
`clang/lib/CodeGen/CGOpenMPRuntime.cpp` synthesized union
(`distinct !DICompositeType(tag: DW_TAG_union_type, name: "kmp_cmplrdata_t", size: 64, elements: <0x62b690>)`)
does not have meaningful filename/line number.

D94735 dropped the previously arbitrary and untested filename/line from the union and caused a verifier error here.

This fixes `check-libarcher` failures.

Differential Revision: https://reviews.llvm.org/D96212
2021-02-08 13:31:05 -08:00
David Green 0c7e044a7f [ARM] One-off identity shuffle
A One-Off Identity mask is a shuffle that is mostly an identity mask
from as single source but contains a single element out-of-place, either
from a different vector or from another position in the same vector. As
opposed to lowering this via a ARMISD::BUILD_VECTOR we can generate an
extract/insert pair directly. Under ARM with individually accessible
lane elements this often becomes a simple lane move.

This also alters the LowerVECTOR_SHUFFLEUsingMovs code to use v4f32 (not
v4i32), a more natural type for lane moves.

Differential Revision: https://reviews.llvm.org/D95551
2021-02-08 21:24:32 +00:00
Arthur Eubanks 0eda454796 [SimpleLoopUnswitch] Don't non-trivially unswitch loops that are unsafe to clone
Non-trivial unswitching can clone loops.

The legacy -loop-unswitch pass also checks for this.

Fixes PR49085.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D96288
2021-02-08 13:19:24 -08:00
Nico Weber 69f5bd2ec5 [gn build] reformat all gn files
$ git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format
2021-02-08 16:11:01 -05:00
Markus Böck 99dfcfd14c [CMake] [MinGW] Enable use of LLVM_USE_SANITIZER in a MinGW environment
Currently using LLVM_USE_SANITIZER with a MinGW target leads to a fatal
configuration error due to an unsupported platform. MinGW targets on
clang however implement a few sanitizers, currently ASAN and UBSAN.

This patch enables LLVM_USE_SANITIZER in a MinGW environment as well.

Differential Revision: https://reviews.llvm.org/D95750
2021-02-08 23:04:50 +02:00
Amara Emerson ec41ed5b1b [AArch64][GlobalISel] Support the 'returned' parameter attribute.
On AArch64 (which seems to be the only target that supports it), this
attribute allows codegen to avoid saving/restoring the value in x0
across a call.

Gives a 0.1% geomean -Os code size improvement on CTMark.

Differential Revision: https://reviews.llvm.org/D96099
2021-02-08 12:47:39 -08:00
Nico Weber 3d471d7f06 Revert "[Test] Add failing test for PR49087"
This reverts commit 0fc1738eb7.
The test passes (unexpectedly, due to the XFAIL: *) when x86 isn't
the default triple (such as on an arm machine).
2021-02-08 15:46:29 -05:00
Martin Storsjö 71c29b4cf3 [AArch64] Use '//' as comment string for MSVC assembly
As the actual MSVC toolset doesn't use the GAS-style assembly that
Clang/LLVM produces and consumes, there's no reference for what
string to use for e.g. comments when building with a MSVC triple.

This frees up the use of semicolon as separator string, just like
was done for GNU targets in 2341319564.
(Previously, both the separator and comment strings were set to
the same, a semicolon.)

Compiler-rt extensively uses separator chars in its assembly,
and that assembly should be buildable with clang-cl for MSVC too.

Differential Revision: https://reviews.llvm.org/D96259
2021-02-08 22:30:14 +02:00
Fangrui Song 6d766c8bf9 DebugInfo/Symbolize: Allow STT_NOTYPE/STT_GNU_IFUNC symbols for .symtab symbolization
In assembly files, omitting `.type foo,@function` is common. Such functions have
type `STT_NOTYPE` and llvm-symbolizer reports `??` for them.

An ifunc symbol usually has an associated resolver symbol which is defined at
the same address. Returning either one is fine for symbolization. The resolver
symbol may not end up in the symbol table if (object file) `.L` is used (linked
image) .symtab is stripped while .dynsym is retained.

This patch allows ELF STT_NOTYPE/STT_GNU_IFUNC symbols for .symtab symbolization.

I have left TODO in the test files for an unimplemented STT_FILE heuristic.

Differential Revision: https://reviews.llvm.org/D95916
2021-02-08 12:29:11 -08:00
Roland McGrath 4c9adbb287 [scudo/standalone] Use .arch_extension memtag, not mte
GNU binutils accepts only `.arch_extension memtag` while Clang
accepts either that or `.arch_extension mte` to mean the same thing.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D95996
2021-02-08 12:24:47 -08:00
Eric Schweitz bdf3ad582e [flang][NFC] Update comments. 2021-02-08 12:11:49 -08:00
Jon Chesterfield 2fa4186d4e [libomptarget][amdgcn] Fix language linkage post D95300, drop use of assert 2021-02-08 20:07:51 +00:00
Jianzhou Zhao 64b448b983 [dfsan] Refactor visitCallBase
To simplify the review of https://reviews.llvm.org/D95835.

Reviewed-by: morehouse

Differential Revision: https://reviews.llvm.org/D96177
2021-02-08 19:55:18 +00:00
Jez Ng ac9dd247da [lld-macho] Try to make ubsan happy
Summary: We should avoid passing a null pointer to memcpy.
2021-02-08 14:51:36 -05:00
Craig Topper b49aaed8c7 [RISCV] Use _COMMUTABLE fma pseudos for fixed vectors.
This matches what we do in the VLMAX SDNode patterns.
2021-02-08 11:27:23 -08:00
Mitch Phillips 3d8823b8e4 [GWP-ASan] Add aligned allocations.
Adds a new allocation API to GWP-ASan that handles size+alignment
restrictions.

Reviewed By: cryptoad, eugenis

Differential Revision: https://reviews.llvm.org/D94830
2021-02-08 11:22:29 -08:00
Mircea Trofin f31ea86c80 Revert "[Utils] Add a switch controlling prefix warnings in UpdateTestChecks"
This reverts commit 87f8a08ce3.
2021-02-08 11:21:56 -08:00
Craig Topper 8d8cafa32e [RISCV] Add support for splat fixed length build_vectors using RVV.
Building on the fixed vector support from D95705

I've added ISD nodes for vmv.v.x and vfmv.v.f and switched to
lowering the intrinsics to it. This allows us to share the same
isel patterns for both.

This doesn't handle splats of i64 on RV32 yet. The build_vector
gets converted to a vXi32 build_vector+bitcast during type
legalization. Not sure the best way to handle this at the moment.

Differential Revision: https://reviews.llvm.org/D96108
2021-02-08 11:12:56 -08:00
Craig Topper b8d719fbe8 [RISCV] Add support for fixed vector FMA.
Follow up to D95705. Does not include the commuting support from D95800.

Differential Revision: https://reviews.llvm.org/D96103
2021-02-08 11:12:56 -08:00
Nicolas Vasilache d57a305fdf [mlir][Linalg] Fix padding related bugs.
This revision fixes the fact that the padding transformation did not have enough information to set the proper type for the padding value.
Additionally, the verifier for Yield in the presence of PadTensorOp is fixed to properly report incorrect number of results or operands. Previously, the error would be silently ignored which made the core issue difficult to debug.

Differential Revision: https://reviews.llvm.org/D96264
2021-02-08 18:59:24 +00:00
Jez Ng 5112035751 [lld-macho] Emit LSDA info in compact unwind
The LSDA pointers are encoded as offsets from the image base,
and arranged in one big contiguous array. Each second-level page records
the offset within that LSDA array which corresponds to the LSDA for its
first CU entry.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D95810
2021-02-08 13:48:00 -05:00
Jez Ng 525bfa10ec [lld-macho] Emit personalities in compact unwind
Note that there is a triple indirection involved with
personalities and compact unwind:

1. Two bits of each CU encoding are used as an offset into the
   personality array.
2. Each entry of the personality array is an offset from the image base.
   The resulting address (after adding the image base) should point within the
   GOT.
3. The corresponding GOT entry contains the actual pointer to the
   personality function.

To further complicate things, when the personality function is in the
object file (as opposed to a dylib), its references in
`__compact_unwind` may refer to it via a section + offset relocation
instead of a symbol relocation. Since our GOT implementation can only
create entries for symbols, we have to create a synthetic symbol at the
given section offset.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D95809
2021-02-08 13:47:59 -05:00
Craig Topper a719b667a9 [RISCV] Add initial support for converting fixed vectors to scalable vectors during lowering to use RVV instructions.
This is an alternative to D95563.

This is modeled after a similar feature for AArch64's SVE that uses
predicated scalable vector instructions.a

Rather than use predication, this patch uses an explicit VL operand.
I've limited it to always use LMUL=1 for now, but we can improve this
in the future.

This requires a bunch of new ISD opcodes to carry the VL operand.
I think we can probably lower intrinsics to these ISD opcodes to
cut down on the size of the isel table. Which is why I've added
patterns for all integer/float types and not just LMUL=1.

I'm only testing one vector width right now, but the width is
programmable via the command line.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D95705
2021-02-08 10:41:30 -08:00
Fangrui Song eea34aae2e [ELF] Inspect -EL & -EB for OUTPUT_FORMAT(default, big, little)
Choose big if -EB is specified, little if -EL is specified, or default if neither is specified.
The new behavior matches GNU ld.

Fixes: https://github.com/ClangBuiltLinux/linux/issues/1025

Differential Revision: https://reviews.llvm.org/D96214
2021-02-08 10:34:57 -08:00
Alex Zinenko 2b92f21c6e [mlir] Drop deprecated syntax for LLVM dialect types
After the LLVM dialect types were ported to use built-in types, the parser kept
supporting the old syntax for LLVM dialect types to produce built-in types for
compatibility. Drop this support.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D96275
2021-02-08 19:26:21 +01:00