Commit Graph

383654 Commits

Author SHA1 Message Date
Stefan Pintilie 91f4c11133 [PowerPC] Add mprivileged option
Add an option to tell the compiler that it can use privileged instructions.

This patch only adds the option. Backend implementation will be added in a
future patch.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D99193
2021-03-24 08:33:22 -05:00
Vinicius Tinti 804ff7f293 [llvm-objdump] Implement --prefix-strip option
The option `--prefix-strip` is only used when `--prefix` is not empty.
It removes N initial directories from absolute paths before adding the
prefix.

This matches GNU's objdump behavior.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D96679
2021-03-24 13:22:35 +00:00
Haojian Wu cfc36bf017 [clang] Treat variable-length array of incomplete element type as
incomplete type.

Differential Revision: https://reviews.llvm.org/D99165
2021-03-24 14:22:15 +01:00
Joseph Huber 8140d0ec4a [OpenMP] Change OMPIRBuilder to append function attributes
Summary:
Currently the OMPIRBuilder overwrites the function's existing attributes
when it assigns the ones defined in OMPKinds.def. This changes the
behaviour to append the current function's attributes with them instead.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D98740
2021-03-24 09:08:29 -04:00
Anastasia Stulova d1c8a151df [OpenCL] Added distinct file extension for C++ for OpenCL.
Files compiled with C++ for OpenCL mode can now have a distinct
file extension - clcpp, then clang driver picks the compilation
mode automatically (-x clcpp) without the use of -cl-std=clc++.

Differential Revision: https://reviews.llvm.org/D96771
2021-03-24 13:07:04 +00:00
Alexey Bataev 2f1b439089 [LoopAnalysis][NFC]Remove redundant code.
Removed redundant code for IsConsecutive variable.
2021-03-24 05:37:19 -07:00
Nico Weber 1ad9c95a45 [gn build] port 1d8fc086ae 2021-03-24 08:29:34 -04:00
Nicolas Vasilache 7716e5535c [mlir] Fixes to hoist padding
Fix the BlockAndValueMapping update that was missing entries for scf.for op's blockIterArgs.
Skip cloning subtensors of the padded tensor as the logic for these is separate.
Add a filter to drop side-effecting ops.

Tests are beefed up to verify the IR is sound in all hoisting configurations for 2-level 3-D tiled matmul.

Differential Revision: https://reviews.llvm.org/D99255
2021-03-24 11:51:28 +00:00
Simon Pilgrim e9015bd595 [X86][AVX] lowerShuffleAsBroadcast - MOVDDUP(SCALAR_TO_VECTOR(X)) -> BROADCAST(X)
Prefer broadcast from scalar on AVX targets as this makes it easier for later folds to strip away bitcasts etc.

This helps a lot with the AVX1 poor codegen from PR49658.

There's a trivial regression in bitcast-int-to-vector-bool-*ext.ll tests due to SimplifyDemandedBits not being able to see a multi-use case, but there's bigger existing codegen issues to be addressed first in those tests (unnecessary NOTs).
2021-03-24 11:31:56 +00:00
Andrea Di Biagio 97a00b7b20 [MCA] Fix for uninitialised member in constructor. NFC 2021-03-24 11:21:59 +00:00
Simon Pilgrim c1ef642ad8 [X86] Remove unused 'OneUse' option from IsNOT helper. NFCI. 2021-03-24 11:14:38 +00:00
Simon Pilgrim 69b71d245f [X86][AVX] Cleanup gather_v8i32_v8i32 special test case
Cleanup the gather_v8i32_v8i32 IR to more closely match how the middle-end will optimise the vector geps (exposing more splats).

This helps the gather scalarization case a lot, but shows a missed opportunity for AVX512 gathers to recognise uniform-constant indices.

And none of the cases realise that some of the gathers are really blended broadcasts....
2021-03-24 11:14:38 +00:00
alex-t dccf83acf9 [AMDGPU] SIOptimizeExecMaskingPreRA should check constant bus constraint when folds EXEC copy
Folding EXEC copy into it's single use may lead to constant bus constraint violation as it adds one more SGPR operand.
         This change makes it validate the user instruction with the new SGPR operand and only fold it if it is legal.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D98888
2021-03-24 14:14:13 +03:00
David Zarzycki 952bc6c92e Revert "[lldb/Plugins] Add ScriptedProcess Process Plugin"
This reverts commit dd391e1ef7.

This patch causes 17 LLDB test regressions on Fedora 33 (x86-64).
2021-03-24 07:07:22 -04:00
Florian Hahn cd0c00c9fe
[LV] Move exact FP math check out of Requirements.
We know if the loop contains FP instructions preventing vectorization
after we are done with legality checks. This patch updates the code the
check for un-vectorizable FP operations earlier, to avoid unnecessarily
running the cost model and picking a vectorization factor. It also makes
the code more direct and moves the check to a position where similar
checks are done.

I might be missing something, but I don't see any reason to handle this
check differently to other, similar checks.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D98633
2021-03-24 11:01:44 +00:00
Jan Svoboda 772e9f88dd [clang][deps] NFC: Document collector, rename members
This patch documents how `ModuleDepCollector{,PP}` work and what their members store. Also renames somewhat vague `MainDeps` to `FileDeps` and `Deps` to `ModularDeps`.

Depends on D98943.

Reviewed By: Bigcheese

Differential Revision: https://reviews.llvm.org/D98950
2021-03-24 11:58:43 +01:00
Jan Svoboda 3190cf2017 [clang][deps] NFC: Extract ModuleID struct
This patch extracts the `ModuleName` and `ContextHash` members of `ClangModuleDep`, `FullDependencies` and `ModuleDeps` into a single struct `ModuleID`. This makes it easier to understand how the full dependency graph works.

Reviewed By: Bigcheese, dexonsmith

Differential Revision: https://reviews.llvm.org/D98943
2021-03-24 11:57:43 +01:00
Andrew Savonichev 292da93d59 [MCA] Disable RCU for InOrderIssueStage
This is a follow-up for:
D98604 [MCA] Ensure that writes occur in-order

When instructions are aligned by the order of writes, they retire
in-order naturally. There is no need for an RCU, so it is disabled.

Differential Revision: https://reviews.llvm.org/D98628
2021-03-24 13:54:04 +03:00
Stefan Pintilie 0e4f5f3ea6 [PowerPC] Change option to mrop-protect
In order to have the same option on power PC LLVM and power PC gcc
the option will be changed from -mrop-protection to -mrop-protect.

The feature will be off by default and turned on when the option is used.

Reviewed By: lei, amyk

Differential Revision: https://reviews.llvm.org/D99185
2021-03-24 05:51:35 -05:00
Gabor Marton f8a850ccf4 [Analyzer][NFC] Fix typos in comments 2021-03-24 11:46:10 +01:00
Ella Ma 1d8fc086ae [clang][lit] Allow test cases to use the compiler that are used to compile Clang
Required by D83660.
Test cases may want to use the host compiler to compile some mocks for the
test case.

This patch adds two substitutions `%host_cc` and `%host_cxx` to use the host
compilers set via variable `CMAKE_C_COMPILER` and `CMAKE_CXX_COMPILER`.

Patch by Ella Ma!

Reviewed By: steakhal

Differential Revision: https://reviews.llvm.org/D98918
2021-03-24 11:32:57 +01:00
Roman Lebedev 760f4c2069
[NFC][PhaseOrdering] Add a testcase for additional LICM before LoopRotate (D99249/D99204) 2021-03-24 13:24:09 +03:00
Vladislav Vinogradov 18a2f479bf [mlir][NFC] Replace `getMemorySpaceAsInt` with `getMemorySpace` where possible
Use new `MemRefType::getMemorySpace` method with generic Attribute
in cases, where there is no specific logic around the memory space.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D99154
2021-03-24 13:23:59 +03:00
Ta-Wei Tu 4d9d736875 [NFC] Improve debug message and test description in 4c1f74a 2021-03-24 18:21:13 +08:00
Ta-Wei Tu 4c1f74a76c [LoopFlatten] Fix invalid assertion (PR49571)
The `InductionPHI` is not necessarily the increment instruction, as
demonstrated in pr49571.ll.
This patch removes the assertion and instead bails out from the
`LoopFlatten` pass if that happens.

This fixes https://bugs.llvm.org/show_bug.cgi?id=49571

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D99252
2021-03-24 18:08:27 +08:00
Ta-Wei Tu 8fde25b3c3 [NFC] Remove redundant `struct` prefix
Reviewed By: SjoerdMeijer, fhahn

Differential Revision: https://reviews.llvm.org/D99251
2021-03-24 17:58:33 +08:00
Martin Storsjö b6c4b280a0 [libcxx] [test] Add return values after assert(false) in some experimental tests
When building in MSVC mode (in release mode), the assert(false) don't
make the end of the function unreachable, so add return statements to
silence compiler warnings (treated as errors).

Also change 'virtual' into 'override', which was requested in review,
as these files require C++11.

Differential Revision: https://reviews.llvm.org/D99214
2021-03-24 11:44:01 +02:00
Raphael Isemann c68a645acb [lldb] Add llgs_test decorator back to TestAutoInstallMainExecutable
This got removed in 68bb51acd5 and this enabled
the test on macOS (where it just causes lldb-server to crash). Re-adding the
decorator to get the tests passing again.
2021-03-24 10:36:01 +01:00
Jason Molenda 3bc65a946e Handle a LC_NOTE main bin spec for user process corefiles
I was playing around with main bin spec LC_NOTEs and noticed
a small oversight in the parsing of user process corefile notes.
2021-03-24 02:18:17 -07:00
Nigel Perks c1fa0ba1f0 [XCore][Test] XFAIL tests requiring 8-byte stack alignment.
XCore default subtarget does not support 8-byte stack alignment. These failures
can be seen on builder clang-xcore-ubuntu-20-x64 on staging buildbot.

Differential Revision: https://reviews.llvm.org/D99092
2021-03-24 09:12:53 +00:00
Yvan Roux 608ee3593c [AArch64][ASAN] Re-enable fgets_fputs.cpp test.
Now that AArch64 mapping symbols are correctly handled by
llvm-symbolizer this test can be re-enabled on that target.
2021-03-24 10:06:04 +01:00
Andy Wingo c9801db2eb [WebAssembly][MC] Record limit constraints for table sizes
This commit adds a full WasmTableType to MCSymbolWasm, differing from
the current situation (just an ElemType) in that it additionally records
a WasmLimits.

We add support for specifying the limits in .S files also, via the
following syntax variations:

  .tabletype SYM, ELEMTYPE
  .tabletype SYM, ELEMTYPE, MINSIZE
  .tabletype SYM, ELEMTYPE, MINSIZE, MAXSIZE

Depends on D99186.

Differential Revision: https://reviews.llvm.org/D99191
2021-03-24 09:44:22 +01:00
Mehdi Amini d905c10353 Add a mechanism for Dialects to provide a fallback for OpInterface
This mechanism makes it possible for a dialect to not register all
operations but still answer interface-based queries.
This can useful for dialects that are "open" or connected to an external
system and still interoperate with the compiler. It can also open up the
possibility to have a more extensible compiler at runtime: the compiler
does not need a pre-registration for each operation and the dialect can
inject behavior dynamically.

Reviewed By: rriddle, jpienaar

Differential Revision: https://reviews.llvm.org/D93085
2021-03-24 08:41:40 +00:00
Balázs Kéri f6cdb2c0a7 [clang][ASTImporter] Add import of DeducedTemplateSpecializationType.
Reviewed By: shafik

Differential Revision: https://reviews.llvm.org/D99188
2021-03-24 09:43:58 +01:00
Andy Wingo 9ac5620cb8 [WebAssembly] Rename WasmLimits::Initial to ::Minimum. NFC.
This patch renames the "Initial" member of WasmLimits to the name used
in the spec, "Minimum".

In the core WebAssembly specification, the Limits data type has one
required "min" member and one optional "max" member, indicating the
minimum required size of the corresponding table or memory, and the
maximum size, if any.

Although the WebAssembly spec does instantiate locally-defined tables
and memories with the initial size being equal to the minimum size, it
can't impose such a requirement for imports.  It doesn't make sense to
require an initial size for a memory import, for example.  The compiler
can only sensibly express the minimum and maximum sizes.

See
https://github.com/WebAssembly/js-types/blob/master/proposals/js-types/Overview.md#naming-of-size-limits
for a related discussion that agrees that the right name of "initial" is
"minimum" when querying the type of a table or memory from JavaScript.
(Of course it still makes sense for JS to speak in terms of an initial
size when it explicitly instantiates memories and tables.)

Differential Revision: https://reviews.llvm.org/D99186
2021-03-24 09:10:11 +01:00
Fangrui Song 7c5222e4d1 [Driver] Bring back i586-linxu-gnu
This is used by Fuchsia for a Debian jessie based sysroot.
2021-03-23 23:37:43 -07:00
Jason Molenda a0793cb1f1 Update SafeMachO.h to #undefine more names
Depending on include order, these can cause build errors when
including the llvm MachO.h where these are defined as enums.
Update the list to include some more names.
2021-03-23 23:34:22 -07:00
Jim Lin 503f1d845f [RISCV] Add HasStdExtD predicate to copysign from double and to double patterns
Copysign from double and to double patterns have lack of HasStdExtD predicate.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D99234
2021-03-24 14:29:23 +08:00
Alex Orlov 876435c487 * Fix demangling of optional template-args for vendor extended type qualifier.
This fixes https://bugs.llvm.org/show_bug.cgi?id=48009 bug.

Reviewed By: erik.pilkington, krisb

Differential Revision: https://reviews.llvm.org/D98687
2021-03-24 10:21:32 +04:00
Fangrui Song 0361e64975 [Driver] Gnu.cpp: remove unneeded getMultiarchTriple normalization 2021-03-23 23:12:19 -07:00
Michael Kruse 8796451d6e [Polly] Port DeadCodeElim to the NewPM. 2021-03-24 01:01:29 -05:00
Chuanqi Xu 3b83590cb2 [NFC] [Support] Fix unconsistent comment with codes for ExtendSigned 2021-03-24 13:58:54 +08:00
Nemanja Ivanovic 4020932706 [PowerPC] Make altivec.h work with AIX which has no __int128
There are a number of functions in altivec.h that use
vector __int128 which isn't supported on AIX. Those functions
need to be guarded for targets that don't support the type.
Furthermore, the functions that produce quadword instructions
without using the type need a builtin. This patch adds the
macro guards to altivec.h using the __SIZEOF_INT128__ which
is only defined on targets that support the __int128 type.
2021-03-24 00:35:51 -05:00
Max Kazantsev 85cbfe75af [NFC] Fix comment describing what EdgeBundles is
The original comment says the same thing twice, and does not mention that
edges entering the block are also in the same bundle (which seems true from
what the underlying code is doing).

Differential Revision: https://reviews.llvm.org/D99144
Reviewed By: RKSimon
2021-03-24 11:04:05 +07:00
Serguei Katkov 311d81ce97 [RegAlloc] Fix "ran out of regs" with uses in statepoint
Statepoint instruction is known to have a variable and big number of operands.
It is possible that Register Allocator will split live intervals in the way that all
physical registers are occupied by "zero-length" live intervals which are marked
as not-spillable.
While intervals are marked as not-spillable in the moment of creation when they are
really zero-length it is possible that in future as part of re-materialization there will
need for physical register between def and use of such tiny interval (the use is not
related to this interval at all).
As all physical registers are assigned to not-spillable intervals there is not avaialbe
registers and RA reports an error.

The idea of the fix is avoid marking tiny live intervals where there is a use in statepoint
instruction in var args section. Such interval may be perfectly spilled and folded to
operand of statepoint.

Reviewers: reames, dantrushin, qcolombet, dsanders, dmgreen
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D98766
2021-03-24 10:25:34 +07:00
Craig Topper 6204ac4536 [X86] Bale out of X86FastISel::X86SelectCmp for vectors.
None of the code in this function was written to handle
vectors.  Most of the cases already fail for vectors for one
reason or another. The exception is an optimization that
detects identical operands. This can be triggered by vectors,
but the code always creates a 0 or 1 constants in a scalar
register which is incorrect for vectors.

Fixes PR49706.
2021-03-23 20:16:04 -07:00
Zequan Wu aae84b8e39 Revert "[Driver] Bring back "Clean up Debian multiarch /usr/include/<triplet> madness" and restore i586-linux-gnu"
This breaks bots in chromium goma building.

This reverts commit 424bf5d891.
2021-03-23 20:12:09 -07:00
Zakk Chen 88c2d4c8eb [RISCV][Clang] Add RVV Vector Indexed Load intrinsic functions.
Support Complex type transformer to define more complexity legal type.

Overall our downstream implementation there are only four instructions need to
use complex type transformer, it's not a common case.
I still feel using a string for prototypes is simple and clear.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D98848
2021-03-23 19:18:50 -07:00
Vitaly Buka 54a40606e8 [NFC] Clang-format includes 2021-03-23 19:11:36 -07:00
Yang Fan 279d74ffd1
[InstSimplify] Fix unused variable warning (NFC)
GCC warning:
```
/llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp: In function ‘llvm::Value* SimplifyWithOpReplaced(llvm::Value*, llvm::Value*, llvm::Value*, const llvm::SimplifyQuery&, bool, unsigned int)’:
/llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp:3993:15: warning: unused variable ‘SI’ [-Wunused-variable]
 3993 |     if (auto *SI = dyn_cast<SelectInst>(I))
      |               ^~
```
2021-03-24 09:56:36 +08:00