Commit Graph

4 Commits

Author SHA1 Message Date
Bill Schmidt 8ff672d397 [PowerPC] Enable vec_perm for long long and double vector types for VSX
VSX makes the "vector long long" and "vector double" types available.
This patch enables the vec_perm interface for these types.  The same
builtin is generated regardless of the specified type, so no
additional work or testing is needed in the back end.  Tests are added
to ensure this builtin is generated by the front end.

llvm-svn: 221988
2014-11-14 13:10:13 +00:00
Bill Schmidt cee13a2712 [PowerPC] Add VSX builtins for vec_div
This patch adds builtin support for xvdivdp and xvdivsp, along with a
new test case.  The builtins are accessed using vec_div in altivec.h.
Builtins are listed (mostly) alphabetically there, so inserting these
changed the line numbers for deprecation warnings tested in
test/Headers/altivec-intrin.c.

There is a companion patch for LLVM.

llvm-svn: 221984
2014-11-14 12:10:51 +00:00
Bill Schmidt 9ec8cea02b [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsics
This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for
PowerPC, which provide programmer access to the lxvd2x, lxvw4x,
stxvd2x, and stxvw4x instructions.

New code in altivec.h defines these in terms of new builtins, which
are themselves defined in BuiltinsPPC.def.  The builtins are converted
to LLVM intrinsics in CGBuiltin.cpp.  Additional code is added to
builtins-ppc-vsx.c to verify the correct generation of the intrinsics.

Note that I moved the other VSX builtins so all VSX builtins will be
alphabetical in their own section in BuiltinsPPC.def.

There is a companion patch for LLVM.

llvm-svn: 221768
2014-11-12 04:19:56 +00:00
Bill Schmidt 691e01d94e [PowerPC] Initial VSX intrinsic support, with min/max for vector double
Now that we have initial support for VSX, we can begin adding
intrinsics for programmer access to VSX instructions.  This patch
performs the necessary enablement in the front end, and tests it by
implementing intrinsics for minimum and maximum using the vector
double data type.

The main change in the front end is to no longer disallow "vector" and
"double" in the same declaration (lib/Sema/DeclSpec.cpp), but "vector"
and "long double" must still be disallowed.  The new intrinsics are
accessed via vec_max and vec_min with changes in
lib/Headers/altivec.h.  Note that for v4f32, we already access
corresponding VMX builtins, but with VSX enabled we should use the
forms that allow all 64 vector registers.

The new built-ins are defined in include/clang/Basic/BuiltinsPPC.def.

I've added a new test in test/CodeGen/builtins-ppc-vsx.c that is
similar to, but much smaller than, builtins-ppc-altivec.c.  This
allows us to test VSX IR generation without duplicating CHECK lines
for the existing bazillion Altivec tests.

Since vector double is now legal when VSX is available, I've modified
the error message, and changed where we test for it and for vector
long double, since the target machine isn't visible in the old place.
This serendipitously removed a not-pertinent warning about 'long'
being deprecated when used with 'vector', when "vector long double" is
encountered and we just want to issue an error.  The existing tests
test/Parser/altivec.c and test/Parser/cxx-altivec.cpp have been
updated accordingly, and I've added test/Parser/vsx.c to verify that
"vector double" is now legitimate with VSX enabled.

There is a companion patch for LLVM.

llvm-svn: 220989
2014-10-31 19:19:24 +00:00