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443 Commits

Author SHA1 Message Date
Anton Korobeynikov e7ec3bc7bc Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.

llvm-svn: 34963
 2007-03-06 08:12:33 +00:00
Lauro Ramos Venancio f10769dda7 Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. 
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.

llvm-svn: 34931
 2007-03-05 17:59:58 +00:00
Dale Johannesen 32bc81341b eliminate unnecessary reset of SP in epilog on darwin 
llvm-svn: 34824
 2007-03-02 01:17:17 +00:00
Evan Cheng 2c0fd3ee4c Use a spilled free callee-saved register as scratch register. 
llvm-svn: 34785
 2007-03-01 08:57:52 +00:00
Evan Cheng 6f059e3e0a - Track which callee-saved registers are spilled. 
- Some code clean up.

llvm-svn: 34783
 2007-03-01 08:26:31 +00:00
Evan Cheng 677bb3b460 Switch from std::vector<bool> to BitVector. 
llvm-svn: 34781
 2007-03-01 07:52:44 +00:00
Bill Wendling 65c75b57d4 Get rid of verboten <iostream> include. 
llvm-svn: 34777
 2007-03-01 06:05:39 +00:00
Dale Johannesen 962fa8eb9a Changes requested in review of last pass. Also pulled isThumb into a 
member, instead of resetting in every function that uses it.

llvm-svn: 34764
 2007-02-28 23:20:38 +00:00
Evan Cheng f6ca943638 Doh. ARM::PC is obvious a reserved register. 
llvm-svn: 34763
 2007-02-28 23:12:34 +00:00
Dale Johannesen 440995bd9a Add intelligence about where to break large blocks. 
llvm-svn: 34755
 2007-02-28 18:41:23 +00:00
Evan Cheng e8af69632f Make requiresRegisterScavenging determination on a per MachineFunction basis. 
llvm-svn: 34711
 2007-02-28 00:59:19 +00:00
Evan Cheng 9049cd72e6 Temporary: make R12 available in ARM mode if RegScavenger is being used. 
llvm-svn: 34709
 2007-02-28 00:22:44 +00:00
Evan Cheng 30508919c8 Start making use of RegScavenger. 
llvm-svn: 34708
 2007-02-28 00:21:58 +00:00
Evan Cheng 95ae95a6a6 PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
llvm-svn: 34707
 2007-02-28 00:21:17 +00:00
Evan Cheng ee8aca0cfa Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function. 
llvm-svn: 34701
 2007-02-27 23:03:55 +00:00
Evan Cheng 71a7271b8b Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info. 
llvm-svn: 34692
 2007-02-27 21:12:35 +00:00
Dale Johannesen c2f3d015e0 cosmetic changes from review of last patch. obvious 
llvm-svn: 34598
 2007-02-25 18:31:31 +00:00
Dale Johannesen e80e31eada remove crediting of Evan Cheng and me. 
llvm-svn: 34568
 2007-02-25 01:42:36 +00:00
Dale Johannesen 01ee5750f4 Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this 
from README.
When no water available, use end of block if in range.  (More to do here.)

llvm-svn: 34563
 2007-02-25 00:47:03 +00:00
Lauro Ramos Venancio 0eb70ebbe5 bugfix: SP wasn't updated for varargs when frame pointer was eliminated. 
llvm-svn: 34537
 2007-02-23 21:53:48 +00:00
Lauro Ramos Venancio 3e906c48d3 Fix stack alignment in functions with varargs. 
llvm-svn: 34532
 2007-02-23 20:32:57 +00:00
Dale Johannesen e18b13b213 rewrite of constant islands 
llvm-svn: 34523
 2007-02-23 05:02:36 +00:00
Evan Cheng 9f8301413c Added -march=thumb; removed -enable-thumb. 
llvm-svn: 34521
 2007-02-23 03:14:31 +00:00
Evan Cheng 15af662314 Add option to turn on register scavenger; By default, spills kills the register being stored. 
llvm-svn: 34514
 2007-02-23 01:09:11 +00:00
Jim Laskey e0008e23cf Simplify lowering and selection of exception ops. 
llvm-svn: 34488
 2007-02-22 14:56:36 +00:00
Jim Laskey 3796abea0f Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Evan Cheng f7ed82da10 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer da81bf4d3e For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng 9865be6d40 Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Chris Lattner 945e437c65 Generalize TargetData strings, to support more interesting forms of data. 
Patch by Scott Michel.

llvm-svn: 34266
 2007-02-14 05:52:17 +00:00
Lauro Ramos Venancio 50c6a8c3a1 Add space between // and the comment. 
llvm-svn: 34246
 2007-02-13 20:06:15 +00:00
Lauro Ramos Venancio 048e16ff8f Add ABI information to ARM subtarget. 
llvm-svn: 34245
 2007-02-13 19:52:28 +00:00
Lauro Ramos Venancio 603f201cba According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned. 
llvm-svn: 34241
 2007-02-13 14:07:13 +00:00
Evan Cheng 540f5e0d41 These vectors are frequently large. Use std::vector instead. 
llvm-svn: 34109
 2007-02-09 23:59:14 +00:00
Evan Cheng 8b7700f146 Add reference counting to constantpool entries. Delete the unused ones. 
llvm-svn: 34105
 2007-02-09 20:54:44 +00:00
Evan Cheng 2ff4c973b1 isLowRegister() expects input is a physical register. 
llvm-svn: 34013
 2007-02-07 21:44:33 +00:00
Evan Cheng cca9b1d768 Rename. 
llvm-svn: 34011
 2007-02-07 21:24:09 +00:00
Evan Cheng ec4c67f0a7 If sp offset will be materialized in a register. Clear the offset field of str / ldr. 
llvm-svn: 34010
 2007-02-07 21:19:58 +00:00
Evan Cheng 62aef236de Get rid of references to iostream. 
llvm-svn: 34009
 2007-02-07 21:18:32 +00:00
Evan Cheng b216ea1aa6 New entry. 
llvm-svn: 34000
 2007-02-07 09:22:15 +00:00
Evan Cheng 78c5a9422d In thumb mode, R3 is reserved, but it can be live in to the function. If 
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!

llvm-svn: 33999
 2007-02-07 09:17:36 +00:00
Evan Cheng 2ff0d3a2ab Update 
llvm-svn: 33998
 2007-02-07 08:37:57 +00:00
Evan Cheng b5519b5361 - If fp (r7) is used to reference stack objects, use [r, r] address mode. 
- If there is a dynamic alloca, in the epilogue, restore the value of sp
  using r7 - offset.
- Other bug fixes.

llvm-svn: 33997
 2007-02-07 08:37:31 +00:00
Evan Cheng 12cf8ddaea eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's. 
llvm-svn: 33975
 2007-02-07 02:44:23 +00:00
Evan Cheng ec13f826a2 Spill / restore should avoid modifying the condition register. 
llvm-svn: 33971
 2007-02-07 00:06:56 +00:00
Evan Cheng a974031ebd Select add FI, c correctly. 
llvm-svn: 33960
 2007-02-06 09:11:20 +00:00
Evan Cheng ea3308aef0 foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers. 
llvm-svn: 33958
 2007-02-06 06:13:29 +00:00
Evan Cheng 2fc792f86b eliminateFrameIndex() bug when frame pointer is used as base register. 
llvm-svn: 33945
 2007-02-06 00:23:31 +00:00
Evan Cheng 650d0672f7 - Store val, [sp, c] must be selected to tSTRsp. 
- If c does not fit in the offset field, materialize sp + c into a register
  using tADDhirr.

llvm-svn: 33944
 2007-02-06 00:22:06 +00:00
Evan Cheng 456db39ea9 ARM callseq_end should have a input flag operand so it would be scheduled right after the call. 
llvm-svn: 33832
 2007-02-03 09:11:58 +00:00
Evan Cheng 4b6c8f7f5e Fix comments. 
llvm-svn: 33831
 2007-02-03 08:53:01 +00:00
Evan Cheng 36d559d369 - Branch max. displacement calculation bug. 
- Add debugging info.

llvm-svn: 33811
 2007-02-03 02:08:34 +00:00
Lauro Ramos Venancio b739f7d337 bugfix: SP isn't resetted when function has FP and there is no spills. 
llvm-svn: 33800
 2007-02-02 23:08:40 +00:00
Evan Cheng f089c99f1d Another thumb large stack offset codegen bug. 
llvm-svn: 33795
 2007-02-02 21:08:39 +00:00
Evan Cheng d9d94700a4 Use MBB.empty() instead of MBB.size() for speed. 
llvm-svn: 33789
 2007-02-02 19:09:19 +00:00
Evan Cheng 3ad22567b3 Watch out for empty BB. 
llvm-svn: 33788
 2007-02-02 18:49:02 +00:00
Evan Cheng fda6550545 Ugh. Only meant to do this in thumb mode. 
llvm-svn: 33780
 2007-02-02 08:58:48 +00:00
Chris Lattner 2d5b4ac38f add a note 
llvm-svn: 33778
 2007-02-02 04:36:46 +00:00
Evan Cheng 48b094d9dd Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant. 
llvm-svn: 33775
 2007-02-02 01:53:26 +00:00
Evan Cheng 9b9e4ae796 Thumb does not have clz. 
llvm-svn: 33773
 2007-02-01 23:34:03 +00:00
Lauro Ramos Venancio 2c355da986 Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll) 
llvm-svn: 33763
 2007-02-01 21:43:53 +00:00
Evan Cheng fd522996c8 Pasto. Lots of it. 
llvm-svn: 33762
 2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio 903e01d407 Fix .thumb_func directive on linux. 
llvm-svn: 33759
 2007-02-01 18:25:34 +00:00
Evan Cheng f9a4c690de - Off by one bugs in maximum displacement calculation / testing. 
- In thumb mode, a new constpool island BB size should be 4 + 2 to
  compensate for the potential padding due to alignment requirement.

llvm-svn: 33753
 2007-02-01 10:16:15 +00:00
Evan Cheng 06736d0f88 .set pc relative displacement bug: label should be moved down one instruction 
to just before the add r1, pc:

Before:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

Now:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
        mov r1, #PCRELV0
LPCRELL0:
        add r1, pc

llvm-svn: 33744
 2007-02-01 03:04:49 +00:00
Evan Cheng 0df1536173 Add a note. 
llvm-svn: 33743
 2007-02-01 02:46:20 +00:00
Evan Cheng e724492566 Also set alignment of stack-based structs to 4 in thumb mode. 
llvm-svn: 33741
 2007-02-01 02:18:36 +00:00
Evan Cheng e7e966de5e Special epilogue for vararg functions. We cannot do a pop to pc because 
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3

llvm-svn: 33739
 2007-02-01 01:49:46 +00:00
Evan Cheng 234e031e36 Pessmistically assume the .align 2 before the first constpool entry adds 
two bytes padding.

llvm-svn: 33734
 2007-02-01 01:09:47 +00:00
Evan Cheng 29f920877d Possible JT improvements. 
llvm-svn: 33733
 2007-02-01 01:07:48 +00:00
Evan Cheng ed81dea45b Don't emit unnecessary .align directive. 
llvm-svn: 33729
 2007-01-31 23:39:39 +00:00
Evan Cheng e5c19993cd Handle an interesting corner case: the constpool_entry being reference is two 
instructions away, i.e. its address is equal to PC.
        %r0 = tLDRpci <cp#0>
        bx
        CONSTPOOL_ENTRY 0 <cp#0>, 4

llvm-svn: 33728
 2007-01-31 23:35:18 +00:00
Evan Cheng b0ff625a31 Don't want to add FramePtr to callee save spill list twice. 
llvm-svn: 33727
 2007-01-31 23:17:29 +00:00
Evan Cheng 6f1c20a8e6 Darwin ABI requires FP to point to stack slot of prev FP. 
llvm-svn: 33724
 2007-01-31 22:25:33 +00:00
Evan Cheng 2e309b15a7 Add entry. 
llvm-svn: 33723
 2007-01-31 22:11:38 +00:00
Evan Cheng 1c5837dc4a Thumb add sp, #imm requires the immediate value be multiple of 4. For now, 
change preferred alignment of short, byte, bool to 4.

llvm-svn: 33722
 2007-01-31 22:08:40 +00:00
Evan Cheng ffe1d9f7fa Update comment. 
llvm-svn: 33721
 2007-01-31 22:06:44 +00:00
Evan Cheng 0584836340 Thumb asm syntax does not want 's' suffix for flag setting opcodes. 
llvm-svn: 33717
 2007-01-31 20:12:31 +00:00
Evan Cheng 1f3fc4b3f0 When determining whether a pc relative branch / load displacement fits in the 
instruction field, adjust it for PC value (4 for thumb, 8 for arm).

llvm-svn: 33711
 2007-01-31 19:57:44 +00:00
Evan Cheng 7169bd8784 Some comments. 
llvm-svn: 33707
 2007-01-31 18:29:27 +00:00
Evan Cheng 456928bbbc ConstPool island bug: watch out for cases where UserMI is the last MI of the BB. 
llvm-svn: 33706
 2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio 7ae4f5599e ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used. 
llvm-svn: 33703
 2007-01-31 13:12:46 +00:00
Evan Cheng 143576ddd2 Specify the right CC for comparison libcalls. 
llvm-svn: 33702
 2007-01-31 09:30:58 +00:00
Evan Cheng 491fcdb49b Observe -soft-float. 
llvm-svn: 33699
 2007-01-31 08:40:13 +00:00
Evan Cheng 345877e77c - Added Thumb constpool island support. 
- Islands are inserted right after the user MI since thumb LDR cannot encode
  negative offset.

llvm-svn: 33690
 2007-01-31 02:22:22 +00:00
Evan Cheng dd7a688bb8 During PEI, if the immediate value of sp + offset is too large (i.e. something 
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.

llvm-svn: 33667
 2007-01-30 23:01:46 +00:00
Evan Cheng 83f35170fa - Fix codegen for pc relative constant (e.g. JT) in thumb mode: 
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.

llvm-svn: 33664
 2007-01-30 20:37:08 +00:00
Reid Spencer 5301e7c605 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.

llvm-svn: 33663
 2007-01-30 20:08:39 +00:00
Evan Cheng 95b85e34ff Copy and paste bug. 
llvm-svn: 33658
 2007-01-30 08:22:33 +00:00
Evan Cheng 0e083d0161 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections. 
llvm-svn: 33657
 2007-01-30 08:04:53 +00:00
Evan Cheng ce8fa3ed83 Misseed thumb jumptable branch. 
llvm-svn: 33656
 2007-01-30 08:03:06 +00:00
Evan Cheng e43ca022bf In thumb mode, round up stack frame size to multiple of 4 since add/sub 
sp, imm instructions implicitly multiply the offset by 4.

llvm-svn: 33653
 2007-01-30 02:57:02 +00:00
Evan Cheng c419d983d6 Thumb eliminateFrameIndex fixes. 
llvm-svn: 33652
 2007-01-30 02:36:01 +00:00
Evan Cheng 1cd3c0efb8 Change the operand orders to t_addrmode_s* to make it easier to morph 
instructions that use these address modes to instructions that use
t_addrmode_sp.

llvm-svn: 33651
 2007-01-30 02:35:32 +00:00
Evan Cheng 7fa6964dc2 - In thumb mode, if size of MachineFunction is >= 2048, force LR to be 
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr

llvm-svn: 33650
 2007-01-30 01:18:38 +00:00
Evan Cheng 863736b0ad Use BL to implement Thumb far jumps. 
llvm-svn: 33649
 2007-01-30 01:13:37 +00:00
Evan Cheng 760c68b8af Factor GetInstSize() out of constpool island pass. 
llvm-svn: 33644
 2007-01-29 23:45:17 +00:00
Nate Begeman eda5997cc8 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.

llvm-svn: 33636
 2007-01-29 22:58:52 +00:00
Evan Cheng 8953edc8a5 Comment. 
llvm-svn: 33633
 2007-01-29 22:23:02 +00:00
Evan Cheng 43e8518d8b Remember if LR register has been spilled in this function. 
llvm-svn: 33632
 2007-01-29 22:22:24 +00:00
Anton Korobeynikov 037c867b54 Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597
 2007-01-28 13:31:35 +00:00
Evan Cheng 0cd49bc8a2 New entry. 
llvm-svn: 33569
 2007-01-27 02:33:22 +00:00
Evan Cheng 0701c5a074 Thumb jumptable support. 
llvm-svn: 33568
 2007-01-27 02:29:45 +00:00
Evan Cheng f40b9006a8 Thumb add / sub with carry. 
llvm-svn: 33562
 2007-01-27 00:07:15 +00:00
Lauro Ramos Venancio 7d47719af0 Some asm directives fixes for ELF. 
Now we can compile llvm-gcc on arm-linux-gnueabi!

llvm-svn: 33558
 2007-01-26 23:24:43 +00:00
Evan Cheng add7f164a1 Represent tADDspi and tSUBspi as two-address instructions. 
llvm-svn: 33551
 2007-01-26 21:33:19 +00:00
Jim Laskey c56315c2b5 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Lauro Ramos Venancio d45cd5eb81 Fix Data16bitsDirective for ELF. 
llvm-svn: 33549
 2007-01-26 21:20:45 +00:00
Evan Cheng 3c9dc6bd46 Conditional branch being fixed up is not the last MI in the BB, there is a 
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b   L2
=>
bne L2
b   L1

llvm-svn: 33548
 2007-01-26 20:38:26 +00:00
Lauro Ramos Venancio aa26c1ab9d If the constant pool value is a extern weak symbol, emit the weak reference. 
llvm-svn: 33543
 2007-01-26 19:51:32 +00:00
Evan Cheng d02d75c295 extload -> zextload 
llvm-svn: 33542
 2007-01-26 19:13:16 +00:00
Jim Laskey f9e5445ed4 Make LABEL a builtin opcode. 
llvm-svn: 33537
 2007-01-26 14:34:52 +00:00
Evan Cheng 1e270b639d SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This 
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.

llvm-svn: 33517
 2007-01-26 02:02:39 +00:00
Evan Cheng db7f0591f3 Need to scan the function for branches even if there aren't any constants. 
llvm-svn: 33515
 2007-01-26 01:04:44 +00:00
Evan Cheng 1d138989f4 Forgot to update this. 
llvm-svn: 33512
 2007-01-25 23:31:04 +00:00
Evan Cheng 010ae386b8 Add comment, fix typo, reduce memory usage, etc. 
llvm-svn: 33510
 2007-01-25 23:18:59 +00:00
Evan Cheng fa824b9f73 I am an idiot. 
llvm-svn: 33509
 2007-01-25 23:18:16 +00:00
Lauro Ramos Venancio 4f7d37fe04 Fix elf object definition. 
llvm-svn: 33502
 2007-01-25 20:11:04 +00:00
Evan Cheng 417260dc11 Doh. Skip JT branches. 
llvm-svn: 33501
 2007-01-25 19:43:52 +00:00
Evan Cheng 22c7cf504e Added (preliminary) branch shortening capability to constantpool island pass. 
llvm-svn: 33497
 2007-01-25 03:12:46 +00:00
Evan Cheng c1a1bd18e3 Getting rid uses of evil std::set<> 
llvm-svn: 33496
 2007-01-25 03:07:27 +00:00
Evan Cheng 1526ba50d9 Use PC relative ldr to load from a constantpool in Thumb mode. 
llvm-svn: 33484
 2007-01-24 08:53:17 +00:00
Evan Cheng 8942551dee Allow [ fi#c, imm ] as ARM load / store addresses. 
llvm-svn: 33474
 2007-01-24 02:45:25 +00:00
Evan Cheng 139edae4a2 Various Thumb mode load / store isel bug fixes. 
llvm-svn: 33472
 2007-01-24 02:21:22 +00:00
Evan Cheng c0b7366cf9 - Reorg Thumb load / store instructions. Combine each rr and ri pair of 
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.

llvm-svn: 33470
 2007-01-23 22:59:13 +00:00
Evan Cheng 2cfbcce102 Darwin HiddenDirective is .private_extern. 
llvm-svn: 33465
 2007-01-23 19:06:03 +00:00
Evan Cheng 6730e12ae4 PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng 16e58be1bc hasFP() is now a virtual method of MRegisterInfo. 
llvm-svn: 33455
 2007-01-23 00:57:47 +00:00
Evan Cheng 107015e2fa ARM AAPCS abi (Linux, etc.) requires 8-byte double / long alignment; Mac 
requires 4-bytes alignment.

llvm-svn: 33448
 2007-01-22 23:13:01 +00:00
Evan Cheng 4abf2e7bcc Double and Long preferred alignment is 4 for Darwin, 8 for Linux. 
llvm-svn: 33440
 2007-01-22 21:24:13 +00:00
Evan Cheng 52189b5805 Use bl to call Thumb fuctions directly. 
llvm-svn: 33433
 2007-01-22 19:40:10 +00:00
Evan Cheng e3d8e42e27 Round up stack to multiple of alignment only if it's a leaf function without alloca. 
llvm-svn: 33401
 2007-01-20 10:22:33 +00:00
Evan Cheng a9af4be5ac Prologue and epilogue bugs for non-Darwin targets. 
llvm-svn: 33390
 2007-01-20 03:24:07 +00:00
Evan Cheng aa24f08926 Clean up ARM PEI code. 
llvm-svn: 33389
 2007-01-20 02:09:25 +00:00
Evan Cheng 77c15ded10 Code clean up. Use def : pat instead of defining new instructions. 
llvm-svn: 33368
 2007-01-19 20:27:35 +00:00
Evan Cheng bf216c364f isDarwin -> isTargetDarwin 
llvm-svn: 33366
 2007-01-19 19:28:01 +00:00
Evan Cheng 1199c2d653 Restructure code a bit to make use of continue (simplifying things). Generalize 
the .zerofill directive emission to not be darwin-specific.

llvm-svn: 33365
 2007-01-19 19:25:36 +00:00
Evan Cheng 023c7d667d Darwin doesn't support .bss, but it does have .zerofill 
llvm-svn: 33364
 2007-01-19 19:23:47 +00:00
Evan Cheng 181fe36d6c Introduce TargetType's ELF and Darwin. 
llvm-svn: 33363
 2007-01-19 19:22:40 +00:00
Evan Cheng df62250cee Modify emission of jump tables on darwin to emit an extra "l" label that 
delimits the boundaries of jump tables.  This lets the linker's dead code
stripping optimization do a better job.

llvm-svn: 33362
 2007-01-19 18:59:56 +00:00
Lauro Ramos Venancio 75aaf1fa6a Fix section definition. 
llvm-svn: 33359
 2007-01-19 17:33:22 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple. 
llvm-svn: 33353
 2007-01-19 07:51:42 +00:00
Lauro Ramos Venancio 901d9e65f6 Don't add or sub zero to sp. 
llvm-svn: 33142
 2007-01-12 20:52:27 +00:00
Lauro Ramos Venancio c4235e5521 Build constants using instructions mov/orr or mvn/eor. 
llvm-svn: 33141
 2007-01-12 20:35:49 +00:00
Lauro Ramos Venancio 7284073ec2 Expand SELECT (f32/f64) and FCOPYSIGN (f32/f64). 
llvm-svn: 32870
 2007-01-04 14:01:38 +00:00
Evan Cheng 74b46e8c05 Fix naming inconsistency. 
llvm-svn: 32823
 2007-01-02 21:33:40 +00:00
Rafael Espindola fd68718467 implement missing compares 
patch by Lauro
bug fixed by me

llvm-svn: 32795
 2006-12-31 18:52:39 +00:00
Reid Spencer e63b6518fa For PR950: 
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788
 2006-12-31 05:55:36 +00:00
Rafael Espindola 64493fb30d fix comment 
llvm-svn: 32767
 2006-12-29 14:28:12 +00:00
Lauro Ramos Venancio 8ab8f7df6f Define StaticCtorsSection and StaticDtorsSection for ARM. 
llvm-svn: 32763
 2006-12-28 13:13:00 +00:00