Evan Cheng
bef131de68
Typo. It's checking if V is multiple of 4, not multiple of 3. :-)
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llvm-svn: 36663
2007-05-03 02:00:18 +00:00
Devang Patel
8c78a0bff0
Drop 'const'
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llvm-svn: 36662
2007-05-03 01:11:54 +00:00
Chris Lattner
1c1082133c
match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
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llvm-svn: 36660
2007-05-03 00:32:00 +00:00
Devang Patel
e95c6ad802
Use 'static const char' instead of 'static const int'.
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Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
Dale Johannesen
9ce17f1e33
Add some support for (Darwin) code-generating directives in getInlineAsmLength.
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Support is incomplete, but more accurate than gcc's.
llvm-svn: 36634
2007-05-02 01:02:40 +00:00
Devang Patel
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
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llvm-svn: 36632
2007-05-01 21:15:47 +00:00
Evan Cheng
fa34bc9623
Doh. PC displacement is between the constantpool and the add instruction.
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llvm-svn: 36630
2007-05-01 20:27:19 +00:00
Evan Cheng
5662b21db1
eliminateFrameIndex() change.
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llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Evan Cheng
77c545e6b8
Under normal circumstances, when a frame pointer is not required, we reserve
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argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.
llvm-svn: 36607
2007-05-01 00:52:08 +00:00
Dale Johannesen
8dd36a51fc
Remove item: thumb padding in constant islands
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llvm-svn: 36586
2007-04-30 00:32:06 +00:00
Dale Johannesen
71577f3848
remove unused variable
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llvm-svn: 36585
2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
2c673ad7ef
Enable protected visibility on ARM.
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llvm-svn: 36583
2007-04-30 00:23:51 +00:00
Dale Johannesen
4a00cf3fc4
Rewrite of Thumb constant islands handling (exact allowance for padding
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around islands and jump tables).
llvm-svn: 36573
2007-04-29 19:19:30 +00:00
Dale Johannesen
1ee29dd026
Make ARM-specific version of getInlineAsmLength
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llvm-svn: 36572
2007-04-29 19:17:45 +00:00
Dale Johannesen
7e7280b538
change per review
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llvm-svn: 36519
2007-04-28 00:36:37 +00:00
Dale Johannesen
29c05756b5
Prevent Thumb code from generating ARM instructions
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llvm-svn: 36518
2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
99cb63029a
add parenthesis.
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llvm-svn: 36514
2007-04-27 20:10:08 +00:00
Evan Cheng
559c546453
Doh. ARM::LEApcrel is a single instruction MI.
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llvm-svn: 36513
2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
62f65468bc
In Thumb mode, the frame register must be R7.
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llvm-svn: 36512
2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
c39c12a3fa
ARM TLS: implement "general dynamic", "initial exec" and "local exec" models.
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llvm-svn: 36506
2007-04-27 13:54:47 +00:00
Evan Cheng
c9f22fd1a4
Darwin runtime library does not have these.
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llvm-svn: 36505
2007-04-27 08:15:43 +00:00
Evan Cheng
d9990f061f
Special handling of LEApcrel and tLEApcrel.
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llvm-svn: 36504
2007-04-27 08:14:15 +00:00
Evan Cheng
e54018687d
Back out previous check-in. Incorrect.
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llvm-svn: 36503
2007-04-27 07:50:02 +00:00
Evan Cheng
68ec63b3d7
tLEApcrel is a AddrModeTs, i.e. pc relative.
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llvm-svn: 36502
2007-04-27 07:37:22 +00:00
Evan Cheng
910c80851e
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
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llvm-svn: 36483
2007-04-26 19:00:32 +00:00
Evan Cheng
0ba174534c
Match MachineFunction::UsedPhysRegs changes.
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llvm-svn: 36452
2007-04-25 22:13:27 +00:00
Lauro Ramos Venancio
4ae9425bb6
remember to emit weak reference in one more case.
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llvm-svn: 36438
2007-04-25 14:50:40 +00:00
Evan Cheng
8cd224e81c
Relex assertions to account for additional implicit def / use operands.
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llvm-svn: 36430
2007-04-25 07:12:14 +00:00
Dale Johannesen
fdfb757682
Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining
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BBOffsets and BBSizes when adjusting conditional branches.
llvm-svn: 36372
2007-04-23 20:09:04 +00:00
Dale Johannesen
ed0ecdb7ff
add Align field, and use when generating function alignment
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llvm-svn: 36371
2007-04-23 20:07:25 +00:00
Dale Johannesen
8eb9bff493
add isThumb (unused as yet)
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llvm-svn: 36370
2007-04-23 20:04:35 +00:00
Lauro Ramos Venancio
ee2d164f0f
Implement PIC for arm-linux.
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llvm-svn: 36324
2007-04-22 00:04:12 +00:00
Evan Cheng
e656d093a5
Specify S registers as D registers' sub-registers.
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llvm-svn: 36280
2007-04-20 21:20:10 +00:00
Chris Lattner
3d3f22766a
add a crazy idea
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llvm-svn: 36273
2007-04-20 20:18:43 +00:00
Lauro Ramos Venancio
42cd7253b1
Fix a bug in getFrameRegister.
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Reported by Raul Herbster.
llvm-svn: 36262
2007-04-19 14:09:38 +00:00
Chris Lattner
598bc0d9a3
dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll
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llvm-svn: 36222
2007-04-17 22:39:58 +00:00
Chris Lattner
2509d7547d
add a note
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llvm-svn: 36203
2007-04-17 18:03:00 +00:00
Anton Korobeynikov
fb80151c42
Removed tabs everywhere except autogenerated & external files. Add make
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target for tabs checking.
llvm-svn: 36146
2007-04-16 18:10:23 +00:00
Chris Lattner
502c3f48d9
arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes.
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llvm-svn: 35962
2007-04-13 06:50:55 +00:00
Chris Lattner
fe926e2960
Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll
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llvm-svn: 35909
2007-04-11 16:17:12 +00:00
Chris Lattner
9b6d69e0c2
restore support for negative strides
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llvm-svn: 35859
2007-04-10 03:48:29 +00:00
Chris Lattner
d44e24c896
remove dead target hooks
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llvm-svn: 35846
2007-04-09 23:33:39 +00:00
Chris Lattner
39f65335d5
remove some dead target hooks, subsumed by isLegalAddressingMode
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llvm-svn: 35840
2007-04-09 22:27:04 +00:00
Evan Cheng
1e150dedd1
Implement inline asm modifier P.
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llvm-svn: 35640
2007-04-04 00:13:29 +00:00
Evan Cheng
bd31f41daa
Typo.
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llvm-svn: 35639
2007-04-04 00:06:07 +00:00
Evan Cheng
3c68d4e8ba
Remove unused constant pool entries.
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llvm-svn: 35635
2007-04-03 23:39:48 +00:00
Evan Cheng
39d8b4db92
Fixed a bug that causes codegen of noop like add r0, r0, #0 .
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llvm-svn: 35627
2007-04-03 21:31:21 +00:00
Evan Cheng
e8315fe3f5
Inverted logic.
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llvm-svn: 35619
2007-04-03 06:44:25 +00:00
Chris Lattner
f742e2fe70
Arm supports negative strides as well, add them. This lets us compile:
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CodeGen/ARM/arm-negative-stride.ll to:
LBB1_2: @bb
str r1, [r3, -r0, lsl #2 ]
add r0, r0, #1
cmp r0, r2
bne LBB1_2 @bb
llvm-svn: 35609
2007-04-03 00:13:57 +00:00
Dale Johannesen
d13786dd82
fix off by 1 error in displacement computation
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llvm-svn: 35602
2007-04-02 20:31:06 +00:00