Commit Graph

3 Commits

Author SHA1 Message Date
Mikhail Maltsev 89f7b46b7a [Targets] Implement getConstraintRegister for ARM and AArch64
Summary:
The getConstraintRegister method is used by semantic checking of
inline assembly statements in order to diagnose conflicts between
clobber list and input/output lists. Currently ARM and AArch64 don't
override getConstraintRegister, so conflicts between registers
assigned to variables in asm labels and clobber lists are not
diagnosed. Such conflicts can cause assertion failures in the back end
and even miscompilations.

This patch implements getConstraintRegister for ARM and AArch64
targets. Since these targets don't have single-register constraints,
the implementation is trivial and just returns the register specified
in an asm label (if any).

Reviewers: eli.friedman, javed.absar, thopre

Reviewed By: thopre

Subscribers: rengolin, eraman, rogfer01, myatsina, kristof.beyls, cfe-commits, chrib

Differential Revision: https://reviews.llvm.org/D45965

llvm-svn: 331164
2018-04-30 09:11:08 +00:00
Tim Northover 8f24b178f3 ARM: teach Sema that "r" can match 64-bit values
We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.

llvm-svn: 196724
2013-12-08 15:24:55 +00:00
Eric Christopher 9e49188a01 Add a missing 'break' to ensure that we reject inline assembly
constraints we don't recognize.

llvm-svn: 162064
2012-08-16 23:50:41 +00:00