4 Commits

Author	SHA1	Message	Date
Colin LeMahieu	7cd0892729	[Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission. ... llvm-svn: 252443	2015-11-09 04:07:48 +00:00
Colin LeMahieu	b8575b14be	[Hexagon] Adding some codegen tests and updating some to match spec. ... llvm-svn: 239690	2015-06-13 21:46:39 +00:00
David Blaikie	a79ac14fa6	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction ... Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794	2015-02-27 21:17:42 +00:00
Jyotsna Verma	50ca6dd8a7	Hexagon: Use multiclass for absolute addressing mode stores. ... llvm-svn: 174412	2013-02-05 18:15:34 +00:00