Commit Graph

4602 Commits

Author SHA1 Message Date
Ivan A. Kosarev b3b87c3314 [NEON] Define vget_high_f16() and vget_low_f16() intrinsics in AArch64 mode only
Differential Revision: https://reviews.llvm.org/D45668

llvm-svn: 330195
2018-04-17 16:43:07 +00:00
Teresa Johnson 9e4321c12d [ThinLTO] Pass -save-temps to LTO backend for distributed ThinLTO builds
Summary:
The clang driver option -save-temps was not passed to the LTO config,
so when invoking the ThinLTO backends via clang during distributed
builds there was no way to get LTO to save temp files.

Getting this to work with ThinLTO distributed builds also required
changing the driver to avoid a separate compile step to emit unoptimized
bitcode when the input was already bitcode under -save-temps. Not only is
this unnecessary in general, it is problematic for ThinLTO backends since
the temporary bitcode file to the backend would not match the module path
in the combined index, leading to incorrect ThinLTO backend index-based
optimizations.

Reviewers: pcc

Subscribers: mehdi_amini, inglorion, eraman, cfe-commits

Differential Revision: https://reviews.llvm.org/D45217

llvm-svn: 330194
2018-04-17 16:39:25 +00:00
Aaron Ballman fe93546b11 Add modifiers for unsigned char and signed char field printing for __builtin_dump_struct.
Patch by Paul Semel.

llvm-svn: 330188
2018-04-17 14:00:06 +00:00
Aaron Ballman b6a7702297 Add checks for format specifiers used by __builtin_dump_struct and added a new specifier for null-terminated constant strings.
Patch by Paul Semel.

llvm-svn: 330185
2018-04-17 11:57:47 +00:00
Eli Friedman 642a5ee1c1 [ARM] Compute a target feature which corresponds to the ARM version.
Currently, the interaction between the triple, the CPU, and the
supported features is a mess: the driver edits the triple to indicate
the supported architecture version, and the LLVM backend uses this to
figure out what instructions are legal.  This makes it difficult to
understand what's happening, and makes it impossible to LTO together two
modules with different computed architectures.

Instead of relying on triple rewriting to get the correct target
features, we should add the right target features explicitly.

Differential Revision: https://reviews.llvm.org/D45240

llvm-svn: 330169
2018-04-16 23:52:58 +00:00
Andrey Konovalov 1ba9d9c6ca hwasan: add -fsanitize=kernel-hwaddress flag
This patch adds -fsanitize=kernel-hwaddress flag, that essentially enables
-hwasan-kernel=1 -hwasan-recover=1 -hwasan-match-all-tag=0xff.

Differential Revision: https://reviews.llvm.org/D45046

llvm-svn: 330044
2018-04-13 18:05:21 +00:00
Ivan A. Kosarev 9cdb2c75d9 [NEON] Support vrndns_f32 intrinsic
Differential Revision: https://reviews.llvm.org/D45515

llvm-svn: 330012
2018-04-13 12:46:02 +00:00
Gabor Buella b220dd2b6c [X86] Introduce cldemote intrinsic
Reviewers: craig.topper, zvi

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45257

llvm-svn: 329993
2018-04-13 07:37:24 +00:00
Dean Michael Berris 488f7c2b67 [XRay][clang] Add flag to choose instrumentation bundles
Summary:
This change addresses http://llvm.org/PR36926 by allowing users to pick
which instrumentation bundles to use, when instrumenting with XRay. In
particular, the flag `-fxray-instrumentation-bundle=` has four valid
values:

- `all`: the default, emits all instrumentation kinds
- `none`: equivalent to -fnoxray-instrument
- `function`: emits the entry/exit instrumentation
- `custom`: emits the custom event instrumentation

These can be combined either as comma-separated values, or as
repeated flag values.

Reviewers: echristo, kpw, eizan, pelikan

Reviewed By: pelikan

Subscribers: mgorny, cfe-commits

Differential Revision: https://reviews.llvm.org/D44970

llvm-svn: 329985
2018-04-13 02:31:58 +00:00
Eli Friedman 01d349bab1 Remove -cc1 option "-backend-option".
It means the same thing as -mllvm; there isn't any reason to have two
options which do the same thing.

Differential Revision: https://reviews.llvm.org/D45109

llvm-svn: 329965
2018-04-12 22:21:36 +00:00
Gabor Buella e708a09e21 [X86] Introduce wbinvd intrinsic
A previously missing intrinsic for an old instruction.

Reviewers: craig.topper, echristo

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D45311

llvm-svn: 329937
2018-04-12 18:42:02 +00:00
Gabor Buella a052016ef2 [x86] wbnoinvd intrinsic
The WBNOINVD instruction writes back all modified
cache lines in the processor’s internal cache to main memory
but does not invalidate (flush) the internal caches.

Reviewers: craig.topper, zvi, ashlykov

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D43817

llvm-svn: 329848
2018-04-11 20:09:09 +00:00
Shoaib Meenai 34aa13169b [CodeGen] Handle __func__ inside __finally
When we enter a __finally block, the CGF's CurCodeDecl will be null
(because CodeGenFunction::StartFunction is given an empty GlobalDecl for
a __finally block), and so the dyn_cast here will result in an assertion
failure. Change it to dyn_cast_or_null to handle this case.

Differential Revision: https://reviews.llvm.org/D45523

llvm-svn: 329836
2018-04-11 18:17:35 +00:00
Artem Belevich 24e8a680e5 [NVPTX, CUDA] Improved feature constraints on NVPTX target builtins.
When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature,
consider those features available if we're compiling for GPU >= sm_XX or have
enabled PTX version >= ptxYY.

Differential Revision: https://reviews.llvm.org/D45061

llvm-svn: 329829
2018-04-11 17:51:19 +00:00
Ivan A. Kosarev 2f326d453f [NEON] Support vfma_n and vfms_n intrinsics
Differential Revision: https://reviews.llvm.org/D45483

llvm-svn: 329814
2018-04-11 14:43:11 +00:00
Craig Topper 2575454fe9 [X86] Replace 512-bit masked pmaddubsw and pmaddwd intrinsic with unmasked intrinsic and a select.
This makes it consistent with the 128/256-bit functions.

Someday maybe we'll have all the masking moved to selects.

llvm-svn: 329775
2018-04-11 04:55:10 +00:00
Aaron Ballman 0652534131 Introduce a new builtin, __builtin_dump_struct, that is useful for dumping structure contents at runtime in circumstances where debuggers may not be easily available (such as in kernel work).
Patch by Paul Semel.

llvm-svn: 329762
2018-04-10 21:58:13 +00:00
Craig Topper 298e1712d8 [X86] Add test case for llvm change r329734
This test ensures the popfd instruction in MS inline assembly can properly find a clobber name for the dirflag register. Previously the register was named 'DF', but it needs to be named 'dirflag' to match the name in the GCC register name list.

llvm-svn: 329738
2018-04-10 18:43:44 +00:00
Gabor Buella 58fe46d99f CodeGen tests - typo fixes NFC
llvm-svn: 329689
2018-04-10 11:20:05 +00:00
Vitaly Buka 69a2e18b4a asan: kernel: make no_sanitize("address") attribute work with -fsanitize=kernel-address
Summary:
Right now to disable -fsanitize=kernel-address instrumentation, one needs to use no_sanitize("kernel-address"). Make either no_sanitize("address") or no_sanitize("kernel-address")  disable both ASan and KASan instrumentation. Also remove redundant test.

Patch by Andrey Konovalov

Reviewers: eugenis, kcc, glider, dvyukov, vitalybuka

Reviewed By: eugenis, vitalybuka

Differential Revision: https://reviews.llvm.org/D44981

llvm-svn: 329612
2018-04-09 20:10:29 +00:00
Craig Topper 304edc1e75 [X86] Emit native IR for pmuldq/pmuludq builtins.
I believe all the pieces are now in place in the backend to make this work correctly. We can either mask the input to 32 bits for pmuludg or shl/ashr for pmuldq and use a regular mul instruction. The backend should combine this to PMULUDQ/PMULDQ and then SimplifyDemandedBits will remove the and/shifts.

Differential Revision: https://reviews.llvm.org/D45421

llvm-svn: 329605
2018-04-09 19:17:54 +00:00
Dean Michael Berris 20dc6ef746 [XRay][llvm+clang] Consolidate attribute list files
Summary:
This change consolidates the always/never lists that may be provided to
clang to externally control which functions should be XRay instrumented
by imbuing attributes. The files follow the same format as defined in
https://clang.llvm.org/docs/SanitizerSpecialCaseList.html for the
sanitizer blacklist.

We also deprecate the existing `-fxray-instrument-always=` and
`-fxray-instrument-never=` flags, in favour of `-fxray-attr-list=`.

This fixes http://llvm.org/PR34721.

Reviewers: echristo, vlad.tsyrklevich, eugenis

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D45357

llvm-svn: 329543
2018-04-09 04:02:09 +00:00
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Manoj Gupta 4b3eefa5e8 Disable -fmerge-all-constants as default.
Summary:
"-fmerge-all-constants" is a non-conforming optimization and should not
be the default. It is also causing miscompiles when building Linux
Kernel (https://lkml.org/lkml/2018/3/20/872).

Fixes PR18538.

Reviewers: rjmccall, rsmith, chandlerc

Reviewed By: rsmith, chandlerc

Subscribers: srhines, cfe-commits

Differential Revision: https://reviews.llvm.org/D45289

llvm-svn: 329300
2018-04-05 15:29:52 +00:00
Vlad Tsyrklevich e55aa03ad4 Add the -fsanitize=shadow-call-stack flag
Summary:
Add support for the -fsanitize=shadow-call-stack flag which causes clang
to add ShadowCallStack attribute to functions compiled with that flag
enabled.

Reviewers: pcc, kcc

Reviewed By: pcc, kcc

Subscribers: cryptoad, cfe-commits, kcc

Differential Revision: https://reviews.llvm.org/D44801

llvm-svn: 329122
2018-04-03 22:33:53 +00:00
Rafael Espindola b2c47fbf94 Set dso_local on cfi_slowpath.
llvm-svn: 328836
2018-03-29 22:08:01 +00:00
Manoj Gupta cb668d8512 [AArch64]: Add support for parsing rN registers.
Summary:
Allow rN registers to be simply parsed as correspoing xN registers.
The "register ... asm("rN")" is an command to the
compiler's register allocator, not an operand to any individual assembly
instruction. GCC documents this syntax as "...the name of the register
that should be used."

This is needed to support the changes in Linux kernel (see
https://lkml.org/lkml/2018/3/1/268 )

Note: This will add support only for the limited use case of
register ... asm("rN"). Any other uses that make rN leak into assembly
are not supported.

Reviewers: kristof.beyls, rengolin, peter.smith, t.p.northover

Reviewed By: peter.smith

Subscribers: javed.absar, eraman, cfe-commits, srhines

Differential Revision: https://reviews.llvm.org/D44815

llvm-svn: 328829
2018-03-29 21:11:15 +00:00
Rafael Espindola 54d44bf14c Mark __cfi_check as dso_local.
llvm-svn: 328825
2018-03-29 20:51:30 +00:00
Akira Hatanaka 673af7a688 Generalize NRVO to cover C structs.
This commit generalizes NRVO to cover C structs (both trivial and
non-trivial structs).

rdar://problem/33599681

Differential Revision: https://reviews.llvm.org/D44968

llvm-svn: 328809
2018-03-29 17:56:24 +00:00
Rafael Espindola 7e9b87648b Add a dllimport test.
Thanks to rnk for the suggestion.

llvm-svn: 328800
2018-03-29 16:35:52 +00:00
Krzysztof Parzyszek 790e422be9 [Hexagon] Aid bit-reverse load intrinsics lowering with bitcode
The conversion of operatios to bitcode helps to eliminate an additional
store in certain cases. We used to lower these load intrinsics in DAG to
DAG conversion by which time, the "Dead Store Elimination" pass is
already run. There is an associated LLVM patch.
    
Patch by Sumanth Gundapaneni.

llvm-svn: 328776
2018-03-29 13:54:31 +00:00
Krzysztof Parzyszek 1ef2a1f414 [Hexagon] Add support for "new" circular buffer intrinsics
These instructions have been around for a long time, but we
haven't supported intrinsics for them. The "new" vesrions use
the CSx register for the start of the buffer instead of the K
field in the Mx register.

There is a related llvm patch.

Patch by Brendon Cahoon.

llvm-svn: 328725
2018-03-28 19:40:57 +00:00
Matt Arsenault b130ea5605 AMDGPU: Update datalayout for stack alignment
llvm-svn: 328657
2018-03-27 19:26:51 +00:00
Krzysztof Parzyszek 0aead04325 Update test after r328635 in LLVM
llvm-svn: 328641
2018-03-27 17:17:39 +00:00
Pirama Arumuga Nainar fbfba29d74 [CodeGen] Mark fma as const for Android
Summary:
r318093 sets fma, fmaf, fmal as const for Gnu and MSVC.  Android also
does not set errno for these functions.  So mark these const for
Android.

Reviewers: spatel, efriedma, srhines, chh, enh

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D44852

llvm-svn: 328552
2018-03-26 17:03:34 +00:00
Abderrazek Zaafrani b5ac56fb81 [ARM] Add ARMv8.2-A FP16 vector intrinsic
Putting back the code in commit r327189 that was reverted in r322737. The code is being committed in three stages and this one is the last stage: 1) r327455 fp16 feature flags, 2) r327836 pass half type or i16 based on FullFP16, and 3) the code here which the front-end fp16 vector intrinsic for ARM.

Differential revision https://reviews.llvm.org/D43650

llvm-svn: 328277
2018-03-23 00:08:40 +00:00
Rafael Espindola 1193c370b4 Set dso_local on builtin functions.
The difference between CreateRuntimeFunction and CreateBuiltinFunction
is that CreateBuiltinFunction would not set dllimport or dso_local.

To keep the current semantics, just forward to CreateRuntimeFunction
with Local=true so it doesn't add dllimport.

llvm-svn: 328224
2018-03-22 18:03:13 +00:00
Jonas Devlieghere f070268701 [CodeGen] Emit DWARF "constructor" calling convention
Now that LLVM has support for emitting calling conventions in DWARF (see
r328191) have clang emit them.

Patch by: Adrien Guinet

Differential revision: https://reviews.llvm.org/D42351

llvm-svn: 328196
2018-03-22 13:53:30 +00:00
Artem Belevich 30512869ff [NVPTX] Make tensor shape part of WMMA intrinsic's name.
This is needed for the upcoming implementation of the
new 8x32x16 and 32x8x16 variants of WMMA instructions
introduced in CUDA 9.1.

Differential Revision: https://reviews.llvm.org/D44719

llvm-svn: 328158
2018-03-21 21:55:02 +00:00
Rafael Espindola e28ff4d43f Add CHECKs for a few declarations. NFC.
We were just missing test coverage for this.

llvm-svn: 328048
2018-03-20 21:54:14 +00:00
Rafael Espindola 0d40f12596 Set dso_local on string literals.
llvm-svn: 328040
2018-03-20 20:42:55 +00:00
Abderrazek Zaafrani 585051ae74 [AArch64] Add vmulxh_lane fp16 vector intrinsic
https://reviews.llvm.org/D44591

llvm-svn: 328038
2018-03-20 20:37:31 +00:00
Saleem Abdulrasool 29149d5cb7 Basic: support PreserveMost and PreserveAll on Windows ARM
Do not ignore these calling conventions on Windows ARM.  They are used
by the swift runtime for certain calls.

llvm-svn: 328007
2018-03-20 17:33:26 +00:00
Rafael Espindola dca06024e8 Set dso_local for CFConstantStringClassReference.
This one cannot use setGVProperties since it has special logic for
when it is dllimport or not.

llvm-svn: 327993
2018-03-20 15:48:00 +00:00
Oren Ben Simhon 220671a080 Adding nocf_check attribute for cf-protection fine tuning
The patch adds nocf_check target independent attribute for disabling checks that were enabled by cf-protection flag.
The attribute can be appertained to functions and function pointers.
Attribute name follows GCC's similar attribute name.

Differential Revision: https://reviews.llvm.org/D41880

llvm-svn: 327768
2018-03-17 13:31:35 +00:00
Reid Kleckner fb93154bf1 [MS] Don't escape MS C++ names with \01
It is not needed after LLVM r327734. Now it will be easier to copy-paste
IR symbol names from Clang.

llvm-svn: 327738
2018-03-16 20:36:49 +00:00
Rafael Espindola 3c8a39cfbb Set dso_local for NSConcreteStackBlock.
llvm-svn: 327544
2018-03-14 18:19:26 +00:00
Sjoerd Meijer 95da875898 This reverts "r327189 - [ARM] Add ARMv8.2-A FP16 vector intrinsic"
This is causing problems in testing, and PR36683 was raised.
Reverting it until we have sorted out how to pass f16 vectors.

llvm-svn: 327437
2018-03-13 19:38:56 +00:00
George Burgess IV 4deb75d2e8 [CodeGen] Eagerly emit lifetime.end markers for calls
In C, we'll wait until the end of the scope to clean up aggregate
temporaries used for returns from calls. This means in cases like:

{
  // Assuming that `Bar` is large enough to warrant indirect returns
  struct Bar b = {};
  b = foo(&b);
  b = foo(&b);
  b = foo(&b);
  b = foo(&b);
}

...We'll allocate space for 5 Bars on the stack (`b`, and 4
temporaries). This becomes painful in things like large switch
statements.

If cleaning up sooner is trivial, we should do it.

llvm-svn: 327229
2018-03-10 23:06:31 +00:00
Abderrazek Zaafrani 5bd68cf742 [ARM] Add ARMv8.2-A FP16 vector intrinsic
Add the fp16 neon vector intrinsic for ARM as described in the ARM ACLE document.

Reviews in https://reviews.llvm.org/D43650

llvm-svn: 327189
2018-03-09 23:39:34 +00:00