Commit Graph

422842 Commits

Author SHA1 Message Date
Bradley Smith 8f623f4ab0 [AArch64][SVE] Restore SP from FP when SVE CSRs and variable sized objects are present
Without SVE, after a dynamic stack allocation has modified the SP, it is
presumed that a frame pointer restoration will revert the SP back to
it's correct value prior to any caller stack being restored. However the
SVE frame is restored using the stack pointer directly, as it is located
after the frame pointer. This means that in the presence of a dynamic
stack allocation, any SVE callee state gets corrupted as SP has the
incorrect value when the SVE state is restored.

To address this issue, when variable sized objects and SVE CSRs are
present, treat the stack as having been realigned, hence restoring the
stack pointer from the frame pointerr prior to restoring the SVE state.

Differential Revision: https://reviews.llvm.org/D124615
2022-05-04 12:57:03 +00:00
Nikita Popov 032cc74d69 [InstCombine] Fix commuted tests (NFC)
As pointed out on D124710, these need more thwarting.
2022-05-04 14:52:31 +02:00
Nikita Popov b62e9f63bb [SCEV] Add poison implication tests for umin_seq (NFC) 2022-05-04 14:47:46 +02:00
Aaron Ballman 6234313c6d Fix failing buildbot for lldb
This should address the issue found by:
https://lab.llvm.org/buildbot/#/builders/68/builds/31827
2022-05-04 08:42:52 -04:00
Aaron Ballman 2cb2cd242c Change the behavior of implicit int diagnostics
C89 allowed a type specifier to be elided with the resulting type being
int, aka implicit int behavior. This feature was subsequently removed
in C99 without a deprecation period, so implementations continued to
support the feature. Now, as with implicit function declarations, is a
good time to reevaluate the need for this support.

This patch allows -Wimplicit-int to issue warnings in C89 mode (off by
default), defaults the warning to an error in C99 through C17, and
disables support for the feature entirely in C2x. It also removes a
warning about missing declaration specifiers that really was just an
implicit int warning in disguise and other minor related cleanups.
2022-05-04 08:35:47 -04:00
Phoebe Wang b540ee5402 [X86] Fix redundant `%s` in RUN command. NFC 2022-05-04 20:29:50 +08:00
Andrzej Warzynski 02fb5b771d [flang][driver] Define the default frontend driver triple
*SUMMARY*
Currently, the frontend driver assumes that a target triple is either:
  * provided by the frontend itself (e.g. when lowering and generating
    code),
  * specified through the `-triple/-target` command line flags.

If `-triple/-target` is not used, the frontend will simply use the host
triple.

This is going to be insufficient when e.g. consuming an LLVM IR file
that has no triple specified (reading LLVM files is WIP, see D124667).
We shouldn't require the triple to be specified via the command line in
such situation. Instead, the frontend driver should contain a good
default, e.g.  the host triple.

This patch updates Flang's `CompilerInvocation` to do just that, i.e.
defines its default target triple. Similarly to Clang:
 * the default `CompilerInvocation` triple is set as the host triple,
 * the value specified with `-triple` takes precedence over the frontend
   driver default and the current module triple,
 * the frontend driver default takes precedence over the module triple.

*TESTS*
This change requires 2 unit tests to be updated. That's because relevant
frontend actions are updated to assume that there's always a valid
triple available in the current `CompilerInvocation`. This update is
required because the unit tests bypass the regular `CompilerInvocation`
set-up (in particular, they don't call
`CompilerInvocation::CreateFromArgs`). I've also taken the liberty to
disable the pre-precossor formatting in the affected unit tests as well
(it is not required).

No new tests are added. As `flang-new -fc1` does not support consuming
LLVM IR files just yet, it is not possible to compile an LLVM IR file
without a triple. More specifically, atm all LLVM IR files are generated
and stored internally and the driver makes sure that these contain a
valid target triple. This is about to change in D124667 (which adds
support for reading LLVM IR/BC files) and that's where tests for
exercising the default frontend driver triple will be added.

*WHAT DOES CLANG DO?*
For reference, the default target triple for Clang's
`CompilerInvocation` is set through option marshalling infra [1] in
Options.td. Please check the definition of the `-triple` flag:
```
def triple : Separate<["-"], "triple">,
  HelpText<"Specify target triple (e.g. i686-apple-darwin9)">,
  MarshallingInfoString<TargetOpts<"Triple">, "llvm::Triple::normalize(llvm::sys::getDefaultTargetTriple())">,
  AlwaysEmit, Normalizer<"normalizeTriple">;
```
Ideally, we should re-use the marshalling infra in Flang.

[1] https://clang.llvm.org/docs/InternalsManual.html#option-marshalling-infrastructure

Differential Revision: https://reviews.llvm.org/D124664
2022-05-04 12:01:53 +00:00
Tobias Hieta 350bdf9227 [CMake] Make omitting CMAKE_BUILD_TYPE an error
After a lot of discussion in this diff the consensus was that it is really hard to guess the users intention with their LLVM build. Instead of trying to guess if Debug or Release is the correct default option we opted for just not specifying CMAKE_BUILD_TYPE a error.

Discussion on discourse here:
https://discourse.llvm.org/t/rfc-select-a-better-linker-by-default-or-warn-about-using-bfd

Reviewed By: hans, mehdi_amini, aaron.ballman, jhenderson, MaskRay, awarzynski

Differential Revision: https://reviews.llvm.org/D124153
2022-05-04 14:01:33 +02:00
Simon Pilgrim cbd3902fa3 [X86] load-local illegal types tests - expose the load/store stack offsets
Make it easier to track whats going on accessing parts of the custom sized types
2022-05-04 12:21:07 +01:00
Florian Hahn 8b48223447
Recommit "[VPlan] Remove uneeded needsVectorIV check."
This reverts commit f4e1eaa375.

The patch was originally reverted because it uncovered an issue that has
now been fixed in 0ef8ca6d88.
2022-05-04 10:53:42 +01:00
Jonas Paulsson fbaec11683 [SystemZ] Avoid crashing in tryRISBGZero().
Bail out from cases where the result is a ConstantSDNode as it cannot be
selected and should typically not end up here.

Fixes: #55204

Reviewed By: Ulrich Weigand
2022-05-04 11:38:50 +02:00
Daniil Dudkin 8867e83d00 [flang] Fix ICE for passing a label for non alternate return arguments
When we pass an alternate return specifier to a regular (not an asterisk)
dummy argument, flang would throw an internal compiler error of
derefencing a null pointer.
To avoid the ICE, a check was added.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D123947
2022-05-04 12:32:33 +03:00
Tobias Hieta 30e8796496 [docs] Improve documentation around CMAKE_BUILD_TYPE
See discussion in: https://reviews.llvm.org/D124153

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D124367
2022-05-04 11:23:45 +02:00
Ulrich Weigand 71672375fe [libunwind][SystemZ] Unwind out of signal handlers
Unwinding out of signal handlers currently does not work since
the sigreturn trampoline is not annotated with CFI data.

Fix this by detecting the sigreturn trampoline during unwinding
and providing appropriate unwind data manually. This follows
closely the approach used by existing code for the AArch64 target.

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D124765
2022-05-04 10:43:11 +02:00
Martin Liska f1b9245199 tsan: fix GCC warnings
Fixes:

tsan/tsan_shadow.h:93:32: warning: enumerated and non-enumerated type in conditional expression [-Wextra]
tsan/tsan_shadow.h:94:44: warning: enumerated and non-enumerated type in conditional expression [-Wextra]

Differential Revision: https://reviews.llvm.org/D124828
2022-05-04 10:22:03 +02:00
Matthias Springer b34ea97f55 [mlir][linalg][bufferize][NFC] Remove remaining Comprehensive Bufferize code
This commit removes the Linalg Comprehensive Bufferize pass.

Differential Revision: https://reviews.llvm.org/D124854
2022-05-04 17:19:44 +09:00
Matthias Springer 5f60c4825b [mlir][linalg][bufferize][NFC] Make init_tensor elimination a separate pre-processing pass
This commit decouples init_tensor elimination from the rest of the bufferization.

Differential Revision: https://reviews.llvm.org/D124853
2022-05-04 17:17:27 +09:00
Fangrui Song 5a44980f0a [ELF] Support custom sections between DATA_SEGMENT_ALIGN and DATA_SEGMENT_RELRO_END
We currently hard code RELRO sections. When a custom section is between
DATA_SEGMENT_ALIGN and DATA_SEGMENT_RELRO_END, we may report a spurious
`error: section: ... is not contiguous with other relro sections`. GNU ld
makes such sections RELRO.

glibc recently switched to default --with-default-link=no. This configuration
places `__libc_atexit` and others between DATA_SEGMENT_ALIGN and
DATA_SEGMENT_RELRO_END. This patch allows such a ld.bfd --verbose
linker script to be fed into lld.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D124656
2022-05-04 01:10:46 -07:00
Matthias Springer 37a1473524 [mlir][bufferize] Allow in-place bufferization for writes to init_tensors in loops
This commit relaxes the rules around ops that define a value but do not specify the tensor's contents. (The only such op at the moment is init_tensor.)

When such a tensor is written in a loop, it should not cause out-of-place bufferization.

Differential Revision: https://reviews.llvm.org/D124849
2022-05-04 16:43:43 +09:00
serge-sans-paille 7030654296 [iwyu] Handle regressions in libLLVM header include
Running iwyu-diff on LLVM codebase since fa5a4e1b95 detected a few
regressions, fixing them.

Differential Revision: https://reviews.llvm.org/D124847
2022-05-04 08:32:38 +02:00
Marius Brehler 63aaf9a6e7 [mlir] Add missing CMake deps to mlir-pdll
Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D124851
2022-05-04 06:17:13 +00:00
Luboš Luňák 9c34a16c7c [ThreadPool] delete debug global variable if not needed
https://lab.llvm.org/buildbot/#/builders/5/builds/23099
2022-05-04 08:12:45 +02:00
Douglas Yung 0cb59607dc Mark test icf-safe.s as requiring aarch64 to fix buildbots which don't build that target. 2022-05-03 22:45:43 -07:00
Luboš Luňák 20048f3150 [lldb] use one shared ThreadPool and task groups
As a preparation for parallelizing loading of symbols (D122975),
it is necessary to use just one thread pool to avoid using
a thread pool from inside a task of another thread pool.

Differential Revision: https://reviews.llvm.org/D123226
2022-05-04 06:18:20 +02:00
Luboš Luňák 8ef5710e63 [ThreadPool] add ability to group tasks into separate groups
This is needed for parallelizing of loading modules symbols in LLDB
(D122975). Currently LLDB can parallelize indexing symbols
when loading a module, but modules are loaded sequentially. If LLDB
index cache is enabled, this means that the cache loading is not
parallelized, even though it could. However doing that creates
a threadpool-within-threadpool situation, so the number of threads
would not be properly limited.

This change adds ThreadPoolTaskGroup as a simple type that can be
used with ThreadPool calls to put tasks into groups that can be
independently waited for (even recursively from within a task)
but still run in the same thread pool.

Differential Revision: https://reviews.llvm.org/D123225
2022-05-04 06:16:55 +02:00
Luo, Yuanke 764676b737 [fastregalloc] Fix bug when undef value is tied to def.
If the tied use is undef value, fastregalloc should free the def
register. There is no reload needed for the undef value.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D124834
2022-05-04 12:12:55 +08:00
Craig Topper 1d6430b9e2 [RISCV] Update isLegalAddressingMode for RVV.
RVV instructions only support base register addressing.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D124820
2022-05-03 19:49:11 -07:00
Craig Topper 9cce9a126c [RISCV] Make use of SHXADD instructions in RVV spill/reload code.
We can use SH1ADD, SH2ADD, SH3ADD to multipy by 3, 5, and 9 respectively.

We could extend this to 3, 5, or 9 multiplied by a power 2 by also
emitting a SLLI.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D124824
2022-05-03 19:35:21 -07:00
Craig Topper 0971819740 [RISCV] Don't lookup TII in RISCVInstrInfo::getVLENFactoredAmount. NFCI
We're already inside of our implementation of TII.
2022-05-03 19:35:21 -07:00
Amir Ayupov 60957a5a08 [BOLT] Fix ICPJumpTablesTopN option use
Fix non-sensical `opts::ICPJumpTablesTopN != 0 ? opts::ICPTopN : opts::ICPTopN`.
Refactor/simplify another similar assignment.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124880
2022-05-03 19:34:10 -07:00
Amir Ayupov c3d5372093 [BOLT][NFC] Make ICP options naming uniform
Rename `opts::IndirectCallPromotion*` to `opts::ICP*`, making option naming
uniform and easier to follow.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124879
2022-05-03 19:32:45 -07:00
Amir Ayupov d0b1c98c96 [BOLT][NFC] ICP: simplify findTargetsIndex
Unnest lambda and use `llvm::is_contained`.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124877
2022-05-03 19:31:20 -07:00
Amir Ayupov ec02227bf7 [BOLT][NFC] Refactor ICP::findCallTargetSymbols
Reduce nesting making it easier to read.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124876
2022-05-03 19:29:22 -07:00
Amir Ayupov f9db6d2d5b [BOLT][CMAKE] Fix llvm-bolt-fuzzer build
Add X86/AArch64 targets to resolve missing dependencies, e.g.:
`undefined reference to `LLVMInitializeX86AsmParser'`

Follow-up to D124206

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124886
2022-05-03 19:25:48 -07:00
Weverything 5afd20806d [riscv] Mark function as used to avoid unused warning. 2022-05-03 18:51:23 -07:00
Hongtao Yu 3113e5bb52 [CSSPGO] Relax size limitation for priority inlining with preinlined profile
As a follow-up to D124632, I'm turning on unlimited size caps for inlining with preinlined profile. It should be safe as a preinlined profile has "bounded" inline contexts.

No noticeable size or perf delta was seen with two of our internal large services, but I think this is still a good change to be consistent with the other case.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D124793
2022-05-03 18:43:07 -07:00
Hongtao Yu e95ae395aa [CSSPGO][NFC] Replace SampleProfileLoader::ProfileIsCS with FunctionSamples::ProfileIsCS.
The two fields have the same meaning. Their values come from the reader. Therefore I'm removing one.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D124788
2022-05-03 18:32:37 -07:00
Alex Borcan e29dc0c6fd [lld] Implement safe icf for MachO
This change implements --icf=safe for MachO based on addrsig section that is implemented in D123751.

Reviewed By: int3, #lld-macho

Differential Revision: https://reviews.llvm.org/D123752
2022-05-03 21:01:03 -04:00
Joseph Huber 46a5a8029e [OpenMP] Fix save-temps name in linker wrapper
Summary:
The wrapped registration code had a typo in the save-temps version of
the name.
2022-05-03 20:51:05 -04:00
Philip Reames dbe716e874 [riscv] Add vsetvli tests involving moves to/from scalar regs 2022-05-03 17:25:35 -07:00
Philip Reames dbbbc9e2ca [riscv] Add a couple more vsetvli tests 2022-05-03 16:49:52 -07:00
Weverything 0e86cddf98 [psuedo] Fix for unused warning by moving code into debug macro. 2022-05-03 16:07:59 -07:00
Weverything 3dd00461f9 [trace][intelpt] Fix out-of-bounds access.
The StringRef single argument constructor expects a null-terminated
string.  Explicitly pass the size to prevent reading pass the end
of the array.
2022-05-03 16:07:58 -07:00
Matt Arsenault c4e5a24dd6 ARM: Fix using undefined virtual registers in test
The verifier apparently doesn't work correctly and should have
caught this.
2022-05-04 00:05:49 +01:00
Matt Arsenault 994c96aef6 ARM: Cleanup MIR test
Drop IR section, renumber registers, regenerate to use -NEXT
2022-05-04 00:05:15 +01:00
Matt Arsenault 574ca03ef3 AMDGPU: Remove some invalid kill flags in tests
These killed registers need to be live out of the block but the
verifier wasn't catching it.
2022-05-04 00:05:15 +01:00
Matt Arsenault 5dfe4b7cf2 AMDGPU: Regenerate test checks 2022-05-04 00:05:15 +01:00
Matt Arsenault 241ca47db5 llvm-reduce: Reduce includes 2022-05-04 00:05:15 +01:00
Amir Ayupov 1d5263c554 [BOLT][TEST] Fix test failures on AArch64 builder
Address X86 tests failures on AArch64 builder:
https://lab.llvm.org/staging/#/builders/211/builds/82

Inputs fail to cross-compile due to a missing header:
```
/usr/include/stdio.h:27:10: fatal error: 'bits/libc-header-start.h' file not found
#include <bits/libc-header-start.h>
```

As inputs are linked with `-nostdlib` anyway, don't include stdio.h.

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D124863
2022-05-03 15:39:43 -07:00
Alex Borcan afaa56df7a Implement support for __llvm_addrsig for MachO in llvm-mc
The __llvm_addrsig section is a section that the linker needs for safe icf.
This was not yet implemented for MachO - this is the implementation.
It has been tested with a safe deduplication implementation inside lld.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D123751
2022-05-03 18:19:18 -04:00