llvm-project

Commit Graph

Author	SHA1	Message	Date
Tim Northover	01b4aa9437	ARM: tell LLVM about zext properties of ldrexb/ldrexh Implementing this via ComputeMaskedBits has two advantages: + It actually works. DAGISel doesn't deal with the chains properly in the previous pattern-based solution, so they never trigger. + The information can be used in other DAG combines, as well as the trivial "get rid of truncs". For example if the trunc is in a different basic block. rdar://problem/16227836 llvm-svn: 205540	2014-04-03 15:10:35 +00:00
Stephen Lin	3e1f15abc2	Update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change. llvm-svn: 186594	2013-07-18 18:35:22 +00:00
Tim Northover	a7ecd241d2	ARM: implement ldrex, strex and clrex intrinsics Intrinsics already existed for the 64-bit variants, so these support operations of size at most 32-bits. llvm-svn: 186392	2013-07-16 09:46:55 +00:00

Author

SHA1

Message

Date

Tim Northover

01b4aa9437

ARM: tell LLVM about zext properties of ldrexb/ldrexh

Implementing this via ComputeMaskedBits has two advantages:
  + It actually works. DAGISel doesn't deal with the chains properly
    in the previous pattern-based solution, so they never trigger.
  + The information can be used in other DAG combines, as well as the
    trivial "get rid of truncs". For example if the trunc is in a
    different basic block.

rdar://problem/16227836

llvm-svn: 205540

2014-04-03 15:10:35 +00:00

Stephen Lin

3e1f15abc2

Update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change.

llvm-svn: 186594

2013-07-18 18:35:22 +00:00

Tim Northover

a7ecd241d2

ARM: implement ldrex, strex and clrex intrinsics

Intrinsics already existed for the 64-bit variants, so these support operations
of size at most 32-bits.

llvm-svn: 186392

2013-07-16 09:46:55 +00:00

3 Commits