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1121 Commits

Author SHA1 Message Date
Evan Cheng e3a53c448b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead. 
llvm-svn: 75048
 2009-07-08 21:03:57 +00:00
Torok Edwin f8d479c1ce Missed an exit during the conversion. 
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.

llvm-svn: 75045
 2009-07-08 20:55:50 +00:00
Torok Edwin fb8d6d5b58 Implement changes from Chris's feedback. 
Finish converting lib/Target.

llvm-svn: 75043
 2009-07-08 20:53:28 +00:00
Bob Wilson 1d298fd75b Implement NEON vst1 instruction. 
llvm-svn: 75037
 2009-07-08 20:32:02 +00:00
David Goodwin 03ab0bbb24 Generalize opcode selection in ARMBaseRegisterInfo. 
llvm-svn: 75036
 2009-07-08 20:28:28 +00:00
Xerxes Ranby b009980f0b Fix cmake build. 
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt

llvm-svn: 75035
 2009-07-08 20:13:41 +00:00
David Goodwin 9ca33e8a9f Push methods into base class in preparation for sharing. 
llvm-svn: 75020
 2009-07-08 18:31:39 +00:00
Bob Wilson f731a2df6b Implement NEON vld1 instructions. 
llvm-svn: 75019
 2009-07-08 18:11:30 +00:00
Torok Edwin 6dd2730024 Start converting to new error handling API. 
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)

llvm-svn: 75018
 2009-07-08 18:01:40 +00:00
David Goodwin eebf58805c Start breaking out common base functionality for register info. 
llvm-svn: 75016
 2009-07-08 17:28:55 +00:00
David Goodwin af7451b674 Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
llvm-svn: 75010
 2009-07-08 16:09:28 +00:00
Nick Lewycky a21d3daadc Remove the vicmp and vfcmp instructions. Because we never had a release with 
these instructions, no autoupgrade or backwards compatibility support is
provided.

llvm-svn: 74991
 2009-07-08 03:04:38 +00:00
Evan Cheng 14965760a7 Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. 
llvm-svn: 74988
 2009-07-08 01:46:35 +00:00
Evan Cheng b61e3a83ee Add a todo. 
llvm-svn: 74976
 2009-07-08 00:05:05 +00:00
Evan Cheng f0080b734a Also statically set bit 25 for BR_JT instructions. 
llvm-svn: 74974
 2009-07-07 23:45:10 +00:00
Evan Cheng 2cff076cfe Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan. 
llvm-svn: 74972
 2009-07-07 23:40:25 +00:00
Evan Cheng d0611f9a37 Add Thumb2 movcc instructions. 
llvm-svn: 74946
 2009-07-07 20:39:03 +00:00
Evan Cheng 02a44edf12 Add BX and BXr9 encodings. Patch by Sean Callanan. 
llvm-svn: 74938
 2009-07-07 19:16:24 +00:00
Evan Cheng d0f6324cdc Add Thumb2 pkhbt / pkhtb. 
llvm-svn: 74895
 2009-07-07 05:35:52 +00:00
Evan Cheng b24e51e2d9 Add some more Thumb2 multiplication instructions. 
llvm-svn: 74889
 2009-07-07 01:17:28 +00:00
Evan Cheng 7c9434399d 80 col violation. 
llvm-svn: 74888
 2009-07-07 01:16:41 +00:00
Evan Cheng 3d8ccdb4be isThumb2 really should mean thumb2 only, not thumb2+. 
llvm-svn: 74871
 2009-07-06 22:29:14 +00:00
Evan Cheng 40398233b7 Add bfc to armv6t2. 
llvm-svn: 74868
 2009-07-06 22:23:46 +00:00
Evan Cheng e63b0e6f79 Added ARM::mls for armv6t2. 
llvm-svn: 74866
 2009-07-06 22:05:45 +00:00
Bruno Cardoso Lopes 5661ea68e7 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some 
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
 2009-07-06 05:09:34 +00:00
Tilmann Scheller aea6059ed4 Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call. 
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.

llvm-svn: 74764
 2009-07-03 06:44:53 +00:00
Evan Cheng 0e8bde5910 Add thumb2 sign / zero extend with rotate instructions. 
llvm-svn: 74755
 2009-07-03 01:43:10 +00:00
Evan Cheng 6d9041100b Add Thumb2 load / store multiple instructions. Not used yet. 
llvm-svn: 74749
 2009-07-03 00:18:36 +00:00
Evan Cheng f30ee8820a t2LDR_PRE etc are loads. 
llvm-svn: 74741
 2009-07-03 00:08:19 +00:00
Evan Cheng 53cdf022b6 Added indexed stores. 
llvm-svn: 74740
 2009-07-03 00:06:39 +00:00
Evan Cheng 8ecd7eb3f7 Sign extending pre/post indexed loads. 
llvm-svn: 74736
 2009-07-02 23:16:11 +00:00
David Goodwin ade05a37f1 Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. 
llvm-svn: 74731
 2009-07-02 22:18:33 +00:00
Douglas Gregor 6141511621 CMake build fixes, from Xerxes Ranby 
llvm-svn: 74720
 2009-07-02 18:53:52 +00:00
Evan Cheng 84c6cda2ef Thumb2 pre/post indexed loads. 
llvm-svn: 74696
 2009-07-02 07:28:31 +00:00
Evan Cheng 844f0b4562 80 col violation. 
llvm-svn: 74693
 2009-07-02 06:44:30 +00:00
Evan Cheng 2c450d35ae Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate. 
llvm-svn: 74692
 2009-07-02 06:38:40 +00:00
Evan Cheng 979da0e590 80 col violation. 
llvm-svn: 74683
 2009-07-02 01:30:04 +00:00
Evan Cheng d9c55368e7 Factor out ARM indexed load matching code. 
llvm-svn: 74681
 2009-07-02 01:23:32 +00:00
Bob Wilson deb35afd23 Add a new addressing mode for NEON load/store instructions. 
llvm-svn: 74658
 2009-07-01 23:16:05 +00:00
Bob Wilson affb68bd08 Fix a comment typo. 
llvm-svn: 74650
 2009-07-01 21:59:43 +00:00
Bob Wilson bbbf805049 Fix up a comment: besides the >80col lines, the operation for this 
addressing mode is encoded in the second operand, not the third.

llvm-svn: 74641
 2009-07-01 21:22:45 +00:00
Bill Wendling 512ff7353e Update comments to make it clear that the function alignment is the Log2 of the 
bytes and not bytes.

llvm-svn: 74624
 2009-07-01 18:50:55 +00:00
Evan Cheng d379e896ff Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
llvm-svn: 74580
 2009-07-01 01:59:31 +00:00
Daniel Dunbar 75c12e1569 Remove unused AsmPrinter OptLevel argument, and propogate. 
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579
 2009-07-01 01:48:54 +00:00
David Goodwin 86c7e20ca6 Add PIC load and store patterns for Thumb-2. 
llvm-svn: 74577
 2009-07-01 00:01:13 +00:00
David Goodwin a83100f687 Thumb-2 load and store double description. But nothing yet creates them. 
llvm-svn: 74566
 2009-06-30 22:50:01 +00:00
Bill Wendling 31ceb1bcba Add an "alignment" field to the MachineFunction object. It makes more sense to 
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.

llvm-svn: 74564
 2009-06-30 22:38:32 +00:00
David Goodwin d0890a2bad Add thumb-2 store word, halfword, and byte. 
llvm-svn: 74555
 2009-06-30 22:11:34 +00:00
David Goodwin 28d6d87244 Improve Thumb-2 jump table support. 
llvm-svn: 74549
 2009-06-30 19:50:22 +00:00
David Goodwin 27303cde82 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table. 
llvm-svn: 74543
 2009-06-30 18:04:13 +00:00