Commit Graph

89522 Commits

Author SHA1 Message Date
Vincent Lejeune f940fd05bd R600: Do not fold single instruction with more that 3 kcache read
It fixes around 100 tfb piglit tests and 16 glean tests.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175183
2013-02-14 16:57:19 +00:00
Vincent Lejeune ea710fe419 R600: Export instructions are no longer terminator
This allows MachineInstScheduler to reorder them, and thus make scheduling more
efficient.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175182
2013-02-14 16:55:11 +00:00
Vincent Lejeune d80bc1561a R600: Fold zero/one in export instructions
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175181
2013-02-14 16:55:06 +00:00
Vincent Lejeune f694c10c8e R600: Do not fold modifier/litterals in vector inst
This fixes a couple of regressions on (probably not just) cayman

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175180
2013-02-14 16:55:01 +00:00
Tim Northover bfe8468502 Use correct host/target CMake variables to define lit variables.
CMake and autotools disagree on what "host" means in a cross-compilation
context. Autotools (and lit) take it to be the machine the binaries being
compiled now will run on. CMake takes it to be the machine actually compiling
the binaries now.

This change makes lit.site-cfg more consistent between autotools and CMake,
allowing lit tests (particularly in ExecutionEngine) to run correctly when
cross-compiled with CMake

llvm-svn: 175179
2013-02-14 16:49:32 +00:00
Tim Northover d514fd59a6 AArch64: switch from neverHasSideEffects to hasSideEffects.
llvm-svn: 175176
2013-02-14 16:31:12 +00:00
Tim Northover 7bfec3e786 Add deprecation of neverHasSideEffects to documentation comments.
llvm-svn: 175175
2013-02-14 16:31:06 +00:00
Rafael Espindola 86d5345988 Revert r15266. This fixes llvm.org/pr15266.
llvm-svn: 175173
2013-02-14 16:23:08 +00:00
Tim Northover d21ddb9042 AArch64: stop claiming that NEON registers are usable for now.
If vector types have legal register classes, then LLVM bypasses LegalizeTypes
on them, which causes faults currently since the code to handle them isn't in
place.

This fixes test failures when AArch64 is the default target.

llvm-svn: 175172
2013-02-14 16:22:14 +00:00
Tim Northover 75f436c4ea AArch64: add block comments where missing
Only comments affected. No code change at all.

llvm-svn: 175169
2013-02-14 16:17:01 +00:00
Krzysztof Parzyszek f71a69d608 Add testcase for llvm-dwarfdump to test parsing of the pubnames data.
llvm-svn: 175168
2013-02-14 16:10:58 +00:00
David Chisnall 7945013a71 On FreeBSD, we need to look in /usr/local/include so that libxml2 finds iconv.h
Patch by Jonathan Anderson!

llvm-svn: 175167
2013-02-14 15:40:44 +00:00
Kristof Beyls 2efb59a719 Make ARMAsmParser accept the correct alignment specifier syntax in instructions.
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]

llvm-svn: 175164
2013-02-14 14:46:12 +00:00
Dmitry Vyukov ef8fb72fc4 llvm-symbolizer: speedup symbol lookup
llvm-svn: 175158
2013-02-14 13:06:18 +00:00
Evgeniy Stepanov a5b58f9b3b Workaround an MSan false positive.
llvm-svn: 175156
2013-02-14 12:18:32 +00:00
Elena Demikhovsky 5b9d426907 Moved line-info.ll to DebugInfo\X86 directory
llvm-svn: 175150
2013-02-14 09:07:34 +00:00
Owen Anderson cc068993ee Add some legality checks for SETCC before introducing it in the DAG combiner post-operand legalization.
llvm-svn: 175149
2013-02-14 09:07:33 +00:00
Elena Demikhovsky 70247a807b The test failed on Windows. I've changed the platform to run to "x86_64-apple-darwin".
llvm-svn: 175146
2013-02-14 08:23:08 +00:00
Elena Demikhovsky d0a0cc80cd Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure).
Added a test.

llvm-svn: 175144
2013-02-14 08:20:26 +00:00
Michel Danzer ae0a403dab R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack
Fixes assertion failure in newly added lit test. Might just be a bandaid that
needs to be revisited.

llvm-svn: 175139
2013-02-14 08:00:33 +00:00
Michel Danzer 51d5eb2f63 R600: Add lit tests for texture sampling instruction selection.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175138
2013-02-14 07:43:51 +00:00
Andrew Trick 6871e5f4e5 Reapply "s/grep/FileCheck/ in some tests"
This reverts commit fd1335e982bbf93c5f450ed4fd29f9f787435c85.

Use a triple this time.

llvm-svn: 175134
2013-02-14 03:45:08 +00:00
Rafael Espindola 8868faac14 Revert r175120 and r175121. Clang is producing the expected asm names again.
llvm-svn: 175133
2013-02-14 03:33:34 +00:00
Cameron Zwarich 8f55064a06 RegisterCoalescer::reMaterializeTrivialDef() can constrain the destination
register class to match the defining instruction.

llvm-svn: 175130
2013-02-14 03:25:24 +00:00
Francois Pichet f7ce882297 Add missing typename to unbreak the MSVC 2012 build.
llvm-svn: 175129
2013-02-14 03:24:14 +00:00
Nick Lewycky 06417743cf Teach the DataLayout aware constant folder to be much more aggressive towards
'and' instructions. This is a pattern that shows up a lot in ubsan binaries.

llvm-svn: 175128
2013-02-14 03:23:37 +00:00
Reed Kotler ec8a54904e Remove the form field from Mips16 instruction formats and set things
up so that we can apply the direct object emitter patch. This patch
should be a nop right now and it's test is to not break what is already
there.
 

llvm-svn: 175126
2013-02-14 03:05:25 +00:00
Andrew Trick 836bf1526b Revert "s/grep/FileCheck/ in some tests"
This reverts commit 8b75e6bc35fb3f9c1e788dbd05084c0f4a60a0f3.

The FileCheck tests are not equivalent:

test/CodeGen/X86/tailcall-structret.ll:6:10: error: expected string not found in input
; CHECK: jmp init
         ^
<stdin>:1:2: note: scanning from here
 .section __TEXT,__text,regular,pure_instructions
 ^
<stdin>:13:2: note: possible intended match here
 jmp _init ## TAILCALL
 ^

llvm-svn: 175124
2013-02-14 03:00:57 +00:00
Cameron Zwarich 48ab445621 Fix RegisterCoalescer::rematerializeTrivialDef() so that it works on flipped
CoalescerPairs. Also, make it take a CoalescerPair directly like other methods
of RegisterCoalescer.

llvm-svn: 175123
2013-02-14 02:51:05 +00:00
Cameron Zwarich 1195e819bb Fix some issues with rematerialization in RegisterCoalescer when the destination
of the copy is a subregister def. The current code assumes that it can do a full
def of the destination register, but it is not checking that the def operand is
read-undef. It also doesn't clear the subregister index of the destination in
the new instruction to reflect the full subregister def.

These issues were found running 'make check' with my next commit that enables
rematerialization in more cases.

llvm-svn: 175122
2013-02-14 02:51:03 +00:00
Rafael Espindola 3c818086f2 Don't assume the mangling of static functions.
llvm-svn: 175121
2013-02-14 02:49:18 +00:00
Rafael Espindola 764993493c Don't asume that a static function in an extern "C" block will not be mangled.
Since functions with internal linkage don't have language linkage, it is valid
to overload them:

extern "C" {
       static int foo();
       static int foo(int);
}

So we mangle them.

llvm-svn: 175120
2013-02-14 01:58:08 +00:00
Weiming Zhao 090edf7e67 temporarily revert the patch due to some conflicts
llvm-svn: 175107
2013-02-13 23:24:40 +00:00
Bill Wendling 7297b864a4 Retain the name of the new internal global that's been shrunk.
It's possible (e.g. after an LTO build) that an internal global may be used for
debugging purposes. If that's the case appending a '.b' to it makes it hard to
find that variable. Steal the name from the old GV before deleting it so that
they can find that variable again.

llvm-svn: 175104
2013-02-13 23:00:51 +00:00
Anshuman Dasgupta e96f804eba Hexagon: add support for predicate-GPR copies.
llvm-svn: 175102
2013-02-13 22:56:34 +00:00
Alex Rosenberg cb06d3030c llvm-gcc -pedantic warns about C++ comments in C90 mode even if they're
inside an #if 0 block.

llvm-svn: 175098
2013-02-13 22:45:52 +00:00
Ryan Govostes 568aa64f42 Fix iterator definitions for ImmutableSet and ImmutableMap.
llvm-svn: 175097
2013-02-13 22:37:27 +00:00
Tom Stellard 91da4e9199 R600: Add support for 128-bit parameters
NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175096
2013-02-13 22:05:20 +00:00
Eli Bendersky 3ffeb68dd7 s/grep/FileCheck/ in some tests
llvm-svn: 175093
2013-02-13 22:00:37 +00:00
Nick Lewycky beba972659 Don't build tail calls to functions with three inreg arguments on x86-32 PIC.
Fixes PR15250!

llvm-svn: 175092
2013-02-13 21:59:15 +00:00
Eli Bendersky 04553985d7 s/grep/FileCheck/ in some tests
llvm-svn: 175089
2013-02-13 21:46:38 +00:00
Weiming Zhao 0632a4b002 Bug fix 13622: Add paired register support for inline asm with 64-bit data on ARM
llvm-svn: 175088
2013-02-13 21:43:02 +00:00
Chad Rosier da05cf7ba7 [ms-inline asm] Fix up test case for non-Darwin platforms.
llvm-svn: 175087
2013-02-13 21:41:58 +00:00
Jyotsna Verma d92252469e Hexagon: Use absolute addressing mode loads/stores for global+offset
instead of redefining separate instructions for them.

llvm-svn: 175086
2013-02-13 21:38:46 +00:00
Ryan Govostes f5d710f0b3 Add iterator_traits to ImmutableMap and ImmutableSet.
llvm-svn: 175085
2013-02-13 21:38:22 +00:00
Chad Rosier 282edd7caa [ms-inline-asm] Add support for memory references that have non-immediate
displacements.
rdar://12974533

llvm-svn: 175083
2013-02-13 21:33:44 +00:00
Chad Rosier f43fcf5194 [ms-inline asm] Add a comment about the determinism of the rewrite sort.
llvm-svn: 175082
2013-02-13 21:27:17 +00:00
Dmitri Gribenko b5e23ef425 configure: remove workaround for gcc's -Wno-maybe-uninitialized
Since r174770 gcc version check is not needed because CXX_FLAG_CHECK
implements the workaround itself.

llvm-svn: 175080
2013-02-13 21:19:39 +00:00
Sean Silva 6c95b97bf6 [docs] PR15254: Add "AST" to the lexicon.
llvm-svn: 175077
2013-02-13 21:17:20 +00:00
Benjamin Kramer 0aa2ad6104 LoopVectorize: Simplify code for clarity.
No functionality change.

llvm-svn: 175076
2013-02-13 21:12:29 +00:00
Bill Wendling a361c9dd30 Add a blurb about the attributes changes to the release notes.
llvm-svn: 175075
2013-02-13 21:10:15 +00:00
Reed Kotler f662cff689 For Mips 16, add the optimization where the 16 bit form of addiu sp can be used
if the offset fits in 11 bits. This makes use of the fact that the abi
requires sp to be 8 byte aligned so the actual offset can fit in 8
bits. It will be shifted left and sign extended before being actually used.
The assembler or direct object emitter will shift right the 11 bit
signed field by 3 bits. We don't need to deal with that here.

llvm-svn: 175073
2013-02-13 20:28:27 +00:00
Manman Ren 7a4c8a783c Clean up LDV, no functionality change.
Remove dead functions: renameRegister
Move private member variables from LDV to Impl
Remove ssp/uwtable from testing case

llvm-svn: 175072
2013-02-13 20:23:48 +00:00
Bill Wendling 89ff87ec3b Use 'RC_XBS' instead of 'RC_BUILDIT' to catch all times when it's built in the Apple way.
llvm-svn: 175069
2013-02-13 19:44:08 +00:00
Andrew Trick 553e0fe365 MIsched: HazardRecognizers are created for each DAG. Free them.
llvm-svn: 175067
2013-02-13 19:22:27 +00:00
David Peixotto 6eecb28d3a PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA
Fixed bug in tablegen conversion when source pseudo instruction has
a different number of arguments than the destination instruction.

llvm-svn: 175066
2013-02-13 19:21:47 +00:00
Chad Rosier eb5c16893b [ms-inline-asm] Use an array_pod_sort, rather than a std:sort.
llvm-svn: 175063
2013-02-13 18:38:58 +00:00
Pekka Jaaskelainen 0d23725a8d Metadata for annotating loops as parallel. The first consumer for this
metadata is the loop vectorizer.

See the documentation update for more info.

llvm-svn: 175060
2013-02-13 18:08:57 +00:00
Krzysztof Parzyszek 2680b53d90 Add registration for PPC-specific passes to allow the IR to be dumped
via -print-after-all.

llvm-svn: 175058
2013-02-13 17:40:07 +00:00
Benjamin Kramer 8e2637e2b0 X86: Disable generation of rep;movsl when %esi is used as a base pointer.
This happens when there is both stack realignment and a dynamic alloca in the
function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the
base pointer and the next register spill will write into oblivion.

Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas
and freebsd a 4 byte stack alignment.

llvm-svn: 175057
2013-02-13 13:40:35 +00:00
Tim Northover fb6f08d5bb Mention AArch64 in release notes for 3.3
llvm-svn: 175055
2013-02-13 12:46:32 +00:00
Evgeniy Stepanov 5992fb5601 Fix MSan annotations inclusion guard.
#cmakedefine does not behave the way I though it was.

llvm-svn: 175050
2013-02-13 10:40:01 +00:00
Bill Wendling 82c2ee67dc Use array_pod_sort.
llvm-svn: 175048
2013-02-13 09:26:26 +00:00
Manuel Klimek 51e31d211c Update phab docs to clarify how to accept a change.
llvm-svn: 175047
2013-02-13 09:07:18 +00:00
Bill Wendling bce7b97c80 Add some accessor and query methods for retrieving Attribute objects and such.
llvm-svn: 175046
2013-02-13 08:42:21 +00:00
Reed Kotler 9cb8e7b9f5 Make jumptables work for -static
llvm-svn: 175044
2013-02-13 08:32:14 +00:00
Elena Demikhovsky 9e0df7cb01 Prevent insertion of "vzeroupper" before call that preserves YMM registers, since a caller uses preserved registers across the call.
llvm-svn: 175043
2013-02-13 08:02:04 +00:00
Craig Topper 8b3af04c56 Remove unnecessary condtional assignment. The next line ignores the result of the assignment with the same condition.
llvm-svn: 175042
2013-02-13 07:44:17 +00:00
Eric Christopher 19690538d3 This is actually located at the end, not the middle.
llvm-svn: 175041
2013-02-13 07:22:25 +00:00
Eric Christopher 389ee71b0a Check i1 as well as i8 variables for 8 bit registers for x86 inline
assembly.

llvm-svn: 175036
2013-02-13 06:01:05 +00:00
Eric Christopher 2398a9a175 Finish obviously broken thought.
llvm-svn: 175035
2013-02-13 06:01:00 +00:00
Kostya Serebryany 3838f27905 [tsan] disable load widening in ThreadSanitizer mode
llvm-svn: 175034
2013-02-13 05:59:45 +00:00
Kostya Serebryany caf11af9d3 [asan] fix confusing indentation
llvm-svn: 175033
2013-02-13 05:14:12 +00:00
Chris Lattner bbbb857022 use memcpy instead of dubious union to type pun two values,
thanks to David Blaike for pointing this out.

llvm-svn: 175032
2013-02-13 04:53:40 +00:00
Eric Christopher bc67170056 Fix comment.
llvm-svn: 175024
2013-02-13 02:29:18 +00:00
Manman Ren f019cd62da Debug Info: LiveDebugVarible can remove DBG_VALUEs, make sure we emit them back.
RegisterCoalescer used to depend on LiveDebugVariable. LDV removes DBG_VALUEs
without emitting them at the end.

We fix this by removing LDV from RegisterCoalescer. Also add an assertion to
make sure we call emitDebugValues if DBG_VALUEs are removed at
runOnMachineFunction.

rdar://problem/13183203
Reviewed by Andy & Jakob

llvm-svn: 175023
2013-02-13 01:14:49 +00:00
Chad Rosier b2144ce644 [ms-inline-asm] Make sure the AsmRewrite list is sorted in lexical order.
rdar://13202662

llvm-svn: 175021
2013-02-13 01:03:13 +00:00
David Peixotto 4299cf83a3 Test commit. Fixed typo.
llvm-svn: 175020
2013-02-13 00:36:35 +00:00
Arnaud A. de Grandmaison 2e4df4f7c2 Fix comment
visitSExt is an adapted copy of the related visitZExt method, so adapt the comment accordingly.

llvm-svn: 175019
2013-02-13 00:19:19 +00:00
Michael Gottesman 27029f4642 Changed isStoredObjCPointer => IsStoredObjCPointer. No functionality change.
llvm-svn: 175017
2013-02-12 23:35:08 +00:00
Bill Wendling 613c3a8e97 Add a default empty string to the 'value' of a string attribute.
llvm-svn: 175016
2013-02-12 23:14:31 +00:00
Dan Gohman a6307574d6 Actually delete this code, since it's really not clear what it's
trying to do.

llvm-svn: 175014
2013-02-12 22:26:41 +00:00
Chad Rosier c7f552c33e [ms-inline-asm] Implement align directive (which is roughly equivalent to .align).
Also, allow _EMIT and __EMIT for the emit directive.  We already do the same
for TYPE, SIZE, and LENGTH.
rdar://13200215

llvm-svn: 175008
2013-02-12 21:33:51 +00:00
Jack Carter f6622bad6b This patch just fixes up various llvm formatting
violations such as tabs, blanks at eol and long 
lines.


 

llvm-svn: 175007
2013-02-12 21:29:39 +00:00
Guy Benyei 83c74e9fad Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration.
llvm-svn: 175006
2013-02-12 21:21:59 +00:00
Dan Gohman f377160d2f Record PRE predecessors with a SmallVector instead of a DenseMap, and
avoid a second pred_iterator traversal.

llvm-svn: 175001
2013-02-12 19:49:10 +00:00
Chad Rosier 5f6b4d3fc5 [ms-inline asm] Pass the length of the IDVal, so we can do a proper AsmRewrite.
llvm-svn: 174999
2013-02-12 19:42:32 +00:00
Chad Rosier 93d629fdb8 [ms-inline asm] Accept the emit directive as either _emit or __emit.
llvm-svn: 174998
2013-02-12 19:31:23 +00:00
Dan Gohman 2001cd8f9e When disabling PRE for a value is directly redundant with itself
(through a loop), don't continue to iterate through the reamining
predecessors.

llvm-svn: 174994
2013-02-12 19:05:10 +00:00
Krzysztof Parzyszek 5974de4e7d Remove target-specific info from the testcase for DWARF/pubnames.
llvm-svn: 174992
2013-02-12 18:53:21 +00:00
Dan Gohman fd41de0b10 Check that pointers are removed from maps before calling delete on the pointers,
for tidiness' sake.

llvm-svn: 174988
2013-02-12 18:44:43 +00:00
Dan Gohman f60667020a Minor code simplification.
llvm-svn: 174985
2013-02-12 18:38:36 +00:00
Chad Rosier f72d06a919 [ms-inline asm] Add support for lexing binary integers with a [bB] suffix.
This is complicated by backward labels (e.g., 0b can be both a backward label
and a binary zero).  The current implementation assumes [0-9]b is always a
label and thus it's possible for 0b and 1b to not be interpreted correctly for
ms-style inline assembly.  However, this is relatively simple to fix in the
inline assembly (i.e., drop the [bB]).

This patch also limits backward labels to [0-9]b, so that only 0b and 1b are
ambiguous.
Part of rdar://12470373

llvm-svn: 174983
2013-02-12 18:29:02 +00:00
Dmitri Gribenko 1c3e3c1433 Documentation: HowToUseAttributes: formatting (use monospaced font)
llvm-svn: 174982
2013-02-12 18:26:08 +00:00
Krzysztof Parzyszek 228daa6986 Allow optionally generating pubnames section in DWARF info. Introduce
option "generate-dwarf-pubnames" to control it, set to "false" by default.

llvm-svn: 174981
2013-02-12 18:00:14 +00:00
Kay Tiong Khoo c5c9713fcf added test cases for r174920 (prefetch disassembly)
llvm-svn: 174979
2013-02-12 17:07:44 +00:00
Sergei Larin 5e76aa9714 Equal treatment of labels and other terminators in MI DAG construction.
MI sched DAG construction allows targets to include terminators into scheduling DAG.
Extend this functionality to labels as well.

llvm-svn: 174977
2013-02-12 16:36:03 +00:00
Krzysztof Parzyszek 97438dc75e Add support for the pubnames section to llvm-dwarfdump.
llvm-svn: 174976
2013-02-12 16:20:28 +00:00
Paul Redmond 7e7e3de43d Fix the lit test added in r174972
Patch by: Kevin Schoedel

llvm-svn: 174974
2013-02-12 16:07:27 +00:00
Jyotsna Verma 39f7a2b7a0 Hexagon: Add support to generate predicated absolute addressing mode
instructions.

llvm-svn: 174973
2013-02-12 16:06:23 +00:00
Paul Redmond 288604ed0c PR14562 - Truncation of left shift became undef
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32))
into (shl i32 v, 32) into undef. To prevent this, check the shift count
against the final result size.

Patch by: Kevin Schoedel
Reviewed by: Nadav Rotem

llvm-svn: 174972
2013-02-12 15:21:21 +00:00
Justin Holewinski be8dc6499a [NVPTX] Disable vector registers
Vectors were being manually scalarized by the backend.  Instead,
let the target-independent code do all of the work.  The manual
scalarization was from a time before good target-independent support
for scalarization in LLVM. However, this forces us to specially-handle
vector loads and stores, which we can turn into PTX instructions that
produce/consume multiple operands.

llvm-svn: 174968
2013-02-12 14:18:49 +00:00
Alexander Potapenko 259e8127ad [ASan] Do not use kDefaultShort64bitShadowOffset on Mac, where the binaries may get mapped at 0x100000000+ and thus may interleave with the shadow.
llvm-svn: 174964
2013-02-12 12:41:12 +00:00
Michel Danzer 3bb17ebd93 R600: Fix regression with shadow array sampler on pre-SI GPUs.
'R600/SI: Use proper instructions for array/shadow samplers.' removed two
cases from TEX_SHADOW. Vincent Lejeune reported on IRC that this broke some
shadow array piglit tests with the r600g driver. Reinstating the removed
cases should fix this, and still works with radeonsi as well.

I will follow up with some lit tests which would have caught the regression.

NOTE: This is a candidate for the Mesa stable branch.

Tested-by: Vincent Lejeune <vljn@ovi.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174963
2013-02-12 12:11:23 +00:00
Joe Abbey ba3e901e14 Adding a HowTo for Attributes.
This is based on Bill Wendling's email.  No additional content has been added,
but now there's a place for Attributes to capture future information.

llvm-svn: 174961
2013-02-12 11:45:22 +00:00
Kostya Serebryany e2e32b32e8 [asan] fix tests for the new ABI
llvm-svn: 174959
2013-02-12 11:14:24 +00:00
Kostya Serebryany be73337ad2 [asan] change the default mapping offset on x86_64 to 0x7fff8000. This gives roughly 5% speedup. Since this is an ABI change, bump the asan ABI version by renaming __asan_init to __asan_init_v1. llvm part, compiler-rt part will follow
llvm-svn: 174957
2013-02-12 11:11:02 +00:00
Bill Wendling 59dce37a82 Merge the collected attributes into the call instruction's attributes.
llvm-svn: 174955
2013-02-12 10:13:06 +00:00
Bill Wendling 7321fec934 Test for string attributes and for attribute group output.
llvm-svn: 174954
2013-02-12 09:14:20 +00:00
Bill Wendling 0dc08915d2 Have the bitcode writer and reader handle the new attribute references.
The bitcode writer emits a reference to the attribute group that the object at
the given index refers to. The bitcode reader is modified to read this in and
map it back to the attribute group.

llvm-svn: 174952
2013-02-12 08:13:50 +00:00
Bill Wendling 7b5f4f3fac Use the AttributeSet as the 'key' to the map instead of the 'raw' pointer.
llvm-svn: 174950
2013-02-12 08:01:22 +00:00
Bill Wendling 7cde51d843 Support string attributes in the AttrBuilder.
llvm-svn: 174948
2013-02-12 07:56:49 +00:00
Cameron Zwarich 7c85c9433c Don't consider definitions by other PHIs live-in when trimming a PHI source's
live range after inserting a copy at the end of a block.

llvm-svn: 174945
2013-02-12 05:48:58 +00:00
Cameron Zwarich 4ee9aef208 Fix indentation.
llvm-svn: 174944
2013-02-12 05:48:56 +00:00
Cameron Zwarich 15eb925ed4 Add a hidden option to PHIElimination to split all critical edges. This is
particularly useful for catching issues with architectures that have exotic
terminators like MIPS.

llvm-svn: 174938
2013-02-12 03:49:25 +00:00
Cameron Zwarich 6d7a4e0c9c Renumber SlotIndexes locally when a new block is inserted.
llvm-svn: 174937
2013-02-12 03:49:22 +00:00
Cameron Zwarich cdcab38ff5 Add blocks to the LiveIntervalAnalysis RegMaskBlocks array when splitting
a critical edge.

llvm-svn: 174936
2013-02-12 03:49:20 +00:00
Cameron Zwarich af34931c63 Fix the updating of LiveIntervals after splitting a critical edge. PHI operand
live ranges should always be extended, and the only successor that should be
considered for extension of other ranges is the target of the split edge.

llvm-svn: 174935
2013-02-12 03:49:17 +00:00
Pete Cooper 10a3ae7039 Check type for legality before forming a select from loads.
Sorry for the lack of a test case.  I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.

I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.

llvm-svn: 174934
2013-02-12 03:14:50 +00:00
Arnold Schwaighofer 89aef93841 ARM cost model: Add vector reverse shuffle costs
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad
word).

radar://13171406

llvm-svn: 174933
2013-02-12 02:40:39 +00:00
Arnold Schwaighofer 7e2ca6e74e Cost model: Add check for reverse shuffles to CostModel analysis
Check for reverse shuffles in the CostModel analysis pass and query
TargetTransform info accordingly. This allows us we can write test cases for
reverse shuffles.

radar://13171406

llvm-svn: 174932
2013-02-12 02:40:37 +00:00
Arnold Schwaighofer 1f3d3ca769 ARM NEON: Handle v16i8 and v8i16 reverse shuffles
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default
legalization of storing and loading to the stack. This is important because we
generate reverse shuffles in the loop vectorizer when we reverse store to an
array.

  uint8_t Arr[N];
  for (i = 0; i < N; ++i)
    Arr[N - i - 1] = ...

radar://13171760

llvm-svn: 174929
2013-02-12 01:58:32 +00:00
Chad Rosier 559cea4e10 Update error message due to previous commit, r174926.
llvm-svn: 174927
2013-02-12 01:12:24 +00:00
Chad Rosier 8bc655605b [ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.
Part of rdar://12470373

llvm-svn: 174926
2013-02-12 01:00:01 +00:00
David Blaikie 209d63af48 DIBuilder: make the return type of createBasicType more specific
llvm-svn: 174924
2013-02-12 00:40:41 +00:00
Kay Tiong Khoo ab588efe42 Added 0x0D to 2-byte opcode extension table for prefetch* variants
Fixed decode of existing 3dNow prefetchw instruction
Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs

llvm-svn: 174920
2013-02-12 00:19:12 +00:00
Hal Finkel 6ae564b4a0 BBVectorize: Don't over-search when building the dependency map
When building the pairable-instruction dependency map, don't search
past the last pairable instruction. For large blocks that have been
divided into multiple instruction groups, searching past the last
instruction in each group is very wasteful. This gives a 32% speedup
on the csa.ll test case from PR15222 (when using 50 instructions
in each group).

No functionality change intended.

llvm-svn: 174915
2013-02-11 23:02:17 +00:00
Hal Finkel 39a95032d2 BBVectorize: Omit unnecessary entries in PairableInstUsers
This map is queried only for instructions in pairs of pairable
instructions; so make sure that only pairs of pairable
instructions are added to the map. This gives a 3.5% speedup
on the csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174914
2013-02-11 23:02:09 +00:00
Michael J. Spencer 08834518ad [Support][Compiler] Add LLVM_HAS_VARIADIC_TEMPLATES.
llvm-svn: 174913
2013-02-11 22:51:07 +00:00
Akira Hatanaka bf1af1acc7 [mips] Expand pseudo instructions before they are emitted in
MipsCodeEmitter.cpp.

JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not
called when the old JIT is used.

This fixes the following tests which have been failing on
llvm-mips-linux builder:

LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll
LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll
LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll
LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll
LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll
LLVM :: ExecutionEngine__hello2.ll
LLVM :: ExecutionEngine__stubs.ll
LLVM :: ExecutionEngine__test-branch.ll
LLVM :: ExecutionEngine__test-call.ll
LLVM :: ExecutionEngine__test-common-symbols.ll
LLVM :: ExecutionEngine__test-loadstore.ll
LLVM :: ExecutionEngine__test-loop.ll

llvm-svn: 174912
2013-02-11 22:35:40 +00:00
Bill Wendling 92ed7006fe Rename AttributeSets to AttributeGroups so that it's more meaningful.
llvm-svn: 174911
2013-02-11 22:33:26 +00:00
Bill Wendling e46707e4c7 Use a std::map so that we record the group ID.
llvm-svn: 174910
2013-02-11 22:32:29 +00:00
Bill Wendling 89ade92879 Rename to something more sensible. No functionality change.
llvm-svn: 174909
2013-02-11 22:31:34 +00:00
Akira Hatanaka 3d38609fdd [mips] Fix indentation.
llvm-svn: 174907
2013-02-11 22:03:52 +00:00
Michael Ilseman 74a6da963b Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> bitcast X to ...
llvm-svn: 174905
2013-02-11 21:41:44 +00:00
Krzysztof Parzyszek 9a278f108a Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

llvm-svn: 174904
2013-02-11 21:37:55 +00:00
Michael Ilseman 35f82ff833 Remove trailing whitespace
llvm-svn: 174903
2013-02-11 21:36:49 +00:00
Krzysztof Parzyszek cfe285e604 Implement HexagonInstrInfo::analyzeCompare.
llvm-svn: 174901
2013-02-11 20:04:29 +00:00
Kay Tiong Khoo d30b1a2ac7 *fixed disassembly of some i386 system insts with intel syntax
*added file for test cases for i386 intel syntax

llvm-svn: 174900
2013-02-11 19:46:36 +00:00
Justin Holewinski 4f12f53353 [NVPTX] Remove NoCapture from address space conversion intrinsics. NoCapture is not valid in this case, and was causing incorrect optimizations.
llvm-svn: 174896
2013-02-11 18:56:35 +00:00
Hal Finkel 0b8ae895b4 BBVectorize: Eliminate one more restricted linear search
This eliminates one more linear search over a range of
std::multimap entries. This gives a 22% speedup on the
csa.ll test case from PR15222.

No functionality change intended.

llvm-svn: 174893
2013-02-11 17:19:34 +00:00
Tim Northover 09995ac069 AArch64: generate dwarfdump test rather than include .o in subversion
llvm-svn: 174891
2013-02-11 16:28:12 +00:00
Michel Danzer 10ed47f927 R600/SI: Use V_ADD_F32 instead of V_MOV_B32 for clamp/neg/abs modifiers.
The modifiers don't seem to have any effect with V_MOV_B32, supposedly it's
meant to just move bits untouched.

Fixes 46 piglit tests with radeonsi, though unfortunately 11 of those had
just regressed because they started using the clamp modifier.

NOTE: This is a candidate for the Mesa stable branch.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 174890
2013-02-11 15:58:21 +00:00
Kostya Serebryany c5f44bc62d [asan] added a flag -mllvm asan-short-64bit-mapping-offset=1 (0 by default)
This flag makes asan use a small (<2G) offset for 64-bit asan shadow mapping.
On x86_64 this saves us a register, thus achieving ~2/3 of the
zero-base-offset's benefits in both performance and code size.

Thanks Jakub Jelinek for the idea.

llvm-svn: 174886
2013-02-11 14:36:01 +00:00
Tim Northover be867971cb AArch64: fix build on some MSVC versions
This does two things:

It removes a call to abs() which may have "long long" parameter on Windows,
which is not necessarily available in C++03.

It also corrects the signedness of Amount, which was relying on
implementation-defined conversions previously.

Code was already tested (albeit in an implemnetation defined way) so no extra
tests.

llvm-svn: 174885
2013-02-11 14:25:52 +00:00
Bill Schmidt 8c0a8e5f6d Restore the resurrected doc link previously deleted
llvm-svn: 174884
2013-02-11 14:14:32 +00:00
Bill Schmidt 37fea43384 Remove a dead PowerPC doc link
llvm-svn: 174881
2013-02-11 13:16:30 +00:00
Tim Northover e206778833 AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".

llvm-svn: 174877
2013-02-11 12:32:18 +00:00
Tim Northover acaa788be6 AArch64: Add basic relocation processing for llvm-dwarfdump.
This allows llvm-dwarfdump to handle the relocations needed, at least
for LLVM-produced code.

llvm-svn: 174874
2013-02-11 11:16:02 +00:00
Tim Northover 45a0d77c48 AArch64: Undo change to how test was run
This broke on Windows, presumably due to interleaving of output streams.

llvm-svn: 174873
2013-02-11 10:51:41 +00:00